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本帖最后由 i4dm99 于 2018-10-24 10:05 编辑
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感谢分享，能共享一下都更新了哪些内容吗
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/ v6 h5 H6 v* A' N5 b5 h. DFixed CCRs: SPB 17.2 HF048
* u2 G2 Z7 U( |. I. ]10-13-20188 w* a; f. _. C
========================================================================================================================================================- B% S q5 g0 k0 c3 E& e
CCRID Product ProductLevel2 Title
" C5 u7 `( X& F4 ~========================================================================================================================================================- I: g. M2 Q6 ~0 W
1913039 ADW ADWSERVER EDM Library Server exits with error message on starting library server service1 L, J" @7 c5 b/ c, c
1709155 ADW COMPONENT_BRO Search query does not search for all the parts in the library
" H4 v. D- A( j# p7 w- J1827231 ADW COMPONENT_BRO Clicking the 'a' key in Part Manager launched from DE-HDL crashes DE-HDL
9 C' K" M6 _) \8 S# s9 @% x% f1903818 ADW COMPONENT_BRO Parts that have comment_body do not display version
! D$ K9 }% J6 p1917961 ADW COMPONENT_BRO Component Browser PPL column values are truncated when selecting the top '*' filter* g ~$ S+ d, g' K5 }
1938172 ADW COMPONENT_BRO Symbol version with COMMENT_BODY set to TRUE cannot be instantiated
Q3 W1 H5 t9 [; r- m# e' W' n1914103 ADW CONF conf creates incorrect path in fetch_dump.ini when MLR is enabled.
4 E/ R# H7 K2 f( q1911422 ADW DBADMIN RuleP101 - PACK_TYPE check against schematic model not working/ Z3 |+ {8 o1 |: r
1926691 ADW DBEDITOR Adding a new classification and immediately trying to delete it results in errors. i: j4 F3 X$ I6 E. G
1926694 ADW DBEDITOR Renaming a classification and then renaming it back to the original results in error( X! c7 W) H# G6 f
1934870 ADW DBEDITOR Adding a new classification and immediately trying to delete it results in errors
0 _ c' o5 F0 L* t+ J1872387 ADW DSN_MIGRATION Design Migration does not cache all used parts into flatlib/part_table.ptf' ~9 O1 _( f+ W. @9 E o
1254292 ADW FLOW_MGR Flow Manager Open Last Project should open last project closed
) M& a: U( A2 ^( p/ G2 I1281817 ADW FLOW_MGR '-proj' switch in 'pcbdw_fm' does not work; launches Flow Manager without loading any project+ h4 h: d7 P$ P/ B' i. O/ m2 _
1727286 ADW FLOW_MGR Product options for PCB SI and Power Integrity are incorrect in the flow and tool launchers
5 U+ K( L3 x! D0 }1 I& m; L1875498 ADW FLOW_MGR EDM fails to open or becomes unresponsive.
$ m# U7 [1 O: \1879386 ADW FLOW_MGR Unable to access COS with the default Firefox version in the 17.2 installation% U* I& n' y1 h: w
1922541 ADW FLOW_MGR Warning message for unavailability of Java version appears on opening a project on Linux/ ]- S5 b" [$ n9 ?, J
1945451 ADW FLOW_MGR Checklist does not work with two-byte characters
- G. q6 Z1 w$ `$ ~1956213 ADW FLOW_MGR Not able to invoke Flow Manager on the remote system
- J2 S+ c: I3 I1892285 ADW LIBDISTRIBUTI Symbol not consistently available in 16.6 ADW Library
1 v" c7 _3 c: u0 @5 P9 j, K M; f/ h( M* q1961731 ADW LIBIMPORT libimport fails to create tar for two Capture models
) _6 M$ Z. M; j+ s7 U) c- l1836620 ADW LRM Library Revision Manager crashes on clicking Help
! _1 [4 s- k# ^# u) ?1961845 ADW PART_BROWSER Error regarding environment variable# W0 _) A* L5 V9 O
1890782 ADW TDA Launching TDO dashboard connected to PLM returns a license error
' H7 w2 @1 d% L1980914 ADW TDA Cannot start Design Entry HDL and Component Browser in a TDO design* l' W7 j2 ]* x: H& ~
1833750 ALLEGRO_EDITOR 3D_CANVAS Soldermask Text is not shown in 3D Canvas) g3 J* [0 `* ?$ g1 u" Z T e
1891230 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas Viewer not bending PCB with proper radius
; `+ m5 ~2 V$ d7 ~1913338 ALLEGRO_EDITOR 3D_CANVAS STEP models missing from exported .stp file
$ {) L& ^( g, r m, t3 Z1927507 ALLEGRO_EDITOR 3D_CANVAS Get Error: All bend operations are disabled due to licensing and/or DLL installation issues on invoking 3D Canvas! z2 x" P8 B2 O( O
1931508 ALLEGRO_EDITOR 3D_CANVAS Place Bound Bottom is displayed on Top, when dra is opened in 3D Canvas. L4 h9 X# ]$ }5 {# ]2 \7 \6 S- n
1943060 ALLEGRO_EDITOR 3D_CANVAS Placebound bottom is not showing correctly.$ r$ W" m% y) V3 g
1950099 ALLEGRO_EDITOR 3D_CANVAS Place Bound Bottom is displayed on Top, when dra is opened in 3D Canvas- f2 s, h4 y, w2 P3 E6 f
1988307 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation
2 J; P* _- v& j4 R) j; H1923585 ALLEGRO_EDITOR ARTWORK Additional unwanted subclasses appear in film control when a new film definition is added
0 N) A" r7 y: v5 g8 u" \. p6 g1944079 ALLEGRO_EDITOR COLOR Export of Board Parameters (Net Colors) does not contain entries for nets with spaces9 N' J/ k6 h2 h- u- _! A5 ~. z
1856320 ALLEGRO_EDITOR DATABASE Donut pad fails to connect with cross-hatched shape in full contact thermal mode, despite hatch overlap of donut. Z8 `' p% Q' O/ @
1912313 ALLEGRO_EDITOR DATABASE Database corrupted during background process
$ w0 T9 L( t5 ]1913344 ALLEGRO_EDITOR DATABASE When changing accuracy of design, the thermal relief for donut pad's outer pad connects to inner pad
1 S. }$ s. p) y+ a- `1 W- [8 s/ T1914470 ALLEGRO_EDITOR DATABASE Release 17.2-2016: export libraries command does not inherit posi/nega information
5 e& u$ Y4 W% `" I4 L! x, Q0 Y+ n1932086 ALLEGRO_EDITOR DATABASE Unable to resolve DBDoctor error
. K1 _9 l9 m$ y: a1963932 ALLEGRO_EDITOR DATABASE DB Doctor is not recognizing placed parts and showing them as unplaced.
/ x z7 w3 t4 b. v6 e1987735 ALLEGRO_EDITOR DATABASE Interior sub-lamination backdrill holes are displayed with Top Soldermask pads where backdrill does not exist
# ^9 K; t6 U5 A$ j' ^1977622 ALLEGRO_EDITOR DFM Not able to add value '5' or multiples of 5 in in DFF constraints for maximum stacked via count
1 F/ [0 @2 R i/ s6 S* `1892809 ALLEGRO_EDITOR DRC_CONSTR NODRC_ETCH_OUTSIDE_KEEPIN property is not working on TEXT
& s' e# {' B2 a7 ^3 ^1894765 ALLEGRO_EDITOR DRC_CONSTR DRC for no_drc_component_board_overlap is not created if the place bound is outside Place Keepin+ ]5 V5 E! r4 ]
1896627 ALLEGRO_EDITOR DRC_CONSTR Moving components takes long time while doing placement/ u- T; E3 }) k6 b2 \3 C
1914591 ALLEGRO_EDITOR DRC_CONSTR Spacing constraints for Mechanical to Hole shows resolved constraints different from the actual air-gap/space
! ?: _# D6 z) I1956468 ALLEGRO_EDITOR DRC_CONSTR DRC getting generated while moving the uvia and getting removed after updating DRC.
2 b. G. \, P; B# A; K; o. ]9 E1884149 ALLEGRO_EDITOR EDIT_ETCH Arced Routing of differential pair creates unexpected arc radii2 B8 ~ i; ~) N4 G6 |
1891985 ALLEGRO_EDITOR EDIT_ETCH Etch edit does not follow the constraints# E8 Q4 d* |6 n5 {/ |
1860056 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes on right-click after choosing the Move command# K( q; r2 J% L/ W2 [& D
1860723 ALLEGRO_EDITOR GRAPHICS APD crashes on right-click when using the Move command/ m( f2 `0 u/ P- ^) D3 R
1870058 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes when using Place Manual -H command/ y, [$ q: h5 G D5 s6 D' S, A M. g4 g8 ?
1930282 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes on executing axlVisibleDesign(nil) from allegro.ilinit) c }- b* f' c
1882813 ALLEGRO_EDITOR INTERACTIV Unable to set the end point with 'snap pick to' when adding an arc
9 J/ v: P: U" S5 f5 R% |* T1884725 ALLEGRO_EDITOR INTERACTIV Edit and Move vertex operation not working as desired
. g. o: q/ h- a& S* W) B3 T1902359 ALLEGRO_EDITOR INTERACTIV Connector boundary remains ON for a layer if visibility toggles in Shape Edit application mode
! K0 j. f% ]" K* W0 q1909004 ALLEGRO_EDITOR INTERACTIV Parameter description showing wrong for Padless Holes under Design Parameter Editor
' b) j5 X; p+ }1912055 ALLEGRO_EDITOR INTERACTIV PCB Editor crashes on Delete By Query - AutoSilkscreen - Find By Query
; a! S6 v6 b0 }/ `% d5 [5 X1924503 ALLEGRO_EDITOR INTERACTIV Editing shape causes PCB Editor to crash, k- O7 A" o- Z$ b( H4 Q% {
1929614 ALLEGRO_EDITOR INTERACTIV Unable to Place Via Array when Staggered ring is selected in Global Ring Parameters./ h" C0 H# k1 R G3 O
1938523 ALLEGRO_EDITOR INTERACTIV Change Shape Type message is same for dynamic and static shapes
7 M1 b# K6 e5 I7 r* Y1940827 ALLEGRO_EDITOR INTERACTIV Irrelevant/incorrect warning message when doing Edit- Change on Clines
7 H( g; ]9 M. L: W1872653 ALLEGRO_EDITOR INTERFACES DXF export shows embedded layers in the layer configuration file3 b+ c6 ^* T. R6 O7 \
1873971 ALLEGRO_EDITOR INTERFACES IDX proposal comments are not shown when importing the IDX file into Allegro
1 J' @1 ^9 l) C" H. I& u1892172 ALLEGRO_EDITOR INTERFACES STEP Package Mapping form needs to be larger$ N: R' U' |: A! B1 m. A* P) N. a
1893311 ALLEGRO_EDITOR INTERFACES A line became two lines after import dxf
3 H/ V# J3 N$ Y/ H2 P1937816 ALLEGRO_EDITOR INTERFACES Unit as % in Property Definition not supported by SubDrawing4 r1 D Z; t7 n* S9 }% w v
1973084 ALLEGRO_EDITOR INTERFACES Physical library not placed if design and IDF database not matched while running
0 \% _2 y ?7 w& o, z1987526 ALLEGRO_EDITOR INTERFACES IDX import Fails to recognize SURFACE FINISHES Class
' r! X6 `! T' H* o# v2 B& Z1872856 ALLEGRO_EDITOR IN_DESIGN_ANA Message displayed when creating directed groups needs to be improved
' \: x( y/ ?/ Z9 n! Y; j1900832 ALLEGRO_EDITOR IN_DESIGN_ANA RTP: Return Path DRC does not check circle void correctly( l7 t: W! H o6 v* h1 f% A4 |
1935641 ALLEGRO_EDITOR IN_DESIGN_ANA Return path DRC crashes PCB Editor
1 M- v4 X( i) ]% \: {* g5 y1649465 ALLEGRO_EDITOR MANUFACT Manufacturing options are not visible in OrCAD PCB Designer legacy menu
* y5 k9 A* j* b8 x' v1873417 ALLEGRO_EDITOR MANUFACT Autosilk fails to add line information. Only part of the line is getting copied to the autosilk layer.. T# c& D$ n3 w, O2 q
1911596 ALLEGRO_EDITOR MANUFACT Documentation Editor drill chart shows two different rows for the same slot.
8 i5 M" ?$ F" O- F" ?0 |& F1937721 ALLEGRO_EDITOR MANUFACT Drill figure character scaled up in GERBER& \$ a: E) ~+ T8 y) @+ b# P
1957768 ALLEGRO_EDITOR MANUFACT Import IPC2581 on cross-section does not import line width and impedance
; P. q) G# M+ c' }' s- ~/ U6 V1969363 ALLEGRO_EDITOR MANUFACT Pressfit connector backdrill depth is considering MNC Layer
% T# I/ ?: j w8 k4 |0 y. {' c1891102 ALLEGRO_EDITOR MULTI_USER Rejected by server error messages when using Symphony Team Design
f: I& F0 c3 F/ r, \+ T1928082 ALLEGRO_EDITOR MULTI_USER Unknown SubClass BOUNDARY/MULTI_USER_LOCK automatically added when defining Artwork Output.6 w+ m9 x& Q3 X4 X+ u# K3 C
1976705 ALLEGRO_EDITOR MULTI_USER Symphony client disconnects from server without any notification - despite ping mechanism& a- v3 y: E! B/ l4 n" v! [
1972554 ALLEGRO_EDITOR NC Mill symbol moved from Nclegend-slots-1-2 to Nclegend-1-2 subclass if nc_param.txt not present ~: ^1 e% G6 Y
1914412 ALLEGRO_EDITOR OTHER Autosilk lines do not clear padstacks that are not rectangular
! L r E4 L" N3 R( S1921933 ALLEGRO_EDITOR PAD_EDITOR column clearance cannot reset to 0 in padstack editor, S$ j8 \3 [1 F0 D
1922234 ALLEGRO_EDITOR PAD_EDITOR DBDoctor reports 'illegal value for pad' and does not fix when zero corner radius for Rounded Rectangle is defined
* V; a3 |! } K' s+ e$ Q1932183 ALLEGRO_EDITOR PAD_EDITOR Drill Symbol information not exported in Padstack XML if Drill Figure in none
}1 c0 S% h! E, P1934880 ALLEGRO_EDITOR PAD_EDITOR Shapes with offsets not displaying properly in Padstack Editor views2 g# o" C, G+ ]/ ~9 Q- Y
1813270 ALLEGRO_EDITOR PLACEMENT When a place replicate module is updated, the vias used in thermal pad are removed
; B) Q; t( t4 p7 J1840275 ALLEGRO_EDITOR PLACEMENT Placing component with the Mirror option causing display problems9 @% H D# `, ?2 B* [
1854099 ALLEGRO_EDITOR PLACEMENT Align components to zero spacing causing mirrored components to overlap7 g. C. G* t, Q' h$ F: i- H: \+ e1 v
1854696 ALLEGRO_EDITOR PLACEMENT Pins shown incorrectly when the Alt Symbol and Mirror commands used consecutively
9 [! ?7 r0 w' H1862863 ALLEGRO_EDITOR PLACEMENT Too many messages in the command window when symbol does not support mirroring+ ]& F( w! U4 }" {& x6 z9 h! D
1909857 ALLEGRO_EDITOR PLACEMENT Using Mirror with Alt Symbol placement displays incorrect graphics
- h/ O5 q* a. L `* l8 l; U5 U1917128 ALLEGRO_EDITOR PLACEMENT Place - Autoplace - Room when all the components of the room are placed on board causing crash' W9 n) }; |+ {" v8 o
1925144 ALLEGRO_EDITOR PLACEMENT PCB Editor stops responding on using the Autoplace - Room command1 J+ F: I! u* {6 V
1961509 ALLEGRO_EDITOR PLACEMENT PCB Editor crashes on choosing Place - Autoplace -Room; Y3 Q1 r2 \$ o: _% R6 n ^
1930669 ALLEGRO_EDITOR REPORTS Net 'VSS' not included in the Etch Length By Pin Pair Report
3 d% U: \5 }% ` A4 m0 i. v1982934 ALLEGRO_EDITOR SCRIPTS PCB Editor stops responding if Generate button is used to create script from journal file
+ l! g9 j0 D+ a+ ?: `1337346 ALLEGRO_EDITOR SHAPE Shape Check is generating problem point errors that seem unnecessary P* e3 D" Z+ V8 F" n
1396692 ALLEGRO_EDITOR SHAPE Zcopy with expansion not following board outline+ z5 D( Z7 V6 I) ^3 o7 m' L
1902001 ALLEGRO_EDITOR SHAPE Shape behaving differently across hotfixes2 ^" n3 ]7 {5 G' ]1 ~% |$ K9 v& u
1921287 ALLEGRO_EDITOR SHAPE 3D canvas is showing some stray objects
0 g# I3 p2 S$ o0 C2 A1 h1936482 ALLEGRO_EDITOR SHAPE Option for Fillet to not obey NO_SHAPE_CONNECT Property2 k% L0 S, r+ `) h6 d
1943899 ALLEGRO_EDITOR SHAPE Only one Shape to Route Keep In DRC in release 17.2-2016 compared to two in release 16.6
$ E6 P1 o0 f7 p2 Y1944041 ALLEGRO_EDITOR SHAPE shape_rki_autoclip makes shape voiding incorrect
) o5 B) ^8 Z2 K1947675 ALLEGRO_EDITOR SHAPE Shape void error when dv_squarecorners is enabled( t$ J, V) H- w" U
1949250 ALLEGRO_EDITOR SHAPE Shapes are filled even after raising and lowering priority* `! i& t1 z) w8 a
1984526 ALLEGRO_EDITOR SHAPE Same net shape voided is inconsistent with respect to vias9 t1 Q, B! D N) W0 \/ P. a4 d
1984955 ALLEGRO_EDITOR SHAPE Dynamic shape creating same net spacing drcs.
- W( i+ x7 H3 ^7 u8 d7 ?1839147 ALLEGRO_EDITOR SKILL axlDBGetLength() reports that the segments of a filled rectangle shape are invalid database ID arguments# I/ w2 e$ W, n+ I8 a
1882776 ALLEGRO_EDITOR SKILL SKILL documentation for axlIsBetween() is wrong
" r/ `0 U3 I) L6 J0 j: ?2 ?1882882 ALLEGRO_EDITOR SKILL Example for axlMathConstants needs correction in Allegro SKILL Reference
( T* |5 l- Q- E9 T: T) D- i1902712 ALLEGRO_EDITOR SKILL axlAltSymbolReplace moves symbol to the top of design while replacing4 T& f0 Z0 r4 c* k7 y9 z/ L
1906329 ALLEGRO_EDITOR SYMBOL Mechanical Pin to Conductor property set on a pin in a symbol does not pass to the board ~' A- d! ~( B" u. P- e& n$ j0 K
1911343 ALLEGRO_EDITOR UI_FORMS Global Visibility not turning all layers off
8 O/ R6 M" \( e9 Y( u1985584 ALLEGRO_EDITOR UI_FORMS Import logic changes the Current Working Directory# _* p8 m4 M9 c$ d! t
1987829 ALLEGRO_EDITOR UI_FORMS Import logic changes the current working directory* t( v1 w. s+ l7 t9 {" i
1992722 ALLEGRO_EDITOR UI_FORMS After netlist import process, the board file is changing its current path/ o( D! Q9 R2 _
1697506 ALLEGRO_EDITOR UI_GENERAL Stroke Editor working in OrCAD PCB Editor of release 16.6 does not work in release 17.2-2016 k9 ^6 W& c% n+ i, C
1702631 ALLEGRO_EDITOR UI_GENERAL Etch Length by Net report does not list correct net name for nets in a bus" T9 ]: A: P6 R9 y
1703105 ALLEGRO_EDITOR UI_GENERAL Bus net names are incorrect in reports when using the allegro_html_qt variable+ `- n5 t1 c% d; f+ k) G+ ]
1770786 ALLEGRO_EDITOR UI_GENERAL Stroke Editor working in OrCAD PCB Editor of release 16.6 does not work in release 17.2-2016+ ^8 n) f+ n; I
1784938 ALLEGRO_EDITOR UI_GENERAL Etch Length by Net report does not show net names with angle brackets in release 17.2-2016
; P3 ~0 n2 l: Q. m3 \2 P" U$ m( p1822557 ALLEGRO_EDITOR UI_GENERAL axlUIWCloseAll is not closing text window in release 17.2-2016
' V z8 d' B) `1836400 ALLEGRO_EDITOR UI_GENERAL Net names are truncated in HTML reports
4 n/ [6 w& k( `1869879 ALLEGRO_EDITOR UI_GENERAL Links not working in the Net loop report
7 {( r& o' m3 x) j n Y8 V1895878 ALLEGRO_EDITOR UI_GENERAL axlUIWClose()/axlUIWCloseAll() functions do not work when allegro_html_qt setting is enabled./ H$ g0 }9 A, }$ t; i
1912282 ALLEGRO_EDITOR UI_GENERAL PCB Editor exits with error message on editing objects& u0 i7 J$ q" m |% ~/ b7 U- l
1913962 ALLEGRO_EDITOR UI_GENERAL PCB Editor toolbars change on choosing View - UI Settings - Save Settings and then restarting9 L6 ]+ M u+ x2 y8 k" |9 u/ ?! O
1933172 APD UI_GENERAL Cannot paste text into the command prompt without clicking when 'enable_command_window_history' is set+ s4 O+ n) U5 R- B: ~
1843712 CAPTURE NETGROUPS Signals shown only for first segment of NetGroup
" k, Z6 Q! x# ^9 v. T1917768 CAPTURE NEW_SYM_EDITO Missing package pin overview in Symbol editor: i+ w) P3 A: X! U" D
1920088 CAPTURE NEW_SYM_EDITO Package view missing in the new Symbol Editor% u- J) q- j; R. I* t
1922196 CAPTURE NEW_SYM_EDITO Snap to grid issue in Symbol editor) n6 Y( R$ M7 T! C7 D O
1927268 CAPTURE NEW_SYM_EDITO View Package is grayed out in release 17.2-2016, hotfix 038 and later versions0 E9 J5 I+ A3 D) v% Z
1928012 CAPTURE NEW_SYM_EDITO In new Symbol Editor, View - Package is grayed out
% A5 i2 ^' d5 v6 e9 Q- G$ z0 A& Z1930865 CAPTURE NEW_SYM_EDITO View Package missing in hotfix 038
# Y5 h0 |3 r; B! b6 C1 w3 Z8 I1938507 CAPTURE NEW_SYM_EDITO Issues with new Symbol Editor: Justification and spreadsheet usability T4 ]. n% g' X2 e$ I6 n% @8 |
1940869 CAPTURE NEW_SYM_EDITO Missing pins in 'Edit Pins of All Section' table view for 4k resolution but not in 2k resolution# l1 f. m# k) _* W: ]( k! J- |5 a
1940888 CAPTURE NEW_SYM_EDITO Copying pins from a part and pasting on different parts not working properly.
9 W2 G% ]$ P1 n" H1942994 CAPTURE NEW_SYM_EDITO Cut / Paste of object in New Part / Symbol editor always pastes on grid
% i4 H$ d$ j! r5 ]; J( G7 q1944396 CAPTURE NEW_SYM_EDITO JavaScript error while copying from 'Edit Pins of All Sections'( I* t$ s* c* {# I' c! }
1950224 CAPTURE NEW_SYM_EDITO Cyrillic alphabets are not displayed properly on Schematic.9 G8 _' l' I& ?% I2 p" t' C5 W2 p
1951369 CAPTURE NEW_SYM_EDITO Cancel closes Symbol Editor" C2 E* J( {) w3 t5 Z2 C
1966785 CAPTURE NEW_SYM_EDITO Edit Part is grayed out
( j+ u& b- f: t" J. X+ O/ ~1973135 CAPTURE NEW_SYM_EDITO Issue with new Symbol Editor: cannot copy-paste pins3 U7 p* [/ E! l+ @
1973344 CAPTURE NEW_SYM_EDITO JavaScript error on opening part from design; w; ^. _3 ^3 t
1974122 CAPTURE NEW_SYM_EDITO Cannot copy-paste all pin list on the new Symbol Editor
$ X, \' N" k' {1 S( G1983593 CAPTURE NEW_SYM_EDITO Script error on copying and pasting to property sheet
- b7 U) Z( j+ }, ]" y3 z' R4 [1929692 CAPTURE OPTIONS PACK_SHORT issues with Pin Numbers that contain letters/alphabets
: d( Z; d% X, P. I ?+ _1 Y! q0 W) }1876939 CAPTURE OTHER Incorrect Capture renaming error (ORCAP-1310)
- O: K9 ], J2 x1916090 CAPTURE OTHER Incorrect error message when 'save as' fails due to long directory path
4 N: F5 p( C3 m! s9 G1921927 CAPTURE OTHER Two functions are mapped to Shift + R in OrCAD Capture in hotfix 038
' ]+ p+ Q% T" ^! s1946453 CAPTURE OTHER Shift+R shortcut is assigned to two functions.
, |; U+ u& g% S- D1 M' E1965456 CAPTURE OTHER Shortcut Shift + R is not opening the Independent Sources dialog box
: m# s% t' |# ]! B: U4 z; @1968757 CAPTURE OTHER Close CIP is grayed when right-clicking on the tab in Capture./ G1 F5 }' V% D4 P* `0 S5 @/ [
1938437 CAPTURE PART_EDITOR OrCAD Capture new Symbol Editor Pin Type missing in table8 L) j0 _9 i5 Y: n
1906757 CAPTURE SCHEMATICS Intersheet reference is overlapping with the offpage connector name! \5 c. n! z2 H0 ~6 c
1867016 CAPTURE SCHEMATIC_EDI Part placeholders not being positioned when moved- v9 h' a6 p& r# {+ s% F
1932837 CAPTURE SCHEMATIC_EDI Parameters graphics are not correctly positioned
: u+ }' _4 P( B: X3 o1949518 CAPTURE SCHEMATIC_EDI Getting error when comparing designs
7 L v, k, ?2 A8 _7 g1967545 CAPTURE SCHEMATIC_EDI Only section A of heterogeneous part being placed and not sections B, C, or D: z0 ^+ E; ~7 L P% d7 _' u! x# `( ?
1933919 CIS DBC_CFG_WIZAR New CIS Configuration .dbc file created in release 17.2-2016 shows release 16.3, l% Z6 {9 K" @9 E G# y& A( c
1932550 CIS RELATIONAL_DB VIEW NAME in Relational Database configuration is not working as expected.9 N' @, @1 m! \* S% u _/ m/ L. z; H
1832524 CONCEPT_HDL CHECKPLUS Default checkplus rules show body height of 0 (sym_2 of the attached cell). This causes the cell to fail verification.
+ z0 j/ s6 |: o! \! t4 K4 N" `1912023 CONCEPT_HDL CHECKPLUS signalWidth predicate does not recognize SIG[1..0] as bus.
# o, _, u1 T: F7 R5 y# B5 }1966120 CONCEPT_HDL COPY_PROJECT Copying release 17.2-2016 project results in message stating the project is of an older version
- N. P7 P2 _4 P% n1879425 CONCEPT_HDL CORE Adding signals with the right-click menu is not following the defined color scheme
3 R; l' E$ V; m# b( ?1890542 CONCEPT_HDL CORE Getting ERROR(SPCOCN-1911) when running export physical with backannotation
p: [) y; Y0 v% k* P( G2 ~1907684 CONCEPT_HDL CORE Moving symbol makes canvas unresponsive for a long time
+ N$ {1 Q2 C& I1920711 CONCEPT_HDL CORE Pin names changes when mirroring the swapped section./ \: n+ u5 K8 X" a' Z
1931421 CONCEPT_HDL CORE On Linux, 'cpmaccess -read' returns incorrect value
2 o1 I; h8 ^$ t0 a1931782 CONCEPT_HDL CORE Setting DONT_FORCE_ORIGIN_ONGRID to ON does not work for sig_name
2 B+ A% B( f M9 E3 Z& H) o, |1932433 CONCEPT_HDL CORE _movetogrid causes signal disconnection0 ]7 G$ J7 _5 a) T
1946993 CONCEPT_HDL CORE DE-HDL Part Manager fails to update parts on schematic if new KEY properties exist in PTF but not in schematic
# b: h5 {7 G0 N7 }' o0 A) R4 \1947029 CONCEPT_HDL CORE Design Entry HDL Font Support not working for signal rename
9 c7 l& v e9 Z0 v x' ^$ d; O1962865 CONCEPT_HDL CORE Schematic symbol creation with '-' as pin name not packaging
# _$ \( T0 U7 E, j2 h4 D1966805 CONCEPT_HDL CORE Issues with packaging design containing cells named with a leading underscore% t& X1 |8 h# Y9 x a/ l0 m
1967760 CONCEPT_HDL CORE DE-HDL crashes on moving Net Group/Port in release 17.2-2016, hotfix 044. g+ u4 i: I0 k$ E; f3 C% d# h
1968282 CONCEPT_HDL CORE DE-HDL Part Manager fails to update parts on schematic when new KEY properties exist in PTF and not in schematic
! Z' [: H0 y' J2 Z" m1972815 CONCEPT_HDL CORE Part Manager not updating missing key attributes from the ptf file by using 'Update instances' option
s y, c: j; s9 S. y3 Y- }1 ]6 V1887790 CONCEPT_HDL CREFER CRefer links not working in selected cpm file
$ ^$ b1 ^9 S4 H G7 V1898535 CONCEPT_HDL INTERFACE_DES Global Navigation window does not reflect removal of a net on page2 that is part of a netgroup on page1' u2 S" V" `; w9 ^
1888048 CONCEPT_HDL PDF Japanese characters are not output correctly to PDF on Linux.
& O. t' G* p1 O1 x1 V( N- r1937505 CONCEPT_HDL PDF Missing intersection dot in schematic PDF0 n( ?6 B4 d8 t, f+ C! A' M
1942486 CONSTRAINT_MGR CONCEPT_HDL CM crashes when you save after importing a TCF file3 m& B7 G8 `6 _6 T% N! q
1983743 CONSTRAINT_MGR CONCEPT_HDL Region Class-Class members are being duplicated in CM in the current session
! N, K1 L0 g" g3 U. O1906573 CONSTRAINT_MGR ECS_APPLY Database corrupt and DBDoctor reports illegal database pointer error
- s$ I$ @% x. B) h1913805 CONSTRAINT_MGR OTHER Setting environmental variable CM_PARTIAL_DCF in release 17.2-2016 causing crash; E" @7 K# m& F, t# {/ l' d, h
1914813 CONSTRAINT_MGR OTHER C++ Runtime error and non-recoverable crash in class-class worksheet- ?) y1 z# K5 Z# T4 G
1920142 CONSTRAINT_MGR OTHER Xnet names are not consistent in the design( L3 F7 X' {' ]& A- }: R$ j
1898549 CONSTRAINT_MGR SCHEM_FTB Importing netlist causing crash in release 17.2-2016, hotfix 0363 S1 J6 @! {, d5 C7 o. ^: H
1814851 CONSTRAINT_MGR UI_FORMS Field solver /DRC check running forever! `: D6 W8 q8 }. `! F3 B' n
1889862 CONSTRAINT_MGR UI_FORMS PCB Editor hangs while assigning net voltages in CM
2 x! m0 ~; I9 R9 C1 J* D1965470 CONSTRAINT_MGR UI_FORMS Constraint Manager GUI Issue in release 17.2-2016, hotfix 039: Font size small and rows/columns in shrink mode
3 L6 G" M5 U. T1945406 ECW ADMINISTRATIO Tree view was not refreshed soon after changing the site permission.5 U) y, w! l. P; H
1826848 ECW METRICS SPDWECW-551 and SPDWECW-553 should be warnings, not errors; D, F3 C5 V: T+ u# F; |$ ?
1933373 ECW PROJECT_MANAG ecwbatch does not accept password and does not ignore invalid users
& [/ C/ L) ^" l/ |& r1921502 F2B PACKAGERXL Errors on running Export Physical:SPCOPK-1138 and SPCOPK-1149
7 D3 O/ P" U3 Q1929846 F2B PACKAGERXL PackagerXL is still creating the pstcmbc.dat file on a release 16.6 design uprevved to release 17.2-2016
9 U" t8 c" I" x* a8 _$ _1953780 F2B PACKAGERXL Updated subdesign package information not updated on the top-level design in the reuse flow
p9 x: U0 p1 o1971738 F2B PACKAGERXL Deleting blank space from pstxnet.dat file crashing DE-HDL0 w( `( `! O% n k
1891002 INSTALLATION DOWNLOAD_MGR Issue with Download Manager (Change Preferences Option does not Work)$ b/ t( y0 v9 ^- N6 ]3 M3 W9 }
1972890 ORBITIO OTHER OrbitIO-APR failed to run if PCB design included; w& W% w/ A) \- o
1954262 PCB_LIBRARIAN CORE Footprint model check in fails with verification checks failed error
; A: H6 W9 S3 v# d% S+ b9 S1943656 PCB_LIBRARIAN GRAPHICAL_EDI Symbol Editor is blank if .ascii file is newer than .css file" i6 n% u- J/ F1 k, V
1897887 PCB_LIBRARIAN SYMBOL_EDITOR New Symbol Editor: Inconsistent symbol results when adding vector pins in Part Developer+ n* J8 R. b% G1 y2 ]" R5 W( ?
1898003 PCB_LIBRARIAN SYMBOL_EDITOR Issue with Page Border Symbol: p; s3 z" q7 }3 X0 `) b
1842007 PSPICE LIBRARIES Change required in swit_reg.lib3 V' {$ ~& k4 ?7 J9 D4 K0 M' l
1906922 PSPICE LIBRARIES Mismatch in mapping of IC pins in model and PSpice template for analog device AD8138
7 ~. w' {6 `* ^5 N8 m: P2 B1947586 PSPICE LIBRARIES Update the model AD8138/AD in ANLG_DEV.OLB2 `4 F& T( u+ |+ ?
1748470 PSPICE MATLAB PSpice displays an error when sending current in co-simulation; t+ v7 a( ~' O( c: C
1802455 PSPICE MATLAB Incorrect current direction for pins in SLPS flow
( _7 i% Z& x/ d1852811 PSPICE MATLAB ORPSIM-2604 being reported in SLPS simulation% g6 \& @' T$ z' k% M F) U, E, w
1858716 PSPICE MATLAB Co-Simulation fails if 'RC' is used as reference of resistor
# w: ~- D( D) S6 V' @0 s1921641 PSPICE MODELEDITOR Model Editor in Client Server installation slow to invoke8 @) `& G7 E' Z/ C8 \6 L h7 {0 g% H
1922160 PSPICE MODELING_APPS New Capture Associate Symbol GUI not reading libraries9 R+ _, h( `" J; w8 m2 d
1843698 PSPICE PROBE PSpice icons appear very small on a specific computer' c7 [6 n, g Y& A. p; O3 {* F6 D
1773841 PSPICE SIMULATOR orSimSetup64 crashes when running the simulation for attached design! q9 ]% ^( v/ ?+ i3 t# ?
1816316 PSPICE SIMULATOR Simulation stuck; however, the status bar is correctly updated during Pseudo Transient Analysis
& ~* D: i' ~! G3 S9 n0 D7 M; e1887119 SCM IMPORTS Cannot selectively update changes in VDD
# V/ O+ @6 `7 c0 l; q: }$ v! z0 V1 [1889362 SCM IMPORTS Cannot selectively update changes in Visual Design Differences
) y" n5 }0 `" o7 K" O1958545 SCM SETUP Auto assign models does not work in SCM same way as in DE-HDL2 k- A) o0 R/ T9 o" x/ M5 G6 v
1988841 SIG_EXPLORER INTERACTIV SigXplorer stops responding or crashes in hotfix 047 when a design is saved( ~1 u1 U$ U6 a1 n
1988943 SIG_EXPLORER INTERACTIV SigXplorer crashes on selecting Update Constraint Manager$ N& `* [. \1 M) ^
1991375 SIG_EXPLORER INTERACTIV SigXplorer crashes when clicking Save( F0 ^9 e6 w" M6 v# X
1993749 SIG_EXPLORER INTERACTIV SigXplorer crashes on saving topology
# H# J- k) M. U7 A$ s( _1969975 SIG_INTEGRITY GUI Model Browser edits model above the one that is selected! \) s, i1 a& Z3 j7 [/ r) x; {, B
1953184 SIP_LAYOUT IMPORT_DATA Sub Drawing not saving dashed lines
( {& z8 ]) @. }1913864 SIP_LAYOUT ORBITIO_IF SiP Layout design import results in wrong die rotation1 I* r2 m) p9 L; g
1880237 SIP_LAYOUT PADSTACK_EDIT Background Window comes to the forefront when closing the Padstack editor
; M/ P2 R6 } {1 ^% A' n5 e; E: x7 e1972560 SIP_LAYOUT STREAM_IF GDS Export fidelity issue: inverted arcs
. p, |) M4 Z/ h: H3 V" t/ _& t1920317 SIP_LAYOUT THIEVING Thieving pattern does not allow for OOPS operation
" N* s5 L6 J7 N' q C1909075 SYSTEMSI DOC SystemSI PBA channel and circuit simulations do not respond if bit pattern is 1s or 0s
! H$ W- H: x* f9 Y9 C! m1916101 SYSTEMSI DOC Lack of stimulus in file causes Serial Link Analysis to become unresponsive; W9 t5 _2 @) b9 c
1919562 SYSTEMSI ENG_PBA SystemSI generates wrong timing bathtub curves in channel simulations for write and read
# b& h! f1 ]; B+ e" T" r% z6 T1964064 SYSTEMSI GUI_PBA Able to sweep AMI parameters in SSI-PBA* [7 T# f P" O2 g8 v
1971266 SYSTEMSI GUI_PBA MCP header shows only 49 ckt nodes instead of 52 for s52p S-parameter file
, e( N: J! ^5 k1885625 SYSTEMSI GUI_SLA Manage AMI + DLL from Setup Analysis Window
! d& j* n( K) S+ R3 k" X2 w: f1924382 SYSTEMSI GUI_SLA Data Rate field in SystemSI Stimulus property form is confusing for PAM4 operation
/ l, ~( C) V+ N: u N1982341 SYSTEM_CAPTURE CANVAS_EDIT Signal rename does not maintain new signal name value) ]& u' ^& @+ }1 { x
1976857 SYSTEM_CAPTURE CONSTRAINT_MA System Capture-CM Match Group Creation is not updating correctly: `# F! w2 z6 F
1929606 SYSTEM_CAPTURE DESIGN_CORRUP Opening design causes System Capture to crash' H5 w3 X) q8 p# @
1914697 SYSTEM_CAPTURE DRC Overlapping component DRC does not work
! `, a) `7 [0 I/ W: d- S, N1973467 SYSTEM_CAPTURE IMPORT_PCB System Capture Import Physical shows many component and physical differences on a design that is synced up$ [6 S) N/ x; C, I+ r5 M$ m
1962603 SYSTEM_CAPTURE NAVLINKS Ability to not underline hyperlinks for Navigation Link values
$ z- [" {$ v# O6 c$ p1967639 SYSTEM_CAPTURE PART_MANAGER Part Manager does not open in System Capture for part property value changes even after setting the cpm directive.
: j, |5 u# K) ^: V( v, U1964388 SYSTEM_CAPTURE SMART_PDF Some shapes are not visible in the smart PDF schematics: a8 G! [6 d8 k/ i8 E: I7 @
1976832 SYSTEM_CAPTURE TDO Rolling Back local lower-block requires check-out of higher-level packaged & variant views
4 h7 |3 T6 _5 V/ ]% U0 D' F ?: f6 ?1976844 SYSTEM_CAPTURE TDO CM - TDO check-out dependencies are broken: }9 D1 T1 f/ ~. Z; m2 b" Y# u) H
1976859 SYSTEM_CAPTURE TDO Variant Editor in System Capture -TDO allows to delete a variant without checking out variants view
8 x* |' X/ x; F8 ?1839816 TDA CORE All the design objects are locked in the EDM dashboard after a DSFrame error
- M- v& e# p+ z- I) q1889898 TDA CORE Cannot check in the top level of the project in TDO
" h% a2 X' i8 s, Q+ j& p: A1892411 TDA CORE Unable to undo the block checkout if something fails
! w% ^$ i% ^+ @9 M1877757 TDA DEHDL Refresh Hierarchy does not show latest TDO lock/unlock status in DE-HDL) p% ` t/ P) L, r; O7 _
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