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签到天数: 17 天 [LV.4]偶尔看看III
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本帖最后由 i4dm99 于 2018-10-24 10:05 编辑 J& Q( r B3 l' o% F6 w
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感谢分享,能共享一下都更新了哪些内容吗
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Fixed CCRs: SPB 17.2 HF0481 o& O' q# C- Z( k; v5 h6 C% `
10-13-2018
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( p. U4 r' T! ACCRID Product ProductLevel2 Title- V" O$ n0 f1 }* d+ b# L
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, a% ^( K% M4 y" ^1913039 ADW ADWSERVER EDM Library Server exits with error message on starting library server service
, L& F& m. h$ O9 Q9 K1709155 ADW COMPONENT_BRO Search query does not search for all the parts in the library! O! l r6 {$ y' j8 ?
1827231 ADW COMPONENT_BRO Clicking the 'a' key in Part Manager launched from DE-HDL crashes DE-HDL$ r* n$ {5 l7 g+ g0 ^1 T
1903818 ADW COMPONENT_BRO Parts that have comment_body do not display version
3 @3 k$ |' H4 O1917961 ADW COMPONENT_BRO Component Browser PPL column values are truncated when selecting the top '*' filter4 K# b0 [) c1 j) A0 l
1938172 ADW COMPONENT_BRO Symbol version with COMMENT_BODY set to TRUE cannot be instantiated
+ x! w7 d3 N( s( R6 @$ X! S C1914103 ADW CONF conf creates incorrect path in fetch_dump.ini when MLR is enabled.. S: C# Q- Y7 p8 H; K) H
1911422 ADW DBADMIN RuleP101 - PACK_TYPE check against schematic model not working6 ~" s/ j6 q+ u( O, B3 d
1926691 ADW DBEDITOR Adding a new classification and immediately trying to delete it results in errors
' r! O, h6 P) b1926694 ADW DBEDITOR Renaming a classification and then renaming it back to the original results in error
' b- |3 z5 s0 ^1934870 ADW DBEDITOR Adding a new classification and immediately trying to delete it results in errors1 k4 }) q) v! z8 q3 E; T: v2 y
1872387 ADW DSN_MIGRATION Design Migration does not cache all used parts into flatlib/part_table.ptf8 j" g, r4 L, ^
1254292 ADW FLOW_MGR Flow Manager Open Last Project should open last project closed
; K0 h5 t8 o6 s# R$ A ^) n- x& {1281817 ADW FLOW_MGR '-proj' switch in 'pcbdw_fm' does not work; launches Flow Manager without loading any project, D$ z7 v5 }$ G; O6 z0 D8 I
1727286 ADW FLOW_MGR Product options for PCB SI and Power Integrity are incorrect in the flow and tool launchers
$ r$ W6 t! }& \, v" C3 _) b1875498 ADW FLOW_MGR EDM fails to open or becomes unresponsive.8 B% l a2 B% W
1879386 ADW FLOW_MGR Unable to access COS with the default Firefox version in the 17.2 installation8 E7 v3 [" x+ N$ ^" o' m2 Z
1922541 ADW FLOW_MGR Warning message for unavailability of Java version appears on opening a project on Linux: U9 ] e6 K2 F* [7 {
1945451 ADW FLOW_MGR Checklist does not work with two-byte characters
5 ?7 ~+ |: J% S& u! {. C: H3 x3 ^/ D1956213 ADW FLOW_MGR Not able to invoke Flow Manager on the remote system2 Q' h* I. L5 }* e& ?& Z
1892285 ADW LIBDISTRIBUTI Symbol not consistently available in 16.6 ADW Library
& |+ J, h3 Q" T; {6 `( V- C+ N1961731 ADW LIBIMPORT libimport fails to create tar for two Capture models
2 C7 W, |3 _ e) ?3 E- _. }1836620 ADW LRM Library Revision Manager crashes on clicking Help8 V. v) [& M' |
1961845 ADW PART_BROWSER Error regarding environment variable5 ~/ |0 l S) d; r
1890782 ADW TDA Launching TDO dashboard connected to PLM returns a license error7 ]6 W& D5 l" _; P$ D! V M4 r
1980914 ADW TDA Cannot start Design Entry HDL and Component Browser in a TDO design! |) r5 m1 X0 S. H0 e4 b* `. J5 {
1833750 ALLEGRO_EDITOR 3D_CANVAS Soldermask Text is not shown in 3D Canvas) M ~( i( c4 R$ V
1891230 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas Viewer not bending PCB with proper radius
# T0 s# Z, S+ c1913338 ALLEGRO_EDITOR 3D_CANVAS STEP models missing from exported .stp file, N! L/ c% U" Y! N% i
1927507 ALLEGRO_EDITOR 3D_CANVAS Get Error: All bend operations are disabled due to licensing and/or DLL installation issues on invoking 3D Canvas
6 ?/ Y( q7 t5 Z9 |1931508 ALLEGRO_EDITOR 3D_CANVAS Place Bound Bottom is displayed on Top, when dra is opened in 3D Canvas
x' h. V: I6 _9 b1943060 ALLEGRO_EDITOR 3D_CANVAS Placebound bottom is not showing correctly.
* Z8 J5 F5 @4 m4 e1950099 ALLEGRO_EDITOR 3D_CANVAS Place Bound Bottom is displayed on Top, when dra is opened in 3D Canvas
1 [7 S( O4 K1 }# S: R" e1988307 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation+ i# M' [3 q6 R+ M. R" P W3 `
1923585 ALLEGRO_EDITOR ARTWORK Additional unwanted subclasses appear in film control when a new film definition is added
! r; n/ z1 `: D6 m0 ]1944079 ALLEGRO_EDITOR COLOR Export of Board Parameters (Net Colors) does not contain entries for nets with spaces5 E5 \+ r8 B; K* I
1856320 ALLEGRO_EDITOR DATABASE Donut pad fails to connect with cross-hatched shape in full contact thermal mode, despite hatch overlap of donut.5 L3 W7 z* O/ j
1912313 ALLEGRO_EDITOR DATABASE Database corrupted during background process
6 p Z1 _- \$ u3 g' D: V# V1913344 ALLEGRO_EDITOR DATABASE When changing accuracy of design, the thermal relief for donut pad's outer pad connects to inner pad1 l* f) L* l4 c, V0 j* C) C" y& Y
1914470 ALLEGRO_EDITOR DATABASE Release 17.2-2016: export libraries command does not inherit posi/nega information" z' G" T0 D$ _# d# e3 a6 y
1932086 ALLEGRO_EDITOR DATABASE Unable to resolve DBDoctor error7 u) h. g* S3 i
1963932 ALLEGRO_EDITOR DATABASE DB Doctor is not recognizing placed parts and showing them as unplaced.
8 M( x' @% O9 x2 C$ w" _1987735 ALLEGRO_EDITOR DATABASE Interior sub-lamination backdrill holes are displayed with Top Soldermask pads where backdrill does not exist9 R3 T8 m/ n# \: J- M+ d+ D
1977622 ALLEGRO_EDITOR DFM Not able to add value '5' or multiples of 5 in in DFF constraints for maximum stacked via count
4 G2 [ F* _' q! O1892809 ALLEGRO_EDITOR DRC_CONSTR NODRC_ETCH_OUTSIDE_KEEPIN property is not working on TEXT
7 s3 f# E. Z/ ?5 N$ f3 o3 O& C- _1894765 ALLEGRO_EDITOR DRC_CONSTR DRC for no_drc_component_board_overlap is not created if the place bound is outside Place Keepin- R7 L( P4 J9 W8 T
1896627 ALLEGRO_EDITOR DRC_CONSTR Moving components takes long time while doing placement
! M+ N7 i& V) T% ?* |- A9 F8 d# v1914591 ALLEGRO_EDITOR DRC_CONSTR Spacing constraints for Mechanical to Hole shows resolved constraints different from the actual air-gap/space4 v4 l4 u& Y9 I+ o* X1 Q: ^( S. g
1956468 ALLEGRO_EDITOR DRC_CONSTR DRC getting generated while moving the uvia and getting removed after updating DRC.
% @0 A4 j# Z+ L9 |6 z# M5 @( k1 R. G: E6 d1884149 ALLEGRO_EDITOR EDIT_ETCH Arced Routing of differential pair creates unexpected arc radii$ Y8 p% H, [( T1 _6 v5 X4 E' G
1891985 ALLEGRO_EDITOR EDIT_ETCH Etch edit does not follow the constraints
0 h' z# @0 l) C8 r& y1860056 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes on right-click after choosing the Move command6 r( @ G* {& Z9 e' z( P! b( u4 N& Z
1860723 ALLEGRO_EDITOR GRAPHICS APD crashes on right-click when using the Move command! I1 I. h Z% @' n
1870058 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes when using Place Manual -H command
# r# @" P" `* c, O$ x9 ]7 {3 }1930282 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes on executing axlVisibleDesign(nil) from allegro.ilinit* `$ e- ~8 h* `! Y( u) A
1882813 ALLEGRO_EDITOR INTERACTIV Unable to set the end point with 'snap pick to' when adding an arc/ T& J/ p# D3 ?5 d! V" g2 w; J
1884725 ALLEGRO_EDITOR INTERACTIV Edit and Move vertex operation not working as desired
- i. a6 |% E, I& G/ Q4 ?2 }1902359 ALLEGRO_EDITOR INTERACTIV Connector boundary remains ON for a layer if visibility toggles in Shape Edit application mode+ o; S) g c7 K: D" B
1909004 ALLEGRO_EDITOR INTERACTIV Parameter description showing wrong for Padless Holes under Design Parameter Editor
" \% p+ ~2 o, N; v9 H) C9 W1912055 ALLEGRO_EDITOR INTERACTIV PCB Editor crashes on Delete By Query - AutoSilkscreen - Find By Query
- J) V" I7 A7 I: _+ Q8 U1924503 ALLEGRO_EDITOR INTERACTIV Editing shape causes PCB Editor to crash
: X1 I! M3 O4 S& Y) Y1929614 ALLEGRO_EDITOR INTERACTIV Unable to Place Via Array when Staggered ring is selected in Global Ring Parameters.: Y) G; n% W1 f, K
1938523 ALLEGRO_EDITOR INTERACTIV Change Shape Type message is same for dynamic and static shapes
! T/ {! ]4 E( {3 D7 t6 I6 N2 ^7 P1940827 ALLEGRO_EDITOR INTERACTIV Irrelevant/incorrect warning message when doing Edit- Change on Clines
9 @. r! U* ?9 L6 _2 _5 b1872653 ALLEGRO_EDITOR INTERFACES DXF export shows embedded layers in the layer configuration file+ R" @5 W% J" L
1873971 ALLEGRO_EDITOR INTERFACES IDX proposal comments are not shown when importing the IDX file into Allegro' M3 Q5 C u% f( a) J* X
1892172 ALLEGRO_EDITOR INTERFACES STEP Package Mapping form needs to be larger9 N* T1 k" g; \0 u9 Q! E5 U1 u
1893311 ALLEGRO_EDITOR INTERFACES A line became two lines after import dxf7 F0 `3 G) z, |
1937816 ALLEGRO_EDITOR INTERFACES Unit as % in Property Definition not supported by SubDrawing
1 g. y& x4 x/ r$ @1973084 ALLEGRO_EDITOR INTERFACES Physical library not placed if design and IDF database not matched while running' _% R* Y3 v' W! D+ q( i7 R
1987526 ALLEGRO_EDITOR INTERFACES IDX import Fails to recognize SURFACE FINISHES Class$ t( D, v) H# }- N
1872856 ALLEGRO_EDITOR IN_DESIGN_ANA Message displayed when creating directed groups needs to be improved
6 t3 t! }" I, c3 p ]" S1900832 ALLEGRO_EDITOR IN_DESIGN_ANA RTP: Return Path DRC does not check circle void correctly
1 X9 S) F( J7 F8 ~; S1935641 ALLEGRO_EDITOR IN_DESIGN_ANA Return path DRC crashes PCB Editor+ K* i# p. |" N- I; ?: [
1649465 ALLEGRO_EDITOR MANUFACT Manufacturing options are not visible in OrCAD PCB Designer legacy menu6 T( S! Z! D+ g' t9 N
1873417 ALLEGRO_EDITOR MANUFACT Autosilk fails to add line information. Only part of the line is getting copied to the autosilk layer.) W' A5 g3 t4 f, z- ^2 H
1911596 ALLEGRO_EDITOR MANUFACT Documentation Editor drill chart shows two different rows for the same slot.
/ T3 T9 i& T: n, A1937721 ALLEGRO_EDITOR MANUFACT Drill figure character scaled up in GERBER
1 J- w' p0 ^7 s; E; M5 o; D; d1957768 ALLEGRO_EDITOR MANUFACT Import IPC2581 on cross-section does not import line width and impedance
- ]* o1 D3 x! X% S+ A0 C1969363 ALLEGRO_EDITOR MANUFACT Pressfit connector backdrill depth is considering MNC Layer1 s: ?: |6 G" @0 J
1891102 ALLEGRO_EDITOR MULTI_USER Rejected by server error messages when using Symphony Team Design
6 t; O v3 z- a# P" }( s' h1928082 ALLEGRO_EDITOR MULTI_USER Unknown SubClass BOUNDARY/MULTI_USER_LOCK automatically added when defining Artwork Output.$ U6 G% l1 ]" r; R" Q
1976705 ALLEGRO_EDITOR MULTI_USER Symphony client disconnects from server without any notification - despite ping mechanism
& y4 ~2 R$ {/ b5 v, v1972554 ALLEGRO_EDITOR NC Mill symbol moved from Nclegend-slots-1-2 to Nclegend-1-2 subclass if nc_param.txt not present
4 R( t0 ]5 y6 n, t( u1914412 ALLEGRO_EDITOR OTHER Autosilk lines do not clear padstacks that are not rectangular
* v! m) R; H) Q9 A1921933 ALLEGRO_EDITOR PAD_EDITOR column clearance cannot reset to 0 in padstack editor
7 V6 m( d: h$ P! [; m: |- s1922234 ALLEGRO_EDITOR PAD_EDITOR DBDoctor reports 'illegal value for pad' and does not fix when zero corner radius for Rounded Rectangle is defined; X6 B2 n) g7 E
1932183 ALLEGRO_EDITOR PAD_EDITOR Drill Symbol information not exported in Padstack XML if Drill Figure in none
. y( e# x, e7 M7 Z" B2 [1934880 ALLEGRO_EDITOR PAD_EDITOR Shapes with offsets not displaying properly in Padstack Editor views
! ?9 @& C' h& i1813270 ALLEGRO_EDITOR PLACEMENT When a place replicate module is updated, the vias used in thermal pad are removed
. E# s* Q- h1 W. G) v" n7 B$ B1840275 ALLEGRO_EDITOR PLACEMENT Placing component with the Mirror option causing display problems
& K" b, s1 ? \4 l& H0 n, I1854099 ALLEGRO_EDITOR PLACEMENT Align components to zero spacing causing mirrored components to overlap
: v" n" }9 L r# \1854696 ALLEGRO_EDITOR PLACEMENT Pins shown incorrectly when the Alt Symbol and Mirror commands used consecutively: g% {5 v7 y2 G4 A
1862863 ALLEGRO_EDITOR PLACEMENT Too many messages in the command window when symbol does not support mirroring: k2 I5 r1 m9 q, L( ^
1909857 ALLEGRO_EDITOR PLACEMENT Using Mirror with Alt Symbol placement displays incorrect graphics
" {( }9 r f, X% l# i! {+ F1917128 ALLEGRO_EDITOR PLACEMENT Place - Autoplace - Room when all the components of the room are placed on board causing crash2 D6 Z3 |/ V. v5 C) y
1925144 ALLEGRO_EDITOR PLACEMENT PCB Editor stops responding on using the Autoplace - Room command0 F0 s# m" e8 r: L( p. }
1961509 ALLEGRO_EDITOR PLACEMENT PCB Editor crashes on choosing Place - Autoplace -Room: x3 O0 J9 h1 {7 i% C1 U
1930669 ALLEGRO_EDITOR REPORTS Net 'VSS' not included in the Etch Length By Pin Pair Report
8 X/ T( I2 Z6 p& w3 B% v1982934 ALLEGRO_EDITOR SCRIPTS PCB Editor stops responding if Generate button is used to create script from journal file
, m+ R0 U4 }7 b! s, T+ X" G; s1337346 ALLEGRO_EDITOR SHAPE Shape Check is generating problem point errors that seem unnecessary
9 v2 Q2 A8 m0 R3 k: M! r& ]1396692 ALLEGRO_EDITOR SHAPE Zcopy with expansion not following board outline
' Q e4 O2 O$ f' R% f# q, [# s: X1902001 ALLEGRO_EDITOR SHAPE Shape behaving differently across hotfixes0 O( x9 V4 [; S# p/ o2 T" r, `# H* g
1921287 ALLEGRO_EDITOR SHAPE 3D canvas is showing some stray objects7 _/ T8 u, v. | z% n5 T
1936482 ALLEGRO_EDITOR SHAPE Option for Fillet to not obey NO_SHAPE_CONNECT Property
- T+ K1 c4 a! p9 b1943899 ALLEGRO_EDITOR SHAPE Only one Shape to Route Keep In DRC in release 17.2-2016 compared to two in release 16.6
u& v: K1 F% q* \6 ~( X1944041 ALLEGRO_EDITOR SHAPE shape_rki_autoclip makes shape voiding incorrect, w+ l; {5 z8 j7 d4 b2 |
1947675 ALLEGRO_EDITOR SHAPE Shape void error when dv_squarecorners is enabled0 L' i" R$ g1 d" Y0 D
1949250 ALLEGRO_EDITOR SHAPE Shapes are filled even after raising and lowering priority
0 v" j) e, F* v6 z4 j1984526 ALLEGRO_EDITOR SHAPE Same net shape voided is inconsistent with respect to vias
, N% }$ ?6 ~* l. Q1984955 ALLEGRO_EDITOR SHAPE Dynamic shape creating same net spacing drcs.
: x1 ?& F* M) K0 g1839147 ALLEGRO_EDITOR SKILL axlDBGetLength() reports that the segments of a filled rectangle shape are invalid database ID arguments$ h( {# X$ K' L6 S. U& @
1882776 ALLEGRO_EDITOR SKILL SKILL documentation for axlIsBetween() is wrong6 ?( U# A* v/ Q( p3 m" L
1882882 ALLEGRO_EDITOR SKILL Example for axlMathConstants needs correction in Allegro SKILL Reference+ G+ L/ W+ c- X) Z; R+ G8 U
1902712 ALLEGRO_EDITOR SKILL axlAltSymbolReplace moves symbol to the top of design while replacing
: K' v( r( a" F' P+ B! M1906329 ALLEGRO_EDITOR SYMBOL Mechanical Pin to Conductor property set on a pin in a symbol does not pass to the board4 A5 Z; b+ R; s+ ]2 H1 g$ u( r; v
1911343 ALLEGRO_EDITOR UI_FORMS Global Visibility not turning all layers off" o- b; i1 Y8 J; z1 g
1985584 ALLEGRO_EDITOR UI_FORMS Import logic changes the Current Working Directory- G. G; |6 s; u# A
1987829 ALLEGRO_EDITOR UI_FORMS Import logic changes the current working directory6 v* j9 _8 T* w" x% G+ _9 h+ M
1992722 ALLEGRO_EDITOR UI_FORMS After netlist import process, the board file is changing its current path
% P8 ]; D7 p) A3 v) ^1697506 ALLEGRO_EDITOR UI_GENERAL Stroke Editor working in OrCAD PCB Editor of release 16.6 does not work in release 17.2-2016
3 T, b0 |: t5 `' c8 `% F( |1702631 ALLEGRO_EDITOR UI_GENERAL Etch Length by Net report does not list correct net name for nets in a bus# ~0 L/ R. i7 f4 {8 w1 [1 y7 B8 Q. Q
1703105 ALLEGRO_EDITOR UI_GENERAL Bus net names are incorrect in reports when using the allegro_html_qt variable
$ m5 \) [# v' W1770786 ALLEGRO_EDITOR UI_GENERAL Stroke Editor working in OrCAD PCB Editor of release 16.6 does not work in release 17.2-2016 h6 N2 H- i& X
1784938 ALLEGRO_EDITOR UI_GENERAL Etch Length by Net report does not show net names with angle brackets in release 17.2-20161 V3 v5 e+ n7 N/ n" f" B3 ~
1822557 ALLEGRO_EDITOR UI_GENERAL axlUIWCloseAll is not closing text window in release 17.2-2016% v- w3 u$ |% {
1836400 ALLEGRO_EDITOR UI_GENERAL Net names are truncated in HTML reports
, B% ~) |% k/ y D1869879 ALLEGRO_EDITOR UI_GENERAL Links not working in the Net loop report# D- Q. z1 N5 C' M2 D
1895878 ALLEGRO_EDITOR UI_GENERAL axlUIWClose()/axlUIWCloseAll() functions do not work when allegro_html_qt setting is enabled.5 S5 K: Z- n" e5 H$ ?$ T
1912282 ALLEGRO_EDITOR UI_GENERAL PCB Editor exits with error message on editing objects
" x1 r7 B+ ~% T1913962 ALLEGRO_EDITOR UI_GENERAL PCB Editor toolbars change on choosing View - UI Settings - Save Settings and then restarting- ^- x7 n8 j0 Q( K* i; n" W
1933172 APD UI_GENERAL Cannot paste text into the command prompt without clicking when 'enable_command_window_history' is set
% [/ b- |* o5 C4 G. _1843712 CAPTURE NETGROUPS Signals shown only for first segment of NetGroup
7 v* [4 c4 m+ }9 l: P% t5 f1917768 CAPTURE NEW_SYM_EDITO Missing package pin overview in Symbol editor
4 y. m, |" E( d" Q& T$ R6 Z" o0 S$ L1920088 CAPTURE NEW_SYM_EDITO Package view missing in the new Symbol Editor
/ i3 t# l, S# X; w F* n! C% i3 h& O1922196 CAPTURE NEW_SYM_EDITO Snap to grid issue in Symbol editor
/ l. K1 W. I6 M' x) ^6 C1927268 CAPTURE NEW_SYM_EDITO View Package is grayed out in release 17.2-2016, hotfix 038 and later versions; I* t# a( E! {6 ]' ^9 |% `
1928012 CAPTURE NEW_SYM_EDITO In new Symbol Editor, View - Package is grayed out
$ s8 c3 X5 [/ J! G1930865 CAPTURE NEW_SYM_EDITO View Package missing in hotfix 038% m3 a! R8 l: F0 j) P6 y0 v L
1938507 CAPTURE NEW_SYM_EDITO Issues with new Symbol Editor: Justification and spreadsheet usability+ Z7 q) \9 H/ i) E- S. z
1940869 CAPTURE NEW_SYM_EDITO Missing pins in 'Edit Pins of All Section' table view for 4k resolution but not in 2k resolution
* x3 c5 d6 d0 z1940888 CAPTURE NEW_SYM_EDITO Copying pins from a part and pasting on different parts not working properly.
. l, i" \6 {( \! M1 C* ~$ i. |. C& u4 z1942994 CAPTURE NEW_SYM_EDITO Cut / Paste of object in New Part / Symbol editor always pastes on grid
( o0 i E8 w* q1944396 CAPTURE NEW_SYM_EDITO JavaScript error while copying from 'Edit Pins of All Sections'
! i- K" y1 n7 m$ V1950224 CAPTURE NEW_SYM_EDITO Cyrillic alphabets are not displayed properly on Schematic.; A4 r" C% R7 y- M* a
1951369 CAPTURE NEW_SYM_EDITO Cancel closes Symbol Editor' }8 M- W7 p3 i: D+ I: i
1966785 CAPTURE NEW_SYM_EDITO Edit Part is grayed out0 j' _6 B" |0 A* t
1973135 CAPTURE NEW_SYM_EDITO Issue with new Symbol Editor: cannot copy-paste pins! x6 U3 A, O( N, S4 t; M
1973344 CAPTURE NEW_SYM_EDITO JavaScript error on opening part from design, v$ k1 v8 t% j. [
1974122 CAPTURE NEW_SYM_EDITO Cannot copy-paste all pin list on the new Symbol Editor4 j Z. n0 x& ~8 M! H9 @4 T+ W
1983593 CAPTURE NEW_SYM_EDITO Script error on copying and pasting to property sheet2 `6 X" g( w+ ?( [. c" W8 d
1929692 CAPTURE OPTIONS PACK_SHORT issues with Pin Numbers that contain letters/alphabets" w! H. T2 d1 \0 t6 u
1876939 CAPTURE OTHER Incorrect Capture renaming error (ORCAP-1310)6 ^7 R4 G, b: T6 r
1916090 CAPTURE OTHER Incorrect error message when 'save as' fails due to long directory path, l/ { u3 ~0 ~: r# I$ R
1921927 CAPTURE OTHER Two functions are mapped to Shift + R in OrCAD Capture in hotfix 0389 M8 S) \/ ]1 h# Q- o" P
1946453 CAPTURE OTHER Shift+R shortcut is assigned to two functions.+ A1 w1 w. N" Y5 X8 n
1965456 CAPTURE OTHER Shortcut Shift + R is not opening the Independent Sources dialog box
* r' ?) R' H F3 E# N1 }' f1968757 CAPTURE OTHER Close CIP is grayed when right-clicking on the tab in Capture. w5 P- F% l2 l/ G+ x5 T
1938437 CAPTURE PART_EDITOR OrCAD Capture new Symbol Editor Pin Type missing in table
8 ?' p4 m# r- q1906757 CAPTURE SCHEMATICS Intersheet reference is overlapping with the offpage connector name
0 O( F0 ~. a# C; b* z- o% G( K1867016 CAPTURE SCHEMATIC_EDI Part placeholders not being positioned when moved- K0 k! |% t' R
1932837 CAPTURE SCHEMATIC_EDI Parameters graphics are not correctly positioned
0 J$ W" B8 J3 I" F1949518 CAPTURE SCHEMATIC_EDI Getting error when comparing designs
. {2 T9 `0 Z9 _1 r1967545 CAPTURE SCHEMATIC_EDI Only section A of heterogeneous part being placed and not sections B, C, or D0 X8 z t9 s! l6 i9 f
1933919 CIS DBC_CFG_WIZAR New CIS Configuration .dbc file created in release 17.2-2016 shows release 16.3
) D+ k5 T5 s" U X( v1932550 CIS RELATIONAL_DB VIEW NAME in Relational Database configuration is not working as expected.
' X9 D0 x& ?+ g7 Q. e& w. r5 b1832524 CONCEPT_HDL CHECKPLUS Default checkplus rules show body height of 0 (sym_2 of the attached cell). This causes the cell to fail verification.( _" \9 V* C o5 T7 T4 T
1912023 CONCEPT_HDL CHECKPLUS signalWidth predicate does not recognize SIG[1..0] as bus.: o/ w* H% F# j5 E
1966120 CONCEPT_HDL COPY_PROJECT Copying release 17.2-2016 project results in message stating the project is of an older version5 R+ d; \7 d- a" I+ E
1879425 CONCEPT_HDL CORE Adding signals with the right-click menu is not following the defined color scheme
- ^' x z1 ]- V3 q1 b; b' p1 ^3 S1890542 CONCEPT_HDL CORE Getting ERROR(SPCOCN-1911) when running export physical with backannotation7 G* G$ c) ]2 G1 ]0 u( j9 A
1907684 CONCEPT_HDL CORE Moving symbol makes canvas unresponsive for a long time
# k* Z. ^$ L: n1920711 CONCEPT_HDL CORE Pin names changes when mirroring the swapped section.3 W9 }! Q3 Q) Y. F# E
1931421 CONCEPT_HDL CORE On Linux, 'cpmaccess -read' returns incorrect value
; x0 Y$ |" y, x1931782 CONCEPT_HDL CORE Setting DONT_FORCE_ORIGIN_ONGRID to ON does not work for sig_name
. G3 u7 x" ?7 n1932433 CONCEPT_HDL CORE _movetogrid causes signal disconnection+ {( m. p3 H" A: [. m2 {8 u3 W
1946993 CONCEPT_HDL CORE DE-HDL Part Manager fails to update parts on schematic if new KEY properties exist in PTF but not in schematic9 `# T* R& D$ v7 E' l1 q) Y S' S
1947029 CONCEPT_HDL CORE Design Entry HDL Font Support not working for signal rename9 B8 B* @7 |$ j: k- i4 X2 @# m
1962865 CONCEPT_HDL CORE Schematic symbol creation with '-' as pin name not packaging: X1 e7 Q3 q. L# k6 q( g; L) `& j+ {
1966805 CONCEPT_HDL CORE Issues with packaging design containing cells named with a leading underscore$ I, k4 I8 t, b+ u& i. k& U
1967760 CONCEPT_HDL CORE DE-HDL crashes on moving Net Group/Port in release 17.2-2016, hotfix 044
& N& Q2 ^; L2 ^" \2 p. [1968282 CONCEPT_HDL CORE DE-HDL Part Manager fails to update parts on schematic when new KEY properties exist in PTF and not in schematic
L& i1 S4 l! U! d1972815 CONCEPT_HDL CORE Part Manager not updating missing key attributes from the ptf file by using 'Update instances' option5 }2 {! v X5 C4 n9 Y4 h
1887790 CONCEPT_HDL CREFER CRefer links not working in selected cpm file# c/ l8 @# e/ {
1898535 CONCEPT_HDL INTERFACE_DES Global Navigation window does not reflect removal of a net on page2 that is part of a netgroup on page1
9 ~% [+ d. Z. }7 x1888048 CONCEPT_HDL PDF Japanese characters are not output correctly to PDF on Linux.* n6 O2 `& I; e9 e
1937505 CONCEPT_HDL PDF Missing intersection dot in schematic PDF
3 ?9 m# t% N7 _8 G: o: d$ F9 j1942486 CONSTRAINT_MGR CONCEPT_HDL CM crashes when you save after importing a TCF file8 y. O# Q& v/ m+ x9 ? D
1983743 CONSTRAINT_MGR CONCEPT_HDL Region Class-Class members are being duplicated in CM in the current session
7 v5 z7 V4 O6 d7 @ @! c& T* N1906573 CONSTRAINT_MGR ECS_APPLY Database corrupt and DBDoctor reports illegal database pointer error( _( [* H, q! ~2 `- W! N) ~
1913805 CONSTRAINT_MGR OTHER Setting environmental variable CM_PARTIAL_DCF in release 17.2-2016 causing crash$ N7 G$ q9 Q" l" x
1914813 CONSTRAINT_MGR OTHER C++ Runtime error and non-recoverable crash in class-class worksheet8 N' D# d% D5 r4 ]
1920142 CONSTRAINT_MGR OTHER Xnet names are not consistent in the design$ t8 M+ i$ D! l
1898549 CONSTRAINT_MGR SCHEM_FTB Importing netlist causing crash in release 17.2-2016, hotfix 0361 o/ g- D) e5 e. [. @' [9 F
1814851 CONSTRAINT_MGR UI_FORMS Field solver /DRC check running forever4 w3 b, a* ` O* W
1889862 CONSTRAINT_MGR UI_FORMS PCB Editor hangs while assigning net voltages in CM
_1 }5 }0 U+ c) t1965470 CONSTRAINT_MGR UI_FORMS Constraint Manager GUI Issue in release 17.2-2016, hotfix 039: Font size small and rows/columns in shrink mode0 _6 E6 ?2 {: N4 E9 B$ q
1945406 ECW ADMINISTRATIO Tree view was not refreshed soon after changing the site permission.( e6 ^' {. q1 F
1826848 ECW METRICS SPDWECW-551 and SPDWECW-553 should be warnings, not errors7 v4 K3 p2 w5 ?- j
1933373 ECW PROJECT_MANAG ecwbatch does not accept password and does not ignore invalid users
' U2 w( i2 x/ X: }1921502 F2B PACKAGERXL Errors on running Export Physical:SPCOPK-1138 and SPCOPK-1149
0 U% J7 E* A& i. e6 [4 Y! S1929846 F2B PACKAGERXL PackagerXL is still creating the pstcmbc.dat file on a release 16.6 design uprevved to release 17.2-2016
1 P& T/ M8 U) d5 j% T" ?3 {! A1953780 F2B PACKAGERXL Updated subdesign package information not updated on the top-level design in the reuse flow
: ?5 m' ?7 b, n0 U: a! G4 W1971738 F2B PACKAGERXL Deleting blank space from pstxnet.dat file crashing DE-HDL
! I k+ k! P1 S" B+ l1891002 INSTALLATION DOWNLOAD_MGR Issue with Download Manager (Change Preferences Option does not Work)
. ]0 \5 Y6 K7 n( M$ T- j1972890 ORBITIO OTHER OrbitIO-APR failed to run if PCB design included
& ^, ^# F+ q9 `1954262 PCB_LIBRARIAN CORE Footprint model check in fails with verification checks failed error
$ \! ^$ n3 X6 x0 P8 Z/ B9 [1943656 PCB_LIBRARIAN GRAPHICAL_EDI Symbol Editor is blank if .ascii file is newer than .css file1 U6 B% y& B% e& D! h( v
1897887 PCB_LIBRARIAN SYMBOL_EDITOR New Symbol Editor: Inconsistent symbol results when adding vector pins in Part Developer- B6 l; z% E; C) Q1 s7 K- L0 X# u' R
1898003 PCB_LIBRARIAN SYMBOL_EDITOR Issue with Page Border Symbol
4 ?1 y5 R- L4 c" U$ ]1842007 PSPICE LIBRARIES Change required in swit_reg.lib
4 W6 p! W- |4 v$ L1906922 PSPICE LIBRARIES Mismatch in mapping of IC pins in model and PSpice template for analog device AD81380 ?# O. ^& E7 r& c
1947586 PSPICE LIBRARIES Update the model AD8138/AD in ANLG_DEV.OLB
7 @/ f, N' j, e% p5 U& U) N1748470 PSPICE MATLAB PSpice displays an error when sending current in co-simulation
2 j! s5 }/ i: B1802455 PSPICE MATLAB Incorrect current direction for pins in SLPS flow1 T3 g$ x+ R" i7 t& e- o
1852811 PSPICE MATLAB ORPSIM-2604 being reported in SLPS simulation" M! ], O- c: j& j
1858716 PSPICE MATLAB Co-Simulation fails if 'RC' is used as reference of resistor5 `' v. s7 T5 ^
1921641 PSPICE MODELEDITOR Model Editor in Client Server installation slow to invoke& F7 m. _8 u5 Z4 \* ?; x& A
1922160 PSPICE MODELING_APPS New Capture Associate Symbol GUI not reading libraries" a1 I! T8 ]2 W i' B
1843698 PSPICE PROBE PSpice icons appear very small on a specific computer/ i r' A; M" n# [! l
1773841 PSPICE SIMULATOR orSimSetup64 crashes when running the simulation for attached design
, Z8 ^! {6 |1 P5 u1816316 PSPICE SIMULATOR Simulation stuck; however, the status bar is correctly updated during Pseudo Transient Analysis$ I+ |2 c# l V6 W9 t0 f
1887119 SCM IMPORTS Cannot selectively update changes in VDD
% X" ^; V; `' r3 `& q* w1889362 SCM IMPORTS Cannot selectively update changes in Visual Design Differences T2 \1 B5 Q9 _( F. A$ ]9 G5 |
1958545 SCM SETUP Auto assign models does not work in SCM same way as in DE-HDL
" `5 U" B5 _! m: F7 z1988841 SIG_EXPLORER INTERACTIV SigXplorer stops responding or crashes in hotfix 047 when a design is saved
& j7 l- K* [+ v/ b% y% p1988943 SIG_EXPLORER INTERACTIV SigXplorer crashes on selecting Update Constraint Manager
. i7 t# Q, V' r- {8 T( Z% P1991375 SIG_EXPLORER INTERACTIV SigXplorer crashes when clicking Save
S/ Y4 t( c! _9 I* e1993749 SIG_EXPLORER INTERACTIV SigXplorer crashes on saving topology# ^# Y5 S( P* \% h
1969975 SIG_INTEGRITY GUI Model Browser edits model above the one that is selected( U8 z, q( Z0 |; m! O' O% K
1953184 SIP_LAYOUT IMPORT_DATA Sub Drawing not saving dashed lines _5 ^# O2 A' @, e$ k; p( h
1913864 SIP_LAYOUT ORBITIO_IF SiP Layout design import results in wrong die rotation; E+ m' _- n; Y
1880237 SIP_LAYOUT PADSTACK_EDIT Background Window comes to the forefront when closing the Padstack editor
0 Y9 h% E+ I( Q ]3 }1972560 SIP_LAYOUT STREAM_IF GDS Export fidelity issue: inverted arcs
\: j5 K- J4 a% z g4 f& ]6 @9 B1920317 SIP_LAYOUT THIEVING Thieving pattern does not allow for OOPS operation# M$ {$ M! o) @4 M+ j% g1 t9 [7 Y$ I" ~
1909075 SYSTEMSI DOC SystemSI PBA channel and circuit simulations do not respond if bit pattern is 1s or 0s. c0 k" S# o/ g% E4 I
1916101 SYSTEMSI DOC Lack of stimulus in file causes Serial Link Analysis to become unresponsive
2 @) p7 m' _- O2 d2 |% [1919562 SYSTEMSI ENG_PBA SystemSI generates wrong timing bathtub curves in channel simulations for write and read
/ s$ E- `" j" p1 q9 F% I1964064 SYSTEMSI GUI_PBA Able to sweep AMI parameters in SSI-PBA6 a( s, p6 }8 Z W# t& {9 v* r
1971266 SYSTEMSI GUI_PBA MCP header shows only 49 ckt nodes instead of 52 for s52p S-parameter file2 f8 V9 @7 A. `, G0 X( ~7 m3 K
1885625 SYSTEMSI GUI_SLA Manage AMI + DLL from Setup Analysis Window2 W1 k) ^$ V* }) I2 ]! u. o
1924382 SYSTEMSI GUI_SLA Data Rate field in SystemSI Stimulus property form is confusing for PAM4 operation
( k7 L( d; E+ Q# w8 Q+ u/ t1982341 SYSTEM_CAPTURE CANVAS_EDIT Signal rename does not maintain new signal name value8 u. j- a1 k, {7 L
1976857 SYSTEM_CAPTURE CONSTRAINT_MA System Capture-CM Match Group Creation is not updating correctly
2 w. p0 l1 ~ l4 y# g1929606 SYSTEM_CAPTURE DESIGN_CORRUP Opening design causes System Capture to crash* O/ x* H8 [( p3 d9 ~- F* v% i( c
1914697 SYSTEM_CAPTURE DRC Overlapping component DRC does not work5 k1 i2 Z6 f' I4 X. Z& r! e# ]& ^1 s# |
1973467 SYSTEM_CAPTURE IMPORT_PCB System Capture Import Physical shows many component and physical differences on a design that is synced up' g1 P4 Q3 v3 T2 i
1962603 SYSTEM_CAPTURE NAVLINKS Ability to not underline hyperlinks for Navigation Link values$ l" S, x- {# V8 U) l
1967639 SYSTEM_CAPTURE PART_MANAGER Part Manager does not open in System Capture for part property value changes even after setting the cpm directive.
1 W2 `. [4 K0 h( c& l# Y9 @, A1964388 SYSTEM_CAPTURE SMART_PDF Some shapes are not visible in the smart PDF schematics
! j& `- {' C# A( I7 Q7 L K1976832 SYSTEM_CAPTURE TDO Rolling Back local lower-block requires check-out of higher-level packaged & variant views x* e m9 Z. n, W; [, l2 {+ ~6 A
1976844 SYSTEM_CAPTURE TDO CM - TDO check-out dependencies are broken
* g* ^1 h" R H+ e: C1976859 SYSTEM_CAPTURE TDO Variant Editor in System Capture -TDO allows to delete a variant without checking out variants view" G g& e6 l- O: J I/ `
1839816 TDA CORE All the design objects are locked in the EDM dashboard after a DSFrame error7 N ^6 \ N: u
1889898 TDA CORE Cannot check in the top level of the project in TDO8 `( p3 [2 ~& Q* |) Z+ o1 ^3 X
1892411 TDA CORE Unable to undo the block checkout if something fails3 z8 I0 x- m D" ]: U8 y
1877757 TDA DEHDL Refresh Hierarchy does not show latest TDO lock/unlock status in DE-HDL
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