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本帖最后由 i4dm99 于 2018-10-24 10:05 编辑 ' i7 ^/ Z8 n3 j
- `; a6 v z% w' ?* L感谢分享,能共享一下都更新了哪些内容吗1 C6 V% F6 |" t- x& o6 t' Y2 q" o
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Fixed CCRs: SPB 17.2 HF0487 I4 r- F) x R
10-13-2018+ P: W' D! z, m
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CCRID Product ProductLevel2 Title
# ]' l; H+ H( L3 O========================================================================================================================================================* w! L1 K. k! o2 d0 A- G2 d
1913039 ADW ADWSERVER EDM Library Server exits with error message on starting library server service# C; o2 s& n8 L# h% [; B
1709155 ADW COMPONENT_BRO Search query does not search for all the parts in the library h" ~7 @$ c9 K: H) O
1827231 ADW COMPONENT_BRO Clicking the 'a' key in Part Manager launched from DE-HDL crashes DE-HDL
4 x2 Z) t3 ]) t& H* @8 u1903818 ADW COMPONENT_BRO Parts that have comment_body do not display version' p1 t! I) C6 r" Y
1917961 ADW COMPONENT_BRO Component Browser PPL column values are truncated when selecting the top '*' filter6 c: H% `% N9 a& y! A$ i6 q& Y
1938172 ADW COMPONENT_BRO Symbol version with COMMENT_BODY set to TRUE cannot be instantiated
# y+ V9 z. ]7 [, w# y* A E3 U1914103 ADW CONF conf creates incorrect path in fetch_dump.ini when MLR is enabled.
6 @4 Z( e- n+ X1911422 ADW DBADMIN RuleP101 - PACK_TYPE check against schematic model not working
0 P3 Z j# t+ k. C H1926691 ADW DBEDITOR Adding a new classification and immediately trying to delete it results in errors0 u& c Y0 a2 u! Z( g% N
1926694 ADW DBEDITOR Renaming a classification and then renaming it back to the original results in error
3 A- W B3 {1 V9 Y1934870 ADW DBEDITOR Adding a new classification and immediately trying to delete it results in errors
/ ~5 u- W: u: c3 X( y) f7 X1872387 ADW DSN_MIGRATION Design Migration does not cache all used parts into flatlib/part_table.ptf
4 c8 k' x* N* E$ F l- V1254292 ADW FLOW_MGR Flow Manager Open Last Project should open last project closed
7 U# h9 ? N- P6 }4 P1281817 ADW FLOW_MGR '-proj' switch in 'pcbdw_fm' does not work; launches Flow Manager without loading any project
! L7 ^$ |" I, \5 h5 T3 N. t1727286 ADW FLOW_MGR Product options for PCB SI and Power Integrity are incorrect in the flow and tool launchers" U; `/ b) ~( Z
1875498 ADW FLOW_MGR EDM fails to open or becomes unresponsive.
( D5 U6 w( ^" }& x1879386 ADW FLOW_MGR Unable to access COS with the default Firefox version in the 17.2 installation
1 j k& Y7 s, B1922541 ADW FLOW_MGR Warning message for unavailability of Java version appears on opening a project on Linux
8 G& z2 K. `. e6 {6 r& y1945451 ADW FLOW_MGR Checklist does not work with two-byte characters( Z0 X5 Y$ Q1 W$ w
1956213 ADW FLOW_MGR Not able to invoke Flow Manager on the remote system
& A2 D8 o3 D: ]6 p6 R1 o. c1892285 ADW LIBDISTRIBUTI Symbol not consistently available in 16.6 ADW Library
4 G) E/ [& N9 r5 D1961731 ADW LIBIMPORT libimport fails to create tar for two Capture models
0 F1 W! | N' i4 N" u/ V1 x1836620 ADW LRM Library Revision Manager crashes on clicking Help3 X |+ c0 ^* U. k' d% h; G
1961845 ADW PART_BROWSER Error regarding environment variable
X& }* o- X' b" e1 ]! i$ o1890782 ADW TDA Launching TDO dashboard connected to PLM returns a license error+ N' e+ j( W6 B8 | t. j7 @
1980914 ADW TDA Cannot start Design Entry HDL and Component Browser in a TDO design" A- _% z3 X' Q4 V7 C/ T2 H# D
1833750 ALLEGRO_EDITOR 3D_CANVAS Soldermask Text is not shown in 3D Canvas- A* ~2 f$ ?$ x# E( ?. D8 |
1891230 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas Viewer not bending PCB with proper radius
: l4 {$ [+ W7 u6 b6 X1 j4 I1913338 ALLEGRO_EDITOR 3D_CANVAS STEP models missing from exported .stp file, E. r. A, ?0 g; ~% l
1927507 ALLEGRO_EDITOR 3D_CANVAS Get Error: All bend operations are disabled due to licensing and/or DLL installation issues on invoking 3D Canvas
. l+ k* |7 w& a' @0 [2 ? N+ Z7 L+ d- ]1931508 ALLEGRO_EDITOR 3D_CANVAS Place Bound Bottom is displayed on Top, when dra is opened in 3D Canvas
1 g$ m9 B' m, f7 }1943060 ALLEGRO_EDITOR 3D_CANVAS Placebound bottom is not showing correctly.9 B7 V- \% ?! b3 D" d- K
1950099 ALLEGRO_EDITOR 3D_CANVAS Place Bound Bottom is displayed on Top, when dra is opened in 3D Canvas& Q6 y; L5 j% a& c* F; ~/ g
1988307 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation, Z1 f% A6 g! ~- U2 t( b9 d. f) A/ t3 y
1923585 ALLEGRO_EDITOR ARTWORK Additional unwanted subclasses appear in film control when a new film definition is added
' f) W8 s: s" X9 W% L* }1944079 ALLEGRO_EDITOR COLOR Export of Board Parameters (Net Colors) does not contain entries for nets with spaces$ V# c) H; [* [+ q% G& t- s2 L
1856320 ALLEGRO_EDITOR DATABASE Donut pad fails to connect with cross-hatched shape in full contact thermal mode, despite hatch overlap of donut.
2 ]8 y& |9 ~: B8 y2 l; H9 \1912313 ALLEGRO_EDITOR DATABASE Database corrupted during background process
3 j: @; G1 V' \1913344 ALLEGRO_EDITOR DATABASE When changing accuracy of design, the thermal relief for donut pad's outer pad connects to inner pad
5 E# W) Q8 \# Q( D" O7 t1914470 ALLEGRO_EDITOR DATABASE Release 17.2-2016: export libraries command does not inherit posi/nega information4 c) N: Z# ~2 B! C/ O
1932086 ALLEGRO_EDITOR DATABASE Unable to resolve DBDoctor error3 c& K v: P; |' B
1963932 ALLEGRO_EDITOR DATABASE DB Doctor is not recognizing placed parts and showing them as unplaced.( k& j8 U' \5 Q' U/ `: R/ L8 W9 A8 u
1987735 ALLEGRO_EDITOR DATABASE Interior sub-lamination backdrill holes are displayed with Top Soldermask pads where backdrill does not exist) R# x5 u: O( Y9 t" L J5 X6 Z; W
1977622 ALLEGRO_EDITOR DFM Not able to add value '5' or multiples of 5 in in DFF constraints for maximum stacked via count. o0 g4 v7 W7 b
1892809 ALLEGRO_EDITOR DRC_CONSTR NODRC_ETCH_OUTSIDE_KEEPIN property is not working on TEXT) {1 c" H1 _2 i m# P+ \7 v- u
1894765 ALLEGRO_EDITOR DRC_CONSTR DRC for no_drc_component_board_overlap is not created if the place bound is outside Place Keepin% R* q, A: A4 |) o+ Y
1896627 ALLEGRO_EDITOR DRC_CONSTR Moving components takes long time while doing placement
. L) m$ {) J9 ?1 o4 U {; ~1914591 ALLEGRO_EDITOR DRC_CONSTR Spacing constraints for Mechanical to Hole shows resolved constraints different from the actual air-gap/space
: x6 ^" S2 s1 F& w6 ], q1956468 ALLEGRO_EDITOR DRC_CONSTR DRC getting generated while moving the uvia and getting removed after updating DRC.
5 A0 e- D# D" Z% R1884149 ALLEGRO_EDITOR EDIT_ETCH Arced Routing of differential pair creates unexpected arc radii
' v% ?" q2 c2 O% F1891985 ALLEGRO_EDITOR EDIT_ETCH Etch edit does not follow the constraints0 p1 Z1 _$ m5 a0 j" N$ u' t
1860056 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes on right-click after choosing the Move command3 w* g! K- b9 X& |7 e$ v4 R
1860723 ALLEGRO_EDITOR GRAPHICS APD crashes on right-click when using the Move command
8 v% a7 q/ b1 J1870058 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes when using Place Manual -H command3 ]* h" j+ w/ n
1930282 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes on executing axlVisibleDesign(nil) from allegro.ilinit
9 e, d; H$ x5 H+ Z- [( d( l( o1882813 ALLEGRO_EDITOR INTERACTIV Unable to set the end point with 'snap pick to' when adding an arc
$ Q; b! R, j8 n5 |* p3 D) Z6 l1884725 ALLEGRO_EDITOR INTERACTIV Edit and Move vertex operation not working as desired( J( S( h: z* G) ~6 J$ j& U- `& ^0 q2 M
1902359 ALLEGRO_EDITOR INTERACTIV Connector boundary remains ON for a layer if visibility toggles in Shape Edit application mode
, _$ {) |0 I6 ~1 D$ w, v1909004 ALLEGRO_EDITOR INTERACTIV Parameter description showing wrong for Padless Holes under Design Parameter Editor
/ u0 S' ~' e) `/ f; f6 E( Q3 w1912055 ALLEGRO_EDITOR INTERACTIV PCB Editor crashes on Delete By Query - AutoSilkscreen - Find By Query
- `4 g) t* S p. e1924503 ALLEGRO_EDITOR INTERACTIV Editing shape causes PCB Editor to crash' s8 C, c9 G' T& F; U
1929614 ALLEGRO_EDITOR INTERACTIV Unable to Place Via Array when Staggered ring is selected in Global Ring Parameters." J' f2 s# }, j7 V* l3 Q
1938523 ALLEGRO_EDITOR INTERACTIV Change Shape Type message is same for dynamic and static shapes8 H* y' m$ j k' n
1940827 ALLEGRO_EDITOR INTERACTIV Irrelevant/incorrect warning message when doing Edit- Change on Clines& M: e, Q* A: X* z
1872653 ALLEGRO_EDITOR INTERFACES DXF export shows embedded layers in the layer configuration file3 V) D9 ~9 j* C/ }. ?! e
1873971 ALLEGRO_EDITOR INTERFACES IDX proposal comments are not shown when importing the IDX file into Allegro3 M& K5 y/ v* q' y8 t
1892172 ALLEGRO_EDITOR INTERFACES STEP Package Mapping form needs to be larger
% u/ t2 K& V8 z- }; ~/ P! {; `8 i* Q3 l1893311 ALLEGRO_EDITOR INTERFACES A line became two lines after import dxf# r# U, S7 ~" w! |
1937816 ALLEGRO_EDITOR INTERFACES Unit as % in Property Definition not supported by SubDrawing6 b: _. m. F" W! Y
1973084 ALLEGRO_EDITOR INTERFACES Physical library not placed if design and IDF database not matched while running
% ]7 p# ~# Z8 D% P1987526 ALLEGRO_EDITOR INTERFACES IDX import Fails to recognize SURFACE FINISHES Class
* o6 a! d8 B+ D8 s7 t4 _. v1872856 ALLEGRO_EDITOR IN_DESIGN_ANA Message displayed when creating directed groups needs to be improved4 i/ ?9 a% a7 _' A
1900832 ALLEGRO_EDITOR IN_DESIGN_ANA RTP: Return Path DRC does not check circle void correctly' l' U* t# U$ I6 \" J- z i
1935641 ALLEGRO_EDITOR IN_DESIGN_ANA Return path DRC crashes PCB Editor$ b3 i2 {! x2 h" Y2 x, v
1649465 ALLEGRO_EDITOR MANUFACT Manufacturing options are not visible in OrCAD PCB Designer legacy menu2 q" l- T' `1 j# |
1873417 ALLEGRO_EDITOR MANUFACT Autosilk fails to add line information. Only part of the line is getting copied to the autosilk layer.
+ ]& S3 X* `+ C- ^1911596 ALLEGRO_EDITOR MANUFACT Documentation Editor drill chart shows two different rows for the same slot.
5 m9 w2 c+ v+ M1 M1937721 ALLEGRO_EDITOR MANUFACT Drill figure character scaled up in GERBER( j, S& o# w* J
1957768 ALLEGRO_EDITOR MANUFACT Import IPC2581 on cross-section does not import line width and impedance
0 ?0 R4 Q0 o" s( J# g; P! @3 u1969363 ALLEGRO_EDITOR MANUFACT Pressfit connector backdrill depth is considering MNC Layer8 N! _" G9 b6 ] H, Y* y
1891102 ALLEGRO_EDITOR MULTI_USER Rejected by server error messages when using Symphony Team Design) o8 ~; a8 [9 Q
1928082 ALLEGRO_EDITOR MULTI_USER Unknown SubClass BOUNDARY/MULTI_USER_LOCK automatically added when defining Artwork Output.
* |, E" U* D( p8 n3 h0 B4 P% R1976705 ALLEGRO_EDITOR MULTI_USER Symphony client disconnects from server without any notification - despite ping mechanism7 T& M `) h+ N& ?7 S: j
1972554 ALLEGRO_EDITOR NC Mill symbol moved from Nclegend-slots-1-2 to Nclegend-1-2 subclass if nc_param.txt not present, W8 F r, _- A: f# k# ^+ P( d
1914412 ALLEGRO_EDITOR OTHER Autosilk lines do not clear padstacks that are not rectangular
0 e0 @4 w6 d9 T0 r* x0 v! e, M/ }' j1921933 ALLEGRO_EDITOR PAD_EDITOR column clearance cannot reset to 0 in padstack editor
9 D) x! Z! ]. C" z* L& B& f3 b1922234 ALLEGRO_EDITOR PAD_EDITOR DBDoctor reports 'illegal value for pad' and does not fix when zero corner radius for Rounded Rectangle is defined
2 G( E+ O1 W, b5 k, X1932183 ALLEGRO_EDITOR PAD_EDITOR Drill Symbol information not exported in Padstack XML if Drill Figure in none
- @6 v4 }; i4 H q1934880 ALLEGRO_EDITOR PAD_EDITOR Shapes with offsets not displaying properly in Padstack Editor views
' m/ ~0 f/ M% _; ?+ \3 G; C+ H$ @) l1813270 ALLEGRO_EDITOR PLACEMENT When a place replicate module is updated, the vias used in thermal pad are removed
+ w; J3 j! o. b) q1 E1840275 ALLEGRO_EDITOR PLACEMENT Placing component with the Mirror option causing display problems1 j( d4 s! H0 B x! M
1854099 ALLEGRO_EDITOR PLACEMENT Align components to zero spacing causing mirrored components to overlap0 X& }. u$ B+ j6 J1 O z& W
1854696 ALLEGRO_EDITOR PLACEMENT Pins shown incorrectly when the Alt Symbol and Mirror commands used consecutively
1 q) B; H D; `- k6 [2 b& N1862863 ALLEGRO_EDITOR PLACEMENT Too many messages in the command window when symbol does not support mirroring
5 V% [* Q9 a; H/ {( x3 W: A8 M& W0 g# {% b1909857 ALLEGRO_EDITOR PLACEMENT Using Mirror with Alt Symbol placement displays incorrect graphics8 F3 Q5 K* ?' ?: H" x/ w, a
1917128 ALLEGRO_EDITOR PLACEMENT Place - Autoplace - Room when all the components of the room are placed on board causing crash
' `4 i& j! G; y4 q2 @! J1925144 ALLEGRO_EDITOR PLACEMENT PCB Editor stops responding on using the Autoplace - Room command% d$ g$ D' a( T
1961509 ALLEGRO_EDITOR PLACEMENT PCB Editor crashes on choosing Place - Autoplace -Room
- j( q: s. h$ a! Z2 ]) w) ~1930669 ALLEGRO_EDITOR REPORTS Net 'VSS' not included in the Etch Length By Pin Pair Report
. d+ R- B3 k2 d6 D5 S. J. u$ ?1982934 ALLEGRO_EDITOR SCRIPTS PCB Editor stops responding if Generate button is used to create script from journal file8 R! J. b. d! N' c6 `
1337346 ALLEGRO_EDITOR SHAPE Shape Check is generating problem point errors that seem unnecessary+ I* E _2 `3 v/ j9 R
1396692 ALLEGRO_EDITOR SHAPE Zcopy with expansion not following board outline0 i! z' ]/ v( p5 G) b `2 }
1902001 ALLEGRO_EDITOR SHAPE Shape behaving differently across hotfixes N1 Q2 h2 a# x! T4 U6 L1 Z
1921287 ALLEGRO_EDITOR SHAPE 3D canvas is showing some stray objects
# P+ J- B$ M. G1936482 ALLEGRO_EDITOR SHAPE Option for Fillet to not obey NO_SHAPE_CONNECT Property7 z, u8 A9 P# Q! b) h
1943899 ALLEGRO_EDITOR SHAPE Only one Shape to Route Keep In DRC in release 17.2-2016 compared to two in release 16.60 Y' Q6 a$ D) g/ {4 I
1944041 ALLEGRO_EDITOR SHAPE shape_rki_autoclip makes shape voiding incorrect6 a2 D; o( }: {9 C3 Q- v- e
1947675 ALLEGRO_EDITOR SHAPE Shape void error when dv_squarecorners is enabled
- h3 t v2 Q0 \( A: ]- H2 m b1949250 ALLEGRO_EDITOR SHAPE Shapes are filled even after raising and lowering priority& v: k' C8 I5 F5 b1 p' Q
1984526 ALLEGRO_EDITOR SHAPE Same net shape voided is inconsistent with respect to vias
V* q7 N7 p) I1984955 ALLEGRO_EDITOR SHAPE Dynamic shape creating same net spacing drcs.* w7 ]3 Z& @# q) m" X. E5 V
1839147 ALLEGRO_EDITOR SKILL axlDBGetLength() reports that the segments of a filled rectangle shape are invalid database ID arguments4 ^- |9 y' Z( I" `. t8 s% x( X
1882776 ALLEGRO_EDITOR SKILL SKILL documentation for axlIsBetween() is wrong
; a+ p) K' r8 S1882882 ALLEGRO_EDITOR SKILL Example for axlMathConstants needs correction in Allegro SKILL Reference
, x/ z5 {9 Y8 x4 z6 S1902712 ALLEGRO_EDITOR SKILL axlAltSymbolReplace moves symbol to the top of design while replacing
( S' j! n; O7 ?! G; z ^1906329 ALLEGRO_EDITOR SYMBOL Mechanical Pin to Conductor property set on a pin in a symbol does not pass to the board/ H- e# m4 B2 D2 e* `3 Z( r' u
1911343 ALLEGRO_EDITOR UI_FORMS Global Visibility not turning all layers off
n/ ?! E, s; e1985584 ALLEGRO_EDITOR UI_FORMS Import logic changes the Current Working Directory
- X6 [7 l* h9 I* d1987829 ALLEGRO_EDITOR UI_FORMS Import logic changes the current working directory
3 y7 ]* b- I) l& k1992722 ALLEGRO_EDITOR UI_FORMS After netlist import process, the board file is changing its current path
/ u4 ?. c& w% K ^8 ^1697506 ALLEGRO_EDITOR UI_GENERAL Stroke Editor working in OrCAD PCB Editor of release 16.6 does not work in release 17.2-2016; m0 S: z% \4 P. O( h# o6 I
1702631 ALLEGRO_EDITOR UI_GENERAL Etch Length by Net report does not list correct net name for nets in a bus O, M, `8 G) I9 C" a3 t
1703105 ALLEGRO_EDITOR UI_GENERAL Bus net names are incorrect in reports when using the allegro_html_qt variable/ C; f, U' x, a+ l0 k
1770786 ALLEGRO_EDITOR UI_GENERAL Stroke Editor working in OrCAD PCB Editor of release 16.6 does not work in release 17.2-2016
" K0 d. k; Q3 U8 @" Z3 c1784938 ALLEGRO_EDITOR UI_GENERAL Etch Length by Net report does not show net names with angle brackets in release 17.2-2016
) N! c8 _( H7 a9 k8 E1 m/ l1822557 ALLEGRO_EDITOR UI_GENERAL axlUIWCloseAll is not closing text window in release 17.2-2016: f3 q' x; o, R8 [6 ~* H
1836400 ALLEGRO_EDITOR UI_GENERAL Net names are truncated in HTML reports
- b/ A( g' Y; f, s1869879 ALLEGRO_EDITOR UI_GENERAL Links not working in the Net loop report
: | o9 h& U- l0 B/ w$ [8 a1895878 ALLEGRO_EDITOR UI_GENERAL axlUIWClose()/axlUIWCloseAll() functions do not work when allegro_html_qt setting is enabled.# N& S. e" U- g- s' j, K
1912282 ALLEGRO_EDITOR UI_GENERAL PCB Editor exits with error message on editing objects1 p0 y" s& o b% M, n
1913962 ALLEGRO_EDITOR UI_GENERAL PCB Editor toolbars change on choosing View - UI Settings - Save Settings and then restarting
# w* S; Q( n, L1933172 APD UI_GENERAL Cannot paste text into the command prompt without clicking when 'enable_command_window_history' is set3 F* d0 f+ C' c7 c+ [
1843712 CAPTURE NETGROUPS Signals shown only for first segment of NetGroup
5 z6 A$ l/ e6 ]1 k3 J: F1917768 CAPTURE NEW_SYM_EDITO Missing package pin overview in Symbol editor+ k. d2 Z1 ^' S6 I6 m% v A
1920088 CAPTURE NEW_SYM_EDITO Package view missing in the new Symbol Editor
3 Q& y8 H @% I' c5 b1 K1 m1922196 CAPTURE NEW_SYM_EDITO Snap to grid issue in Symbol editor" T7 U0 s) o6 }
1927268 CAPTURE NEW_SYM_EDITO View Package is grayed out in release 17.2-2016, hotfix 038 and later versions5 A" o! Y. \, ]/ ?3 o7 j
1928012 CAPTURE NEW_SYM_EDITO In new Symbol Editor, View - Package is grayed out# m$ j3 X2 G+ ]; \3 b: W/ l
1930865 CAPTURE NEW_SYM_EDITO View Package missing in hotfix 038) C0 g1 E. z) L4 d3 X
1938507 CAPTURE NEW_SYM_EDITO Issues with new Symbol Editor: Justification and spreadsheet usability5 L- T9 n: D; q7 S
1940869 CAPTURE NEW_SYM_EDITO Missing pins in 'Edit Pins of All Section' table view for 4k resolution but not in 2k resolution
/ {2 k5 i$ }- M0 p1940888 CAPTURE NEW_SYM_EDITO Copying pins from a part and pasting on different parts not working properly.
- H6 L3 u" h4 m. {* g# q# c7 V1942994 CAPTURE NEW_SYM_EDITO Cut / Paste of object in New Part / Symbol editor always pastes on grid9 J" c$ W0 O; d
1944396 CAPTURE NEW_SYM_EDITO JavaScript error while copying from 'Edit Pins of All Sections'/ h+ \$ e; N& w$ g+ l
1950224 CAPTURE NEW_SYM_EDITO Cyrillic alphabets are not displayed properly on Schematic.: W9 J: q. R4 z5 K5 b7 q
1951369 CAPTURE NEW_SYM_EDITO Cancel closes Symbol Editor
& O7 V, O% H1 ~' F6 z& D1966785 CAPTURE NEW_SYM_EDITO Edit Part is grayed out
3 B! ]1 ?& c# v8 v: l% k% ^: i1973135 CAPTURE NEW_SYM_EDITO Issue with new Symbol Editor: cannot copy-paste pins$ D7 g1 z. i: s; n+ @
1973344 CAPTURE NEW_SYM_EDITO JavaScript error on opening part from design
0 A( t$ g0 f6 r/ u1974122 CAPTURE NEW_SYM_EDITO Cannot copy-paste all pin list on the new Symbol Editor. o3 R! o( j4 U, A- o* S8 E. L
1983593 CAPTURE NEW_SYM_EDITO Script error on copying and pasting to property sheet' {( F$ B4 d% ~4 C, F/ Y* r
1929692 CAPTURE OPTIONS PACK_SHORT issues with Pin Numbers that contain letters/alphabets
+ `$ u' D7 s0 m3 o' r$ @1876939 CAPTURE OTHER Incorrect Capture renaming error (ORCAP-1310)
' E; ]+ _0 p4 u* L) o j1916090 CAPTURE OTHER Incorrect error message when 'save as' fails due to long directory path0 X) f% ]/ ]* S% M. e7 u7 b
1921927 CAPTURE OTHER Two functions are mapped to Shift + R in OrCAD Capture in hotfix 0389 J7 u' Z5 s8 E, E9 B: n6 D( M
1946453 CAPTURE OTHER Shift+R shortcut is assigned to two functions.: d4 Q" q9 ~! Q9 D1 Q/ E0 J
1965456 CAPTURE OTHER Shortcut Shift + R is not opening the Independent Sources dialog box
, J7 z' e% H6 f4 \0 U) R1968757 CAPTURE OTHER Close CIP is grayed when right-clicking on the tab in Capture.
9 _- N; [" r) ? _1 [8 x0 a1938437 CAPTURE PART_EDITOR OrCAD Capture new Symbol Editor Pin Type missing in table5 L' C) H7 D! x" S
1906757 CAPTURE SCHEMATICS Intersheet reference is overlapping with the offpage connector name6 v4 S7 r6 s5 ~, z7 L2 L# v5 [/ f
1867016 CAPTURE SCHEMATIC_EDI Part placeholders not being positioned when moved1 g; R( \7 J" l. \* `! F
1932837 CAPTURE SCHEMATIC_EDI Parameters graphics are not correctly positioned
& d, m7 X% s: r9 u' }# n; S' @8 q1949518 CAPTURE SCHEMATIC_EDI Getting error when comparing designs/ V* `/ i: B: G: C
1967545 CAPTURE SCHEMATIC_EDI Only section A of heterogeneous part being placed and not sections B, C, or D. C% F& q9 p8 q: w% M
1933919 CIS DBC_CFG_WIZAR New CIS Configuration .dbc file created in release 17.2-2016 shows release 16.30 R3 d( M2 X9 o0 Q9 b$ o
1932550 CIS RELATIONAL_DB VIEW NAME in Relational Database configuration is not working as expected.
. W! ^4 d$ ^) N" @1832524 CONCEPT_HDL CHECKPLUS Default checkplus rules show body height of 0 (sym_2 of the attached cell). This causes the cell to fail verification.* m D7 I+ ^, a, W# l* D
1912023 CONCEPT_HDL CHECKPLUS signalWidth predicate does not recognize SIG[1..0] as bus.
9 w% F& A5 Q7 R! ^3 p1966120 CONCEPT_HDL COPY_PROJECT Copying release 17.2-2016 project results in message stating the project is of an older version$ D; _- O. z9 z/ J6 b* F/ i3 p
1879425 CONCEPT_HDL CORE Adding signals with the right-click menu is not following the defined color scheme2 m" |2 _, u0 m: ^+ Y \1 L
1890542 CONCEPT_HDL CORE Getting ERROR(SPCOCN-1911) when running export physical with backannotation) D" J& Y1 R2 w: X( r
1907684 CONCEPT_HDL CORE Moving symbol makes canvas unresponsive for a long time
' Z/ G' a* g/ Q6 P8 K; A1920711 CONCEPT_HDL CORE Pin names changes when mirroring the swapped section.
! H2 m$ J8 f8 y, c5 ^4 D* R1931421 CONCEPT_HDL CORE On Linux, 'cpmaccess -read' returns incorrect value; N+ x4 M, U* X& s+ I4 J
1931782 CONCEPT_HDL CORE Setting DONT_FORCE_ORIGIN_ONGRID to ON does not work for sig_name
$ I8 h. k- h0 k. h1932433 CONCEPT_HDL CORE _movetogrid causes signal disconnection! N% _. j5 i+ L5 J3 k6 M
1946993 CONCEPT_HDL CORE DE-HDL Part Manager fails to update parts on schematic if new KEY properties exist in PTF but not in schematic1 _1 w8 W1 G" n
1947029 CONCEPT_HDL CORE Design Entry HDL Font Support not working for signal rename
- V# n2 T7 W# ~' r% s4 c3 t1962865 CONCEPT_HDL CORE Schematic symbol creation with '-' as pin name not packaging, C( D8 P9 v+ U$ M" C
1966805 CONCEPT_HDL CORE Issues with packaging design containing cells named with a leading underscore
4 i& |( [! q0 q3 n: h' B1967760 CONCEPT_HDL CORE DE-HDL crashes on moving Net Group/Port in release 17.2-2016, hotfix 044+ B6 _: y( N( D5 I3 j# D; o U
1968282 CONCEPT_HDL CORE DE-HDL Part Manager fails to update parts on schematic when new KEY properties exist in PTF and not in schematic
0 b. |+ m" c0 X2 `1972815 CONCEPT_HDL CORE Part Manager not updating missing key attributes from the ptf file by using 'Update instances' option
7 M" U8 K& ^; s3 x4 T1887790 CONCEPT_HDL CREFER CRefer links not working in selected cpm file8 [4 a; a, W* E8 R8 v) ]
1898535 CONCEPT_HDL INTERFACE_DES Global Navigation window does not reflect removal of a net on page2 that is part of a netgroup on page1, B8 ~, {3 c9 {% H" s3 r: ]# s
1888048 CONCEPT_HDL PDF Japanese characters are not output correctly to PDF on Linux.
% N" {7 |4 W3 P& j1937505 CONCEPT_HDL PDF Missing intersection dot in schematic PDF
2 y' F/ \% @* F% u" p1942486 CONSTRAINT_MGR CONCEPT_HDL CM crashes when you save after importing a TCF file N/ B, K9 l+ \; I& ^6 y
1983743 CONSTRAINT_MGR CONCEPT_HDL Region Class-Class members are being duplicated in CM in the current session5 o1 }; [, l, s: f0 P) K5 @
1906573 CONSTRAINT_MGR ECS_APPLY Database corrupt and DBDoctor reports illegal database pointer error% O; N7 _% v, D& z
1913805 CONSTRAINT_MGR OTHER Setting environmental variable CM_PARTIAL_DCF in release 17.2-2016 causing crash
( \# P1 E- u, v" w1914813 CONSTRAINT_MGR OTHER C++ Runtime error and non-recoverable crash in class-class worksheet4 B8 M" _# H4 V# m6 T; C t) X( \ h
1920142 CONSTRAINT_MGR OTHER Xnet names are not consistent in the design
- i ?( y5 F( L8 R; j! \1898549 CONSTRAINT_MGR SCHEM_FTB Importing netlist causing crash in release 17.2-2016, hotfix 036
! I* e% a, ^ \3 W$ [ R: l- o/ U1814851 CONSTRAINT_MGR UI_FORMS Field solver /DRC check running forever# ?1 V! c- U" k% F- q/ @8 O
1889862 CONSTRAINT_MGR UI_FORMS PCB Editor hangs while assigning net voltages in CM
" \/ I" }# D/ @' V/ O8 k) r5 g1965470 CONSTRAINT_MGR UI_FORMS Constraint Manager GUI Issue in release 17.2-2016, hotfix 039: Font size small and rows/columns in shrink mode( D, C+ M. d) ` O3 p
1945406 ECW ADMINISTRATIO Tree view was not refreshed soon after changing the site permission., u# g+ m' L6 a* t) V
1826848 ECW METRICS SPDWECW-551 and SPDWECW-553 should be warnings, not errors
$ H" T5 n5 z; N8 j7 d, a! Y1933373 ECW PROJECT_MANAG ecwbatch does not accept password and does not ignore invalid users
" P9 B b0 Q5 u7 [& M1921502 F2B PACKAGERXL Errors on running Export Physical:SPCOPK-1138 and SPCOPK-1149
' Y! t. ~0 K/ ?) K% \( F1929846 F2B PACKAGERXL PackagerXL is still creating the pstcmbc.dat file on a release 16.6 design uprevved to release 17.2-2016- v B" k; p! E
1953780 F2B PACKAGERXL Updated subdesign package information not updated on the top-level design in the reuse flow* s% G- G, D* o7 g" ~5 e2 F1 R
1971738 F2B PACKAGERXL Deleting blank space from pstxnet.dat file crashing DE-HDL
! j& i U/ ~" S: i1891002 INSTALLATION DOWNLOAD_MGR Issue with Download Manager (Change Preferences Option does not Work)* }3 g4 {! o$ {3 |7 b1 h1 q6 x1 g
1972890 ORBITIO OTHER OrbitIO-APR failed to run if PCB design included
% D {* A3 @; v+ L; c1954262 PCB_LIBRARIAN CORE Footprint model check in fails with verification checks failed error
5 ?' N& N5 r" y# s2 f4 s1943656 PCB_LIBRARIAN GRAPHICAL_EDI Symbol Editor is blank if .ascii file is newer than .css file% P/ w& u& |" D
1897887 PCB_LIBRARIAN SYMBOL_EDITOR New Symbol Editor: Inconsistent symbol results when adding vector pins in Part Developer1 ^* l8 _. Y% v
1898003 PCB_LIBRARIAN SYMBOL_EDITOR Issue with Page Border Symbol( g* ^9 U$ f p/ ?3 k i! H5 ^7 r
1842007 PSPICE LIBRARIES Change required in swit_reg.lib
x# q; y' \0 n4 m1906922 PSPICE LIBRARIES Mismatch in mapping of IC pins in model and PSpice template for analog device AD8138
7 E; \- {# a5 d6 O4 h/ g1947586 PSPICE LIBRARIES Update the model AD8138/AD in ANLG_DEV.OLB
3 d& Z8 D2 a0 u! B; Q4 ?4 ^: s5 M1748470 PSPICE MATLAB PSpice displays an error when sending current in co-simulation
$ Z$ k/ L7 O7 f% V4 j1802455 PSPICE MATLAB Incorrect current direction for pins in SLPS flow; S5 P1 U) B v3 n4 _( c3 v
1852811 PSPICE MATLAB ORPSIM-2604 being reported in SLPS simulation# z; p& P# Q, A$ [+ H# h+ W
1858716 PSPICE MATLAB Co-Simulation fails if 'RC' is used as reference of resistor/ w2 i2 b9 ~) i: c4 K+ Q6 |. S/ D
1921641 PSPICE MODELEDITOR Model Editor in Client Server installation slow to invoke: z7 O r8 t/ N
1922160 PSPICE MODELING_APPS New Capture Associate Symbol GUI not reading libraries& J; _1 Z, V, h$ i" _$ l* q
1843698 PSPICE PROBE PSpice icons appear very small on a specific computer) N# D( }2 S7 S- M1 V. A# l1 Y
1773841 PSPICE SIMULATOR orSimSetup64 crashes when running the simulation for attached design
% X5 T, S9 f; e2 y1816316 PSPICE SIMULATOR Simulation stuck; however, the status bar is correctly updated during Pseudo Transient Analysis3 S3 u( V- o" \2 r% e
1887119 SCM IMPORTS Cannot selectively update changes in VDD; \! u' c2 [! W
1889362 SCM IMPORTS Cannot selectively update changes in Visual Design Differences! P; p; W8 o- ^5 \' |3 v
1958545 SCM SETUP Auto assign models does not work in SCM same way as in DE-HDL+ \$ ^ L% Z% r3 ^
1988841 SIG_EXPLORER INTERACTIV SigXplorer stops responding or crashes in hotfix 047 when a design is saved
2 E! K& f% g! { V2 _. |) Z0 x1988943 SIG_EXPLORER INTERACTIV SigXplorer crashes on selecting Update Constraint Manager3 @1 N. H; d) v
1991375 SIG_EXPLORER INTERACTIV SigXplorer crashes when clicking Save
' K( \. \ Q1 f% H2 _( r1993749 SIG_EXPLORER INTERACTIV SigXplorer crashes on saving topology
- a- R$ D0 E- {' W! Z1969975 SIG_INTEGRITY GUI Model Browser edits model above the one that is selected
~( Q6 C# A1 \- t- P1953184 SIP_LAYOUT IMPORT_DATA Sub Drawing not saving dashed lines4 e/ V9 Z- U( x B
1913864 SIP_LAYOUT ORBITIO_IF SiP Layout design import results in wrong die rotation
7 L7 q* u% A7 O* O. g/ o1880237 SIP_LAYOUT PADSTACK_EDIT Background Window comes to the forefront when closing the Padstack editor5 i( C% f4 v; B8 t8 e5 a
1972560 SIP_LAYOUT STREAM_IF GDS Export fidelity issue: inverted arcs( \( P H$ b$ p4 f: c, g
1920317 SIP_LAYOUT THIEVING Thieving pattern does not allow for OOPS operation
- ^ m2 F; c; N/ Z$ v1909075 SYSTEMSI DOC SystemSI PBA channel and circuit simulations do not respond if bit pattern is 1s or 0s
1 Y- G x: Q& N- K9 l r( q1916101 SYSTEMSI DOC Lack of stimulus in file causes Serial Link Analysis to become unresponsive+ ^/ O6 X% D8 u, v: V" _! M" X! C5 O& W6 E
1919562 SYSTEMSI ENG_PBA SystemSI generates wrong timing bathtub curves in channel simulations for write and read2 }6 X' y% g" N6 r* l, |
1964064 SYSTEMSI GUI_PBA Able to sweep AMI parameters in SSI-PBA. K, K* a% n( X, s! _% ~
1971266 SYSTEMSI GUI_PBA MCP header shows only 49 ckt nodes instead of 52 for s52p S-parameter file
. q8 V2 V7 v, P) U- E3 Y1885625 SYSTEMSI GUI_SLA Manage AMI + DLL from Setup Analysis Window8 M" K3 ~. ~4 U! T
1924382 SYSTEMSI GUI_SLA Data Rate field in SystemSI Stimulus property form is confusing for PAM4 operation Z# s$ L; o& w0 Z2 E
1982341 SYSTEM_CAPTURE CANVAS_EDIT Signal rename does not maintain new signal name value( p/ m' C1 r/ p( [7 S
1976857 SYSTEM_CAPTURE CONSTRAINT_MA System Capture-CM Match Group Creation is not updating correctly6 p0 b6 B) c3 m9 \9 u$ i( ?
1929606 SYSTEM_CAPTURE DESIGN_CORRUP Opening design causes System Capture to crash
; j4 V! y5 I, i1914697 SYSTEM_CAPTURE DRC Overlapping component DRC does not work
+ K$ O# [3 Q- |) o1 ~% [, R$ g1973467 SYSTEM_CAPTURE IMPORT_PCB System Capture Import Physical shows many component and physical differences on a design that is synced up
1 \, l. Z; c0 b: X6 J1962603 SYSTEM_CAPTURE NAVLINKS Ability to not underline hyperlinks for Navigation Link values9 ^' R" L% K6 t, A1 B$ f2 g
1967639 SYSTEM_CAPTURE PART_MANAGER Part Manager does not open in System Capture for part property value changes even after setting the cpm directive.
- A/ ^; V: I V# Z, C1964388 SYSTEM_CAPTURE SMART_PDF Some shapes are not visible in the smart PDF schematics
( b7 B3 v" i& I0 v/ R/ J! n5 w1976832 SYSTEM_CAPTURE TDO Rolling Back local lower-block requires check-out of higher-level packaged & variant views- \: b! K( c. x+ E, y
1976844 SYSTEM_CAPTURE TDO CM - TDO check-out dependencies are broken
8 l% E# j* [) X4 K2 N- q) k0 t1976859 SYSTEM_CAPTURE TDO Variant Editor in System Capture -TDO allows to delete a variant without checking out variants view% ]5 K6 e& ?+ r4 l, @
1839816 TDA CORE All the design objects are locked in the EDM dashboard after a DSFrame error" A( h9 ?2 O3 M& S z; B/ k
1889898 TDA CORE Cannot check in the top level of the project in TDO
9 q- L/ \- w6 n- l0 q1892411 TDA CORE Unable to undo the block checkout if something fails1 `7 r1 r! H$ e# V8 s8 l# D
1877757 TDA DEHDL Refresh Hierarchy does not show latest TDO lock/unlock status in DE-HDL
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