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2023-9-28 15:01 |
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本帖最后由 i4dm99 于 2018-10-24 10:05 编辑 ) J! J1 J! b& Q) t' F+ ~9 T
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感谢分享，能共享一下都更新了哪些内容吗
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5 p* S7 p1 t* ]" W3 ?Fixed CCRs: SPB 17.2 HF0483 Q# F6 E( w" @8 [* p
10-13-20187 ]4 h1 _& C8 x, K9 ~% I1 o
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CCRID Product ProductLevel2 Title
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5 D( A2 b ~8 p$ T1913039 ADW ADWSERVER EDM Library Server exits with error message on starting library server service. M! }' j% ~! [ {' G
1709155 ADW COMPONENT_BRO Search query does not search for all the parts in the library
$ o3 M+ ]$ `: Y' a( T9 N. a$ \, T1827231 ADW COMPONENT_BRO Clicking the 'a' key in Part Manager launched from DE-HDL crashes DE-HDL
/ X7 \; Z% r3 i( q4 _9 u1903818 ADW COMPONENT_BRO Parts that have comment_body do not display version
. U( b5 O3 r- ?$ ]3 Q8 n1917961 ADW COMPONENT_BRO Component Browser PPL column values are truncated when selecting the top '*' filter; e/ e8 h+ F3 Q1 Y* @
1938172 ADW COMPONENT_BRO Symbol version with COMMENT_BODY set to TRUE cannot be instantiated
8 l2 V$ B" I$ ]% C) W1914103 ADW CONF conf creates incorrect path in fetch_dump.ini when MLR is enabled., b+ U; D# J' R/ G/ f. m8 P. q
1911422 ADW DBADMIN RuleP101 - PACK_TYPE check against schematic model not working
, q, U6 _, ]# t1926691 ADW DBEDITOR Adding a new classification and immediately trying to delete it results in errors m; g! Y. r) `& K& R5 Z
1926694 ADW DBEDITOR Renaming a classification and then renaming it back to the original results in error
1 ~/ L, r) W* h a5 r: t& S1934870 ADW DBEDITOR Adding a new classification and immediately trying to delete it results in errors
( G' F/ j( r5 c0 j6 @, J1872387 ADW DSN_MIGRATION Design Migration does not cache all used parts into flatlib/part_table.ptf
$ t% u" W. b% X% l J1254292 ADW FLOW_MGR Flow Manager Open Last Project should open last project closed# w* U: J) p1 h7 v8 l# F1 L% |
1281817 ADW FLOW_MGR '-proj' switch in 'pcbdw_fm' does not work; launches Flow Manager without loading any project& z1 y7 [8 x. r9 B
1727286 ADW FLOW_MGR Product options for PCB SI and Power Integrity are incorrect in the flow and tool launchers! u3 m+ j* J( ?. }
1875498 ADW FLOW_MGR EDM fails to open or becomes unresponsive.
0 T; u' [% T+ I1879386 ADW FLOW_MGR Unable to access COS with the default Firefox version in the 17.2 installation1 M% H1 b ~! V
1922541 ADW FLOW_MGR Warning message for unavailability of Java version appears on opening a project on Linux
( }9 h2 X; Y* J- z! _1945451 ADW FLOW_MGR Checklist does not work with two-byte characters2 l p+ L8 T% W% A
1956213 ADW FLOW_MGR Not able to invoke Flow Manager on the remote system: t2 n" `2 I7 u, f& @1 H+ _2 s4 F
1892285 ADW LIBDISTRIBUTI Symbol not consistently available in 16.6 ADW Library* U% I' f. N+ a. F6 ?6 o, n
1961731 ADW LIBIMPORT libimport fails to create tar for two Capture models7 F7 ^- I0 |1 C
1836620 ADW LRM Library Revision Manager crashes on clicking Help
7 f' L' Q7 G W4 P3 P$ L: f5 B; k1961845 ADW PART_BROWSER Error regarding environment variable( V, | Q' Z$ D3 G' U7 n0 ^/ x
1890782 ADW TDA Launching TDO dashboard connected to PLM returns a license error+ j6 z- H9 v# u. j/ b" M8 @4 H/ R2 ~
1980914 ADW TDA Cannot start Design Entry HDL and Component Browser in a TDO design# z) X: m" `" w4 u2 s
1833750 ALLEGRO_EDITOR 3D_CANVAS Soldermask Text is not shown in 3D Canvas& ~- R* H/ @5 W# a8 H6 I$ H
1891230 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas Viewer not bending PCB with proper radius4 F9 m0 U- O0 u. W: u
1913338 ALLEGRO_EDITOR 3D_CANVAS STEP models missing from exported .stp file& E3 ]$ B& s- r7 ^. K% M- k
1927507 ALLEGRO_EDITOR 3D_CANVAS Get Error: All bend operations are disabled due to licensing and/or DLL installation issues on invoking 3D Canvas' Y1 Z$ u2 F/ R6 s, I- k
1931508 ALLEGRO_EDITOR 3D_CANVAS Place Bound Bottom is displayed on Top, when dra is opened in 3D Canvas: y4 F% W% Q4 ^
1943060 ALLEGRO_EDITOR 3D_CANVAS Placebound bottom is not showing correctly.- n# ~( W' w! [$ f1 P. m
1950099 ALLEGRO_EDITOR 3D_CANVAS Place Bound Bottom is displayed on Top, when dra is opened in 3D Canvas
: E5 J$ l) }* \$ P4 E1988307 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation
5 v f8 X! q3 {5 _1923585 ALLEGRO_EDITOR ARTWORK Additional unwanted subclasses appear in film control when a new film definition is added# [8 Q, c1 N; T/ N2 q4 C: A
1944079 ALLEGRO_EDITOR COLOR Export of Board Parameters (Net Colors) does not contain entries for nets with spaces
" T6 _( R- L9 L `" i# u1856320 ALLEGRO_EDITOR DATABASE Donut pad fails to connect with cross-hatched shape in full contact thermal mode, despite hatch overlap of donut.
: c; O: \9 r. j* K9 v1912313 ALLEGRO_EDITOR DATABASE Database corrupted during background process! i$ N3 x% _& |$ l0 ~& {, V
1913344 ALLEGRO_EDITOR DATABASE When changing accuracy of design, the thermal relief for donut pad's outer pad connects to inner pad
2 Y4 J9 L8 a% A4 @1914470 ALLEGRO_EDITOR DATABASE Release 17.2-2016: export libraries command does not inherit posi/nega information
) f4 A8 P6 g- \8 [( k1932086 ALLEGRO_EDITOR DATABASE Unable to resolve DBDoctor error. w0 ?' H- e5 e1 a3 P' e: f" o
1963932 ALLEGRO_EDITOR DATABASE DB Doctor is not recognizing placed parts and showing them as unplaced.
/ m# ^8 Y+ D0 u* I: u9 P1987735 ALLEGRO_EDITOR DATABASE Interior sub-lamination backdrill holes are displayed with Top Soldermask pads where backdrill does not exist
6 I2 k( U, D4 N7 R( n1977622 ALLEGRO_EDITOR DFM Not able to add value '5' or multiples of 5 in in DFF constraints for maximum stacked via count
7 K1 Y& t" q* ?, c5 m+ X2 H3 k# p1892809 ALLEGRO_EDITOR DRC_CONSTR NODRC_ETCH_OUTSIDE_KEEPIN property is not working on TEXT
, @" ^- o" a( q: t. L1894765 ALLEGRO_EDITOR DRC_CONSTR DRC for no_drc_component_board_overlap is not created if the place bound is outside Place Keepin, ^* s* ]; P o, J0 }. e! E& e
1896627 ALLEGRO_EDITOR DRC_CONSTR Moving components takes long time while doing placement+ z, f) }& H: V7 o6 T, B M, Z
1914591 ALLEGRO_EDITOR DRC_CONSTR Spacing constraints for Mechanical to Hole shows resolved constraints different from the actual air-gap/space
2 h& G5 A" A6 L. S) `1956468 ALLEGRO_EDITOR DRC_CONSTR DRC getting generated while moving the uvia and getting removed after updating DRC.: g, N5 y% k, H4 T- ]
1884149 ALLEGRO_EDITOR EDIT_ETCH Arced Routing of differential pair creates unexpected arc radii6 j! s4 }3 c, U/ ?" T/ ]0 e+ ^
1891985 ALLEGRO_EDITOR EDIT_ETCH Etch edit does not follow the constraints# _' {. I: @% C# M9 t4 c
1860056 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes on right-click after choosing the Move command5 A' A+ d- h. \3 R- m8 u3 {
1860723 ALLEGRO_EDITOR GRAPHICS APD crashes on right-click when using the Move command& h0 H# y+ `2 b4 Z* V. J2 B
1870058 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes when using Place Manual -H command8 B/ p$ C: N$ [( z' w2 R
1930282 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes on executing axlVisibleDesign(nil) from allegro.ilinit
1 Q W* G% A( i, E# a1882813 ALLEGRO_EDITOR INTERACTIV Unable to set the end point with 'snap pick to' when adding an arc
4 J( f3 K2 g$ n, c4 e+ o1884725 ALLEGRO_EDITOR INTERACTIV Edit and Move vertex operation not working as desired
x; X; r. S0 ~: z( ~/ _+ Q1902359 ALLEGRO_EDITOR INTERACTIV Connector boundary remains ON for a layer if visibility toggles in Shape Edit application mode# a* A! U h" E# a; p4 t# H/ E7 o
1909004 ALLEGRO_EDITOR INTERACTIV Parameter description showing wrong for Padless Holes under Design Parameter Editor; i2 R: d$ e* ^5 H* Y
1912055 ALLEGRO_EDITOR INTERACTIV PCB Editor crashes on Delete By Query - AutoSilkscreen - Find By Query Z+ `' X3 B5 O j" t
1924503 ALLEGRO_EDITOR INTERACTIV Editing shape causes PCB Editor to crash
' G4 e, `7 K2 s) n L1929614 ALLEGRO_EDITOR INTERACTIV Unable to Place Via Array when Staggered ring is selected in Global Ring Parameters.% u# g* x7 ^, Q$ n
1938523 ALLEGRO_EDITOR INTERACTIV Change Shape Type message is same for dynamic and static shapes' \/ z% O3 Z) r" P( k
1940827 ALLEGRO_EDITOR INTERACTIV Irrelevant/incorrect warning message when doing Edit- Change on Clines
/ t& q8 M X% O/ V4 N5 A( A# p1872653 ALLEGRO_EDITOR INTERFACES DXF export shows embedded layers in the layer configuration file6 T( {! J: x# B3 `9 \2 n, |
1873971 ALLEGRO_EDITOR INTERFACES IDX proposal comments are not shown when importing the IDX file into Allegro' i* S5 \6 z: m+ c8 b; X
1892172 ALLEGRO_EDITOR INTERFACES STEP Package Mapping form needs to be larger
T) j8 t; I7 i0 s6 h1893311 ALLEGRO_EDITOR INTERFACES A line became two lines after import dxf' N7 E8 d9 f* K4 H
1937816 ALLEGRO_EDITOR INTERFACES Unit as % in Property Definition not supported by SubDrawing
0 O9 l; f$ H+ ?9 W8 M; K1973084 ALLEGRO_EDITOR INTERFACES Physical library not placed if design and IDF database not matched while running; m) g4 Y- @$ [+ R# K1 W8 I
1987526 ALLEGRO_EDITOR INTERFACES IDX import Fails to recognize SURFACE FINISHES Class( F9 d4 p0 Q1 ^! C _2 K
1872856 ALLEGRO_EDITOR IN_DESIGN_ANA Message displayed when creating directed groups needs to be improved C& U/ `6 t" ^7 ~
1900832 ALLEGRO_EDITOR IN_DESIGN_ANA RTP: Return Path DRC does not check circle void correctly m- C# I6 X' |+ e7 J o
1935641 ALLEGRO_EDITOR IN_DESIGN_ANA Return path DRC crashes PCB Editor
) s) W. U4 I; ~( L3 z1649465 ALLEGRO_EDITOR MANUFACT Manufacturing options are not visible in OrCAD PCB Designer legacy menu; ?; T& ^4 ~: y7 O- N
1873417 ALLEGRO_EDITOR MANUFACT Autosilk fails to add line information. Only part of the line is getting copied to the autosilk layer.
8 X! B5 N( H% K3 s* h1911596 ALLEGRO_EDITOR MANUFACT Documentation Editor drill chart shows two different rows for the same slot." [. R8 \ P% u! f
1937721 ALLEGRO_EDITOR MANUFACT Drill figure character scaled up in GERBER
% l* e$ ~) \" z4 A1957768 ALLEGRO_EDITOR MANUFACT Import IPC2581 on cross-section does not import line width and impedance5 V, V6 X; Q% i
1969363 ALLEGRO_EDITOR MANUFACT Pressfit connector backdrill depth is considering MNC Layer- n' g* W$ ~8 T4 X$ k
1891102 ALLEGRO_EDITOR MULTI_USER Rejected by server error messages when using Symphony Team Design
6 \0 u* x6 D. D% g) B1928082 ALLEGRO_EDITOR MULTI_USER Unknown SubClass BOUNDARY/MULTI_USER_LOCK automatically added when defining Artwork Output.: b0 t, t8 d4 ^7 ]$ U
1976705 ALLEGRO_EDITOR MULTI_USER Symphony client disconnects from server without any notification - despite ping mechanism1 u/ i7 \. R' T' j6 n0 M
1972554 ALLEGRO_EDITOR NC Mill symbol moved from Nclegend-slots-1-2 to Nclegend-1-2 subclass if nc_param.txt not present
- ^% y' W8 J s* l$ h1914412 ALLEGRO_EDITOR OTHER Autosilk lines do not clear padstacks that are not rectangular
" {1 g3 Y9 I* f/ d- L1921933 ALLEGRO_EDITOR PAD_EDITOR column clearance cannot reset to 0 in padstack editor& y! b% Q' s1 V' ?2 |
1922234 ALLEGRO_EDITOR PAD_EDITOR DBDoctor reports 'illegal value for pad' and does not fix when zero corner radius for Rounded Rectangle is defined# L! |; s8 u7 X$ s6 }
1932183 ALLEGRO_EDITOR PAD_EDITOR Drill Symbol information not exported in Padstack XML if Drill Figure in none8 C# k7 S0 w+ w, h" I/ z
1934880 ALLEGRO_EDITOR PAD_EDITOR Shapes with offsets not displaying properly in Padstack Editor views6 o+ ]. {: D" h+ i i
1813270 ALLEGRO_EDITOR PLACEMENT When a place replicate module is updated, the vias used in thermal pad are removed
1 E5 M4 @+ @) P0 i1840275 ALLEGRO_EDITOR PLACEMENT Placing component with the Mirror option causing display problems5 T7 G% }. U2 B
1854099 ALLEGRO_EDITOR PLACEMENT Align components to zero spacing causing mirrored components to overlap' z, m# v X9 ~' x! X
1854696 ALLEGRO_EDITOR PLACEMENT Pins shown incorrectly when the Alt Symbol and Mirror commands used consecutively, d! m- a c) }
1862863 ALLEGRO_EDITOR PLACEMENT Too many messages in the command window when symbol does not support mirroring" G' C. ^/ A* z' d1 L$ R
1909857 ALLEGRO_EDITOR PLACEMENT Using Mirror with Alt Symbol placement displays incorrect graphics4 I: Q8 \$ t0 |2 i. _
1917128 ALLEGRO_EDITOR PLACEMENT Place - Autoplace - Room when all the components of the room are placed on board causing crash: K1 j0 K0 k8 a- R9 a6 z/ B8 z; j
1925144 ALLEGRO_EDITOR PLACEMENT PCB Editor stops responding on using the Autoplace - Room command% O9 M2 I9 A; h+ g) `0 h
1961509 ALLEGRO_EDITOR PLACEMENT PCB Editor crashes on choosing Place - Autoplace -Room
4 ^- j, ?/ Y+ G9 r ?0 ]! Y- r1930669 ALLEGRO_EDITOR REPORTS Net 'VSS' not included in the Etch Length By Pin Pair Report* ]; |1 h1 e1 m3 o e- K, \% ]
1982934 ALLEGRO_EDITOR SCRIPTS PCB Editor stops responding if Generate button is used to create script from journal file9 I5 b; y' I, W. ^5 ^( `2 H
1337346 ALLEGRO_EDITOR SHAPE Shape Check is generating problem point errors that seem unnecessary8 v+ O" W9 m6 h6 O. J
1396692 ALLEGRO_EDITOR SHAPE Zcopy with expansion not following board outline
. f5 v/ h! X# s. w1902001 ALLEGRO_EDITOR SHAPE Shape behaving differently across hotfixes4 L; d9 \7 d) S% t: v
1921287 ALLEGRO_EDITOR SHAPE 3D canvas is showing some stray objects/ u; q- p1 O6 C2 Y$ `
1936482 ALLEGRO_EDITOR SHAPE Option for Fillet to not obey NO_SHAPE_CONNECT Property
' ]: @ m! }' `0 y. J7 K1943899 ALLEGRO_EDITOR SHAPE Only one Shape to Route Keep In DRC in release 17.2-2016 compared to two in release 16.6
7 V: U ]' v; \+ x5 o9 A8 K1944041 ALLEGRO_EDITOR SHAPE shape_rki_autoclip makes shape voiding incorrect7 ] a" O! r. u1 u# q2 c
1947675 ALLEGRO_EDITOR SHAPE Shape void error when dv_squarecorners is enabled
; O I$ @% Y1 X$ r- K& s4 ?1949250 ALLEGRO_EDITOR SHAPE Shapes are filled even after raising and lowering priority
' }* O/ g- s. i" a$ R1984526 ALLEGRO_EDITOR SHAPE Same net shape voided is inconsistent with respect to vias
$ b! Z5 M! @! ^' Y; `* ?1984955 ALLEGRO_EDITOR SHAPE Dynamic shape creating same net spacing drcs.
2 H6 {8 r0 O' ~, E+ [, n1 ]7 k/ \1839147 ALLEGRO_EDITOR SKILL axlDBGetLength() reports that the segments of a filled rectangle shape are invalid database ID arguments
: T+ d" c$ P6 T1882776 ALLEGRO_EDITOR SKILL SKILL documentation for axlIsBetween() is wrong6 P1 z* g+ o. S# z( Z
1882882 ALLEGRO_EDITOR SKILL Example for axlMathConstants needs correction in Allegro SKILL Reference
6 g- r" s' a. j5 J3 X1902712 ALLEGRO_EDITOR SKILL axlAltSymbolReplace moves symbol to the top of design while replacing
. @" r" Q" s# W% G, u, w( s1906329 ALLEGRO_EDITOR SYMBOL Mechanical Pin to Conductor property set on a pin in a symbol does not pass to the board4 ~$ F2 v: o7 W' F4 h
1911343 ALLEGRO_EDITOR UI_FORMS Global Visibility not turning all layers off
, o" n/ h2 z) _+ Y0 H1985584 ALLEGRO_EDITOR UI_FORMS Import logic changes the Current Working Directory4 C3 g$ }) ]" a9 X v5 z. h
1987829 ALLEGRO_EDITOR UI_FORMS Import logic changes the current working directory e' Q9 u. D8 ~# x. {" v/ z
1992722 ALLEGRO_EDITOR UI_FORMS After netlist import process, the board file is changing its current path
; N0 `5 g" _$ U& E% `* [7 c* |1697506 ALLEGRO_EDITOR UI_GENERAL Stroke Editor working in OrCAD PCB Editor of release 16.6 does not work in release 17.2-2016& ?. c1 V+ j/ s
1702631 ALLEGRO_EDITOR UI_GENERAL Etch Length by Net report does not list correct net name for nets in a bus& D$ O( y1 B! C* t* s* R* h% a
1703105 ALLEGRO_EDITOR UI_GENERAL Bus net names are incorrect in reports when using the allegro_html_qt variable6 p; l) F6 Z/ m) F+ U
1770786 ALLEGRO_EDITOR UI_GENERAL Stroke Editor working in OrCAD PCB Editor of release 16.6 does not work in release 17.2-2016" B3 d: i/ T* i3 z4 w7 h) X
1784938 ALLEGRO_EDITOR UI_GENERAL Etch Length by Net report does not show net names with angle brackets in release 17.2-20164 t5 a; n$ Z0 b, {6 ~( M9 S
1822557 ALLEGRO_EDITOR UI_GENERAL axlUIWCloseAll is not closing text window in release 17.2-2016( `1 z1 O; O7 W. x
1836400 ALLEGRO_EDITOR UI_GENERAL Net names are truncated in HTML reports
8 J3 ?( Q( s: a. @6 G" E$ u1869879 ALLEGRO_EDITOR UI_GENERAL Links not working in the Net loop report. F/ V8 J! F& V, i6 G' `
1895878 ALLEGRO_EDITOR UI_GENERAL axlUIWClose()/axlUIWCloseAll() functions do not work when allegro_html_qt setting is enabled.
0 Q' U2 \% P9 t: J& M+ Z* q1912282 ALLEGRO_EDITOR UI_GENERAL PCB Editor exits with error message on editing objects
; l6 v- u& N/ y9 y& v3 Y1913962 ALLEGRO_EDITOR UI_GENERAL PCB Editor toolbars change on choosing View - UI Settings - Save Settings and then restarting) q" P9 P: E. o& g8 w$ T) x# N
1933172 APD UI_GENERAL Cannot paste text into the command prompt without clicking when 'enable_command_window_history' is set1 Y% [: ~" F0 B1 b
1843712 CAPTURE NETGROUPS Signals shown only for first segment of NetGroup
. V5 n' ]: r4 \) v; P1917768 CAPTURE NEW_SYM_EDITO Missing package pin overview in Symbol editor7 E: Z: e5 F1 r/ N4 `. c8 u
1920088 CAPTURE NEW_SYM_EDITO Package view missing in the new Symbol Editor
# M1 L2 _& t( }1922196 CAPTURE NEW_SYM_EDITO Snap to grid issue in Symbol editor! M" H' L' A% W2 C; e
1927268 CAPTURE NEW_SYM_EDITO View Package is grayed out in release 17.2-2016, hotfix 038 and later versions
* a5 a" M. S- t$ q9 j3 F1928012 CAPTURE NEW_SYM_EDITO In new Symbol Editor, View - Package is grayed out
6 _& F9 q5 z. I+ g4 q1 a1930865 CAPTURE NEW_SYM_EDITO View Package missing in hotfix 0383 \0 [* U1 q; k
1938507 CAPTURE NEW_SYM_EDITO Issues with new Symbol Editor: Justification and spreadsheet usability8 z. Q) l/ D! Z( \% R# R9 r6 U
1940869 CAPTURE NEW_SYM_EDITO Missing pins in 'Edit Pins of All Section' table view for 4k resolution but not in 2k resolution
% I0 \- K7 Y. U1940888 CAPTURE NEW_SYM_EDITO Copying pins from a part and pasting on different parts not working properly.
6 s. S9 V/ j/ O5 b1942994 CAPTURE NEW_SYM_EDITO Cut / Paste of object in New Part / Symbol editor always pastes on grid* {; k+ N4 r" L6 \) L+ p
1944396 CAPTURE NEW_SYM_EDITO JavaScript error while copying from 'Edit Pins of All Sections'; B, N" Y3 A7 o9 S# ~/ c2 q8 S
1950224 CAPTURE NEW_SYM_EDITO Cyrillic alphabets are not displayed properly on Schematic." e" R* m) m) i4 h
1951369 CAPTURE NEW_SYM_EDITO Cancel closes Symbol Editor( R* o2 Q( o! \) a4 f
1966785 CAPTURE NEW_SYM_EDITO Edit Part is grayed out; a T$ X. M0 ~, F: a+ L+ m
1973135 CAPTURE NEW_SYM_EDITO Issue with new Symbol Editor: cannot copy-paste pins
& y) D6 t( z3 ?9 w$ }' k1973344 CAPTURE NEW_SYM_EDITO JavaScript error on opening part from design
* v1 t: x0 }8 z1974122 CAPTURE NEW_SYM_EDITO Cannot copy-paste all pin list on the new Symbol Editor& D8 c, P C' x% Q3 @8 B C3 Y4 e
1983593 CAPTURE NEW_SYM_EDITO Script error on copying and pasting to property sheet
1 @1 _! X8 H/ L( d/ a7 @, \2 S/ o1929692 CAPTURE OPTIONS PACK_SHORT issues with Pin Numbers that contain letters/alphabets
* [4 n+ @6 ^1 C6 f& Z+ K. C1876939 CAPTURE OTHER Incorrect Capture renaming error (ORCAP-1310)
! v, t4 T. C a* a( h1 R L1916090 CAPTURE OTHER Incorrect error message when 'save as' fails due to long directory path* s+ Y+ G+ ^% P/ \- l* @
1921927 CAPTURE OTHER Two functions are mapped to Shift + R in OrCAD Capture in hotfix 038/ H: P; W$ p% D, w5 d
1946453 CAPTURE OTHER Shift+R shortcut is assigned to two functions.
) e N6 H+ y& M% a1965456 CAPTURE OTHER Shortcut Shift + R is not opening the Independent Sources dialog box
: m3 i: ?9 }6 l* {' O7 H1 M& _1968757 CAPTURE OTHER Close CIP is grayed when right-clicking on the tab in Capture." y* O8 {. @. R% K& u' o
1938437 CAPTURE PART_EDITOR OrCAD Capture new Symbol Editor Pin Type missing in table6 {. a4 Z6 ] N% P
1906757 CAPTURE SCHEMATICS Intersheet reference is overlapping with the offpage connector name
U9 }9 c1 W8 o: ?1867016 CAPTURE SCHEMATIC_EDI Part placeholders not being positioned when moved, S( ~) _' K; h" b6 h
1932837 CAPTURE SCHEMATIC_EDI Parameters graphics are not correctly positioned
9 L* d6 ?9 U6 b/ O1949518 CAPTURE SCHEMATIC_EDI Getting error when comparing designs
, r/ |$ \& q$ y$ G" ^* w* q1967545 CAPTURE SCHEMATIC_EDI Only section A of heterogeneous part being placed and not sections B, C, or D
& J' Q+ o7 Z! H7 z$ `4 b1 E( L1933919 CIS DBC_CFG_WIZAR New CIS Configuration .dbc file created in release 17.2-2016 shows release 16.3
# w- F! A% |; h2 `, C% T0 Y a9 P/ @1932550 CIS RELATIONAL_DB VIEW NAME in Relational Database configuration is not working as expected.4 J* e* d# y9 c! ?6 K
1832524 CONCEPT_HDL CHECKPLUS Default checkplus rules show body height of 0 (sym_2 of the attached cell). This causes the cell to fail verification.
: K7 y( J2 x. E" z3 n; z1912023 CONCEPT_HDL CHECKPLUS signalWidth predicate does not recognize SIG[1..0] as bus.
+ _$ o3 v' J# s6 K6 W1966120 CONCEPT_HDL COPY_PROJECT Copying release 17.2-2016 project results in message stating the project is of an older version
( D- A4 k& {0 V2 M+ y1879425 CONCEPT_HDL CORE Adding signals with the right-click menu is not following the defined color scheme
' I0 O7 B! U$ t2 x8 a1890542 CONCEPT_HDL CORE Getting ERROR(SPCOCN-1911) when running export physical with backannotation
9 P# K1 A3 w0 W: n+ ^, C7 J1907684 CONCEPT_HDL CORE Moving symbol makes canvas unresponsive for a long time7 }; t. L, Z2 b5 Y1 J, E$ W
1920711 CONCEPT_HDL CORE Pin names changes when mirroring the swapped section.
9 F3 `4 }4 R/ P7 K# P1931421 CONCEPT_HDL CORE On Linux, 'cpmaccess -read' returns incorrect value' v; Q i* s/ ^. n I4 d
1931782 CONCEPT_HDL CORE Setting DONT_FORCE_ORIGIN_ONGRID to ON does not work for sig_name. P. Z6 j8 w/ j4 e7 U5 \/ E4 ?. X
1932433 CONCEPT_HDL CORE _movetogrid causes signal disconnection
+ k5 h, {/ V9 a1946993 CONCEPT_HDL CORE DE-HDL Part Manager fails to update parts on schematic if new KEY properties exist in PTF but not in schematic
7 h8 I+ n1 i1 q9 _1947029 CONCEPT_HDL CORE Design Entry HDL Font Support not working for signal rename
& C' b3 _& b* e) u1962865 CONCEPT_HDL CORE Schematic symbol creation with '-' as pin name not packaging
7 K; @. V4 Z2 {' k$ e% M# q1966805 CONCEPT_HDL CORE Issues with packaging design containing cells named with a leading underscore+ x8 s" `7 S! K% z; `* Q5 Y
1967760 CONCEPT_HDL CORE DE-HDL crashes on moving Net Group/Port in release 17.2-2016, hotfix 044
) y$ J1 a1 i% x Q- ]( x# ~1968282 CONCEPT_HDL CORE DE-HDL Part Manager fails to update parts on schematic when new KEY properties exist in PTF and not in schematic
?0 q, H* |! i5 J# v* B1972815 CONCEPT_HDL CORE Part Manager not updating missing key attributes from the ptf file by using 'Update instances' option# s8 e8 ]# T; Y
1887790 CONCEPT_HDL CREFER CRefer links not working in selected cpm file
" H: ^9 y% n6 f e c( U p/ ^$ M1898535 CONCEPT_HDL INTERFACE_DES Global Navigation window does not reflect removal of a net on page2 that is part of a netgroup on page1
" M' N0 W& D$ f: B" Q$ F1888048 CONCEPT_HDL PDF Japanese characters are not output correctly to PDF on Linux.
) x' I! y* s% }/ w5 j+ x5 W1937505 CONCEPT_HDL PDF Missing intersection dot in schematic PDF* i7 p1 [, I) p3 V2 R; [* G- B$ T S
1942486 CONSTRAINT_MGR CONCEPT_HDL CM crashes when you save after importing a TCF file( ^& G/ G# V: z* h1 [ Y5 h0 ?7 ^/ `
1983743 CONSTRAINT_MGR CONCEPT_HDL Region Class-Class members are being duplicated in CM in the current session
. J) ~# O1 e9 f5 s1906573 CONSTRAINT_MGR ECS_APPLY Database corrupt and DBDoctor reports illegal database pointer error, d* i! }$ I* j2 q5 |/ p
1913805 CONSTRAINT_MGR OTHER Setting environmental variable CM_PARTIAL_DCF in release 17.2-2016 causing crash0 C* E: ~& Z: Y" l; f0 o
1914813 CONSTRAINT_MGR OTHER C++ Runtime error and non-recoverable crash in class-class worksheet
$ q- t. k, A C' f8 {1920142 CONSTRAINT_MGR OTHER Xnet names are not consistent in the design
2 z- [7 l- l& r1 a1 j1898549 CONSTRAINT_MGR SCHEM_FTB Importing netlist causing crash in release 17.2-2016, hotfix 036
4 o6 ]1 u; G/ R' n1814851 CONSTRAINT_MGR UI_FORMS Field solver /DRC check running forever
: W9 ^; s$ |% b1 h7 p# u1889862 CONSTRAINT_MGR UI_FORMS PCB Editor hangs while assigning net voltages in CM
; i2 {& A' D7 u& B7 I; T% M+ }1965470 CONSTRAINT_MGR UI_FORMS Constraint Manager GUI Issue in release 17.2-2016, hotfix 039: Font size small and rows/columns in shrink mode
! L* C1 W* J* Y) H1945406 ECW ADMINISTRATIO Tree view was not refreshed soon after changing the site permission.* E0 h! z( N8 j8 f2 ~
1826848 ECW METRICS SPDWECW-551 and SPDWECW-553 should be warnings, not errors
! U6 D* g4 @9 a/ Y1933373 ECW PROJECT_MANAG ecwbatch does not accept password and does not ignore invalid users
* E5 C8 g6 @: j- j8 K* A1921502 F2B PACKAGERXL Errors on running Export Physical:SPCOPK-1138 and SPCOPK-1149 O( W/ U5 j/ ?# [
1929846 F2B PACKAGERXL PackagerXL is still creating the pstcmbc.dat file on a release 16.6 design uprevved to release 17.2-2016
# R( q& U1 S7 M" }1953780 F2B PACKAGERXL Updated subdesign package information not updated on the top-level design in the reuse flow
6 J' w$ @, B1 L3 x1971738 F2B PACKAGERXL Deleting blank space from pstxnet.dat file crashing DE-HDL- u7 \8 S: G' X+ z
1891002 INSTALLATION DOWNLOAD_MGR Issue with Download Manager (Change Preferences Option does not Work)
) |: b7 ^! }, ]2 a1972890 ORBITIO OTHER OrbitIO-APR failed to run if PCB design included+ W9 Q% N. _& g* P7 H+ N6 B
1954262 PCB_LIBRARIAN CORE Footprint model check in fails with verification checks failed error$ O6 ?9 n' Q/ j' m8 N; [4 _. W) R2 i
1943656 PCB_LIBRARIAN GRAPHICAL_EDI Symbol Editor is blank if .ascii file is newer than .css file
8 b/ O+ p7 Q, V8 h) M1897887 PCB_LIBRARIAN SYMBOL_EDITOR New Symbol Editor: Inconsistent symbol results when adding vector pins in Part Developer
. w+ k, b# y! I! Q9 ]1898003 PCB_LIBRARIAN SYMBOL_EDITOR Issue with Page Border Symbol
/ J! h4 }* A( E, a: T5 g6 `1842007 PSPICE LIBRARIES Change required in swit_reg.lib! _' W- {8 L; y: \# E6 F4 |) z; }
1906922 PSPICE LIBRARIES Mismatch in mapping of IC pins in model and PSpice template for analog device AD8138+ _6 |7 J2 H7 C
1947586 PSPICE LIBRARIES Update the model AD8138/AD in ANLG_DEV.OLB2 r( I- O' J' B- h# z
1748470 PSPICE MATLAB PSpice displays an error when sending current in co-simulation6 K1 p" ]0 f1 I, H) t
1802455 PSPICE MATLAB Incorrect current direction for pins in SLPS flow/ i$ g, V, N3 A8 `7 L# X
1852811 PSPICE MATLAB ORPSIM-2604 being reported in SLPS simulation" n3 r7 L' j3 p
1858716 PSPICE MATLAB Co-Simulation fails if 'RC' is used as reference of resistor' _ G5 t3 H8 d7 q; ?$ j& l
1921641 PSPICE MODELEDITOR Model Editor in Client Server installation slow to invoke! [2 }+ W+ p$ L& |# E1 O6 t
1922160 PSPICE MODELING_APPS New Capture Associate Symbol GUI not reading libraries
6 l6 x; q2 ` n1843698 PSPICE PROBE PSpice icons appear very small on a specific computer
. `5 U( {5 e7 |, g* V, X1773841 PSPICE SIMULATOR orSimSetup64 crashes when running the simulation for attached design m1 i x- i) k- f( U* U* m# Y+ E
1816316 PSPICE SIMULATOR Simulation stuck; however, the status bar is correctly updated during Pseudo Transient Analysis( }. d" l( h4 E, X/ X
1887119 SCM IMPORTS Cannot selectively update changes in VDD
& i" z( L5 J- m- ?9 C' n0 I1889362 SCM IMPORTS Cannot selectively update changes in Visual Design Differences
6 r' e% X0 b1 j6 g% l1958545 SCM SETUP Auto assign models does not work in SCM same way as in DE-HDL
, D) }/ `/ B; N0 `0 N1988841 SIG_EXPLORER INTERACTIV SigXplorer stops responding or crashes in hotfix 047 when a design is saved
. e+ i0 [& q8 D1988943 SIG_EXPLORER INTERACTIV SigXplorer crashes on selecting Update Constraint Manager N1 X3 X- J) X( F( ~: X. Q7 J8 h
1991375 SIG_EXPLORER INTERACTIV SigXplorer crashes when clicking Save
" N w" F( r+ [& n! G. Q1993749 SIG_EXPLORER INTERACTIV SigXplorer crashes on saving topology
1 E& l, t( r7 s% Z. U% X. [1969975 SIG_INTEGRITY GUI Model Browser edits model above the one that is selected( C( E. {' m5 J q6 f' H# n
1953184 SIP_LAYOUT IMPORT_DATA Sub Drawing not saving dashed lines* a7 f9 W, M7 {, Q* y" [
1913864 SIP_LAYOUT ORBITIO_IF SiP Layout design import results in wrong die rotation
; x) v1 D. f: v& s1880237 SIP_LAYOUT PADSTACK_EDIT Background Window comes to the forefront when closing the Padstack editor
( c: b" \- g- a) Z- G" }1972560 SIP_LAYOUT STREAM_IF GDS Export fidelity issue: inverted arcs
4 q) y2 B5 o6 U* `) I) O/ `$ l1920317 SIP_LAYOUT THIEVING Thieving pattern does not allow for OOPS operation1 H* u+ ?* P1 {) B( O( N
1909075 SYSTEMSI DOC SystemSI PBA channel and circuit simulations do not respond if bit pattern is 1s or 0s: n" p7 o4 V* x- a& J2 S
1916101 SYSTEMSI DOC Lack of stimulus in file causes Serial Link Analysis to become unresponsive2 D; q* j' ]# x5 ~8 v: c
1919562 SYSTEMSI ENG_PBA SystemSI generates wrong timing bathtub curves in channel simulations for write and read/ P* P0 ~3 g+ w- r
1964064 SYSTEMSI GUI_PBA Able to sweep AMI parameters in SSI-PBA
; `) i" w; b0 r$ O1 e+ v1 {1971266 SYSTEMSI GUI_PBA MCP header shows only 49 ckt nodes instead of 52 for s52p S-parameter file
( b4 A- W+ y) q+ Z1 l8 j4 @: }$ Y1885625 SYSTEMSI GUI_SLA Manage AMI + DLL from Setup Analysis Window* G9 K- G6 |* u7 e2 z$ s
1924382 SYSTEMSI GUI_SLA Data Rate field in SystemSI Stimulus property form is confusing for PAM4 operation% _% h% ~" A5 D! ~8 `# M
1982341 SYSTEM_CAPTURE CANVAS_EDIT Signal rename does not maintain new signal name value
* |5 @3 s, l+ X# ]8 N1976857 SYSTEM_CAPTURE CONSTRAINT_MA System Capture-CM Match Group Creation is not updating correctly# C4 c9 I! Q9 [8 Z
1929606 SYSTEM_CAPTURE DESIGN_CORRUP Opening design causes System Capture to crash( }# N5 q3 Q$ y
1914697 SYSTEM_CAPTURE DRC Overlapping component DRC does not work
: {; x B) r8 y, N5 u5 x1973467 SYSTEM_CAPTURE IMPORT_PCB System Capture Import Physical shows many component and physical differences on a design that is synced up; n* r% {' N1 `+ z0 H
1962603 SYSTEM_CAPTURE NAVLINKS Ability to not underline hyperlinks for Navigation Link values
, e) d2 {/ r- ?* Q; {4 X1967639 SYSTEM_CAPTURE PART_MANAGER Part Manager does not open in System Capture for part property value changes even after setting the cpm directive." x; [; q9 ]' Z* r
1964388 SYSTEM_CAPTURE SMART_PDF Some shapes are not visible in the smart PDF schematics. c; _8 z- T' r0 o! L6 K i
1976832 SYSTEM_CAPTURE TDO Rolling Back local lower-block requires check-out of higher-level packaged & variant views
! X9 j& i' @0 {, ?1976844 SYSTEM_CAPTURE TDO CM - TDO check-out dependencies are broken
$ J1 W: E+ r- L F. F n1976859 SYSTEM_CAPTURE TDO Variant Editor in System Capture -TDO allows to delete a variant without checking out variants view
2 Y) `6 N! [1 A1839816 TDA CORE All the design objects are locked in the EDM dashboard after a DSFrame error
. ^1 @# l- V7 l+ b* ~+ v1889898 TDA CORE Cannot check in the top level of the project in TDO
2 Z4 ~( S4 S N4 J1892411 TDA CORE Unable to undo the block checkout if something fails
6 u* \' q" |4 [9 B7 S1877757 TDA DEHDL Refresh Hierarchy does not show latest TDO lock/unlock status in DE-HDL* E1 U* C( o# g* F7 O
8 X5 A3 A) R% `1 z- F7 B' ?; H( W
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