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本帖最后由 i4dm99 于 2018-10-24 10:05 编辑
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感谢分享，能共享一下都更新了哪些内容吗# A- n* D' t* ^3 K2 }% E3 F
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Fixed CCRs: SPB 17.2 HF048
' d' b Q5 `( f% K10-13-2018
7 c- T$ D2 e8 x4 }- G% S/ B========================================================================================================================================================
) H, k0 [% r) OCCRID Product ProductLevel2 Title
: f' n" P0 u( [: w" X& W4 {========================================================================================================================================================
$ W! x& M2 A6 `1 G7 @9 t# ?1913039 ADW ADWSERVER EDM Library Server exits with error message on starting library server service+ n/ v5 o$ d: e" `& A
1709155 ADW COMPONENT_BRO Search query does not search for all the parts in the library
' Z' R3 I4 A' h w1827231 ADW COMPONENT_BRO Clicking the 'a' key in Part Manager launched from DE-HDL crashes DE-HDL* g# `9 T, @) H' u0 s$ P/ p) S- X
1903818 ADW COMPONENT_BRO Parts that have comment_body do not display version( }0 Y" m9 H, q
1917961 ADW COMPONENT_BRO Component Browser PPL column values are truncated when selecting the top '*' filter
- e+ ]9 R4 o* ^- O0 G4 E6 g' O" N! J1938172 ADW COMPONENT_BRO Symbol version with COMMENT_BODY set to TRUE cannot be instantiated- F# W7 ?* x V0 f7 i( N, K) ^
1914103 ADW CONF conf creates incorrect path in fetch_dump.ini when MLR is enabled.
9 K4 b Q9 x# _5 r& g! \, U1911422 ADW DBADMIN RuleP101 - PACK_TYPE check against schematic model not working+ V' U- q. }; w0 s
1926691 ADW DBEDITOR Adding a new classification and immediately trying to delete it results in errors
" x/ I; L$ D ]2 [3 q1926694 ADW DBEDITOR Renaming a classification and then renaming it back to the original results in error
# n( z* x" G$ p# M7 E3 }; c! s, I1934870 ADW DBEDITOR Adding a new classification and immediately trying to delete it results in errors
4 d( m8 g# P* j" Z- e1872387 ADW DSN_MIGRATION Design Migration does not cache all used parts into flatlib/part_table.ptf
; \7 W" J! f& y# m0 L1254292 ADW FLOW_MGR Flow Manager Open Last Project should open last project closed5 j% A3 c5 `* V6 e( ]5 Q' s1 Z
1281817 ADW FLOW_MGR '-proj' switch in 'pcbdw_fm' does not work; launches Flow Manager without loading any project
+ _% ^; Q+ E8 V( N+ G) }7 n6 M" @9 Q% Q1727286 ADW FLOW_MGR Product options for PCB SI and Power Integrity are incorrect in the flow and tool launchers
. E* b" ^3 x3 O i. n2 R1875498 ADW FLOW_MGR EDM fails to open or becomes unresponsive.
/ c9 Y) G. O" @0 @1879386 ADW FLOW_MGR Unable to access COS with the default Firefox version in the 17.2 installation
6 e/ U8 `3 h2 l1922541 ADW FLOW_MGR Warning message for unavailability of Java version appears on opening a project on Linux9 ]: q* y3 Y [2 z: i# f. d
1945451 ADW FLOW_MGR Checklist does not work with two-byte characters$ `( R- m% t& E
1956213 ADW FLOW_MGR Not able to invoke Flow Manager on the remote system0 A: ?- p" E! X0 n3 D% r
1892285 ADW LIBDISTRIBUTI Symbol not consistently available in 16.6 ADW Library
1 x, g/ Q9 a+ `; a' {1961731 ADW LIBIMPORT libimport fails to create tar for two Capture models
- h/ R0 d$ A5 M& L1836620 ADW LRM Library Revision Manager crashes on clicking Help
0 \" V" x( m" F5 b1961845 ADW PART_BROWSER Error regarding environment variable" L; P0 M3 u% `* ^6 C( E
1890782 ADW TDA Launching TDO dashboard connected to PLM returns a license error u T6 I5 ]7 |, b
1980914 ADW TDA Cannot start Design Entry HDL and Component Browser in a TDO design h6 h, @- r$ t( S$ m1 C' L% E
1833750 ALLEGRO_EDITOR 3D_CANVAS Soldermask Text is not shown in 3D Canvas# j8 O( ^; u7 M7 ~2 K. M
1891230 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas Viewer not bending PCB with proper radius
- l: v W' j7 B% `1913338 ALLEGRO_EDITOR 3D_CANVAS STEP models missing from exported .stp file6 N G# N& f8 F+ E" E2 e: J
1927507 ALLEGRO_EDITOR 3D_CANVAS Get Error: All bend operations are disabled due to licensing and/or DLL installation issues on invoking 3D Canvas* O [7 b) ^6 Z# s* B1 c2 }; M
1931508 ALLEGRO_EDITOR 3D_CANVAS Place Bound Bottom is displayed on Top, when dra is opened in 3D Canvas* w8 P; a- \9 _- e
1943060 ALLEGRO_EDITOR 3D_CANVAS Placebound bottom is not showing correctly.9 n$ Q# V* }7 q+ m
1950099 ALLEGRO_EDITOR 3D_CANVAS Place Bound Bottom is displayed on Top, when dra is opened in 3D Canvas
, M; @, S# N1 Z! { A8 E: Q1988307 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation6 Y5 L9 D( f4 L" a: ?; ^
1923585 ALLEGRO_EDITOR ARTWORK Additional unwanted subclasses appear in film control when a new film definition is added( r* K. C" b' b1 c) ?
1944079 ALLEGRO_EDITOR COLOR Export of Board Parameters (Net Colors) does not contain entries for nets with spaces
* p7 _/ w1 j) c$ x1856320 ALLEGRO_EDITOR DATABASE Donut pad fails to connect with cross-hatched shape in full contact thermal mode, despite hatch overlap of donut.
/ T' t6 C2 L, X ]+ Q0 @4 t1912313 ALLEGRO_EDITOR DATABASE Database corrupted during background process7 e: z7 Y0 x9 Q" [! W: [3 U
1913344 ALLEGRO_EDITOR DATABASE When changing accuracy of design, the thermal relief for donut pad's outer pad connects to inner pad1 L/ M, K. {# d! J+ K9 O" j/ C
1914470 ALLEGRO_EDITOR DATABASE Release 17.2-2016: export libraries command does not inherit posi/nega information
: ~% p2 J0 r) t7 N% O! l% f1932086 ALLEGRO_EDITOR DATABASE Unable to resolve DBDoctor error
2 _% E/ x0 g0 M7 v' c1963932 ALLEGRO_EDITOR DATABASE DB Doctor is not recognizing placed parts and showing them as unplaced.% |2 r) W* J2 \- B: w3 X& }
1987735 ALLEGRO_EDITOR DATABASE Interior sub-lamination backdrill holes are displayed with Top Soldermask pads where backdrill does not exist
: I+ ]* e( ]5 |7 Z& m" }( b; u, l1977622 ALLEGRO_EDITOR DFM Not able to add value '5' or multiples of 5 in in DFF constraints for maximum stacked via count( L2 }0 |( B A: L
1892809 ALLEGRO_EDITOR DRC_CONSTR NODRC_ETCH_OUTSIDE_KEEPIN property is not working on TEXT
6 i5 } Q0 z) {1894765 ALLEGRO_EDITOR DRC_CONSTR DRC for no_drc_component_board_overlap is not created if the place bound is outside Place Keepin
5 f; b) v, i) z1896627 ALLEGRO_EDITOR DRC_CONSTR Moving components takes long time while doing placement
. v* _" {$ h( u; \5 Z, ?+ b1914591 ALLEGRO_EDITOR DRC_CONSTR Spacing constraints for Mechanical to Hole shows resolved constraints different from the actual air-gap/space
) R$ T( d6 E1 _! K0 @1956468 ALLEGRO_EDITOR DRC_CONSTR DRC getting generated while moving the uvia and getting removed after updating DRC.$ G F) M$ Q: j- a& t: t3 ~
1884149 ALLEGRO_EDITOR EDIT_ETCH Arced Routing of differential pair creates unexpected arc radii& Z) X4 U3 Q) O
1891985 ALLEGRO_EDITOR EDIT_ETCH Etch edit does not follow the constraints
. x6 [( k- g7 O( e, t1860056 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes on right-click after choosing the Move command/ W/ p b, j. V7 o7 S& F4 ~
1860723 ALLEGRO_EDITOR GRAPHICS APD crashes on right-click when using the Move command, J- v9 l6 G' h7 O
1870058 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes when using Place Manual -H command* t8 G/ Y# @2 @: C6 K
1930282 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes on executing axlVisibleDesign(nil) from allegro.ilinit& P* b7 ~, I7 a+ j' z$ J" n
1882813 ALLEGRO_EDITOR INTERACTIV Unable to set the end point with 'snap pick to' when adding an arc
3 W3 r5 }% E0 C1 T1 c; m) ~1884725 ALLEGRO_EDITOR INTERACTIV Edit and Move vertex operation not working as desired7 Z. `' P# e3 ~- c2 Q2 f
1902359 ALLEGRO_EDITOR INTERACTIV Connector boundary remains ON for a layer if visibility toggles in Shape Edit application mode
M( r4 Z' }" W1909004 ALLEGRO_EDITOR INTERACTIV Parameter description showing wrong for Padless Holes under Design Parameter Editor V! V+ t3 [0 }$ C5 v- x$ v+ c$ B
1912055 ALLEGRO_EDITOR INTERACTIV PCB Editor crashes on Delete By Query - AutoSilkscreen - Find By Query4 ~0 q* M! P3 w7 _& M; ^4 e2 u V
1924503 ALLEGRO_EDITOR INTERACTIV Editing shape causes PCB Editor to crash" F( O1 B+ b5 {
1929614 ALLEGRO_EDITOR INTERACTIV Unable to Place Via Array when Staggered ring is selected in Global Ring Parameters.6 D4 o r) H0 ~ b& c7 i
1938523 ALLEGRO_EDITOR INTERACTIV Change Shape Type message is same for dynamic and static shapes7 e. N6 N G' }5 K; ~; t
1940827 ALLEGRO_EDITOR INTERACTIV Irrelevant/incorrect warning message when doing Edit- Change on Clines; ~5 H% \/ \* P1 p' N3 `
1872653 ALLEGRO_EDITOR INTERFACES DXF export shows embedded layers in the layer configuration file8 h/ p: Y4 R! V" n
1873971 ALLEGRO_EDITOR INTERFACES IDX proposal comments are not shown when importing the IDX file into Allegro5 n8 m! N' @5 r2 F; ^3 \
1892172 ALLEGRO_EDITOR INTERFACES STEP Package Mapping form needs to be larger
: d4 @, e- I& V1893311 ALLEGRO_EDITOR INTERFACES A line became two lines after import dxf! M2 Z! K. Y$ M1 Q; X, g
1937816 ALLEGRO_EDITOR INTERFACES Unit as % in Property Definition not supported by SubDrawing$ L b. m# [+ F! j
1973084 ALLEGRO_EDITOR INTERFACES Physical library not placed if design and IDF database not matched while running
1 `5 J$ y# v; }. [4 L( q3 Q+ F1987526 ALLEGRO_EDITOR INTERFACES IDX import Fails to recognize SURFACE FINISHES Class0 ?5 p) Y8 Y, Y9 n
1872856 ALLEGRO_EDITOR IN_DESIGN_ANA Message displayed when creating directed groups needs to be improved
$ L& y7 R# O1 M/ \1900832 ALLEGRO_EDITOR IN_DESIGN_ANA RTP: Return Path DRC does not check circle void correctly' d3 ~+ K7 H# ^4 _9 B3 k
1935641 ALLEGRO_EDITOR IN_DESIGN_ANA Return path DRC crashes PCB Editor
. t1 K4 {2 G0 P1649465 ALLEGRO_EDITOR MANUFACT Manufacturing options are not visible in OrCAD PCB Designer legacy menu
5 ]# x, f6 ~+ h2 P @9 n1873417 ALLEGRO_EDITOR MANUFACT Autosilk fails to add line information. Only part of the line is getting copied to the autosilk layer.
1 Z9 j/ r% z B( b5 c" [1911596 ALLEGRO_EDITOR MANUFACT Documentation Editor drill chart shows two different rows for the same slot.
?/ n" [' t- R+ G1937721 ALLEGRO_EDITOR MANUFACT Drill figure character scaled up in GERBER* L* J# E) }3 n7 t/ \! e+ }+ ]
1957768 ALLEGRO_EDITOR MANUFACT Import IPC2581 on cross-section does not import line width and impedance9 ]! E! F L0 I+ d
1969363 ALLEGRO_EDITOR MANUFACT Pressfit connector backdrill depth is considering MNC Layer
" u! k7 m4 H$ E# k* Y W9 Q2 S1891102 ALLEGRO_EDITOR MULTI_USER Rejected by server error messages when using Symphony Team Design
( E" Q5 f( q+ t) @ f$ v1928082 ALLEGRO_EDITOR MULTI_USER Unknown SubClass BOUNDARY/MULTI_USER_LOCK automatically added when defining Artwork Output.; d% d1 ?4 c& a2 s, S
1976705 ALLEGRO_EDITOR MULTI_USER Symphony client disconnects from server without any notification - despite ping mechanism! h" y" m$ J' r4 ]$ [# a b* f
1972554 ALLEGRO_EDITOR NC Mill symbol moved from Nclegend-slots-1-2 to Nclegend-1-2 subclass if nc_param.txt not present
: W) R2 x M. f1914412 ALLEGRO_EDITOR OTHER Autosilk lines do not clear padstacks that are not rectangular
: {* j8 \9 F+ ^: V& r1921933 ALLEGRO_EDITOR PAD_EDITOR column clearance cannot reset to 0 in padstack editor t! K) h( q/ q; k* D- b! ?
1922234 ALLEGRO_EDITOR PAD_EDITOR DBDoctor reports 'illegal value for pad' and does not fix when zero corner radius for Rounded Rectangle is defined
V l. w( p8 v1 S1932183 ALLEGRO_EDITOR PAD_EDITOR Drill Symbol information not exported in Padstack XML if Drill Figure in none# K, V1 R2 K; r
1934880 ALLEGRO_EDITOR PAD_EDITOR Shapes with offsets not displaying properly in Padstack Editor views, {+ q; Y: w$ ^ L7 y
1813270 ALLEGRO_EDITOR PLACEMENT When a place replicate module is updated, the vias used in thermal pad are removed
6 j G, q: |+ n1840275 ALLEGRO_EDITOR PLACEMENT Placing component with the Mirror option causing display problems
* H' q9 ?! c7 l( t( j+ i- O' H1854099 ALLEGRO_EDITOR PLACEMENT Align components to zero spacing causing mirrored components to overlap$ | n7 i; q+ v/ Z6 d+ q
1854696 ALLEGRO_EDITOR PLACEMENT Pins shown incorrectly when the Alt Symbol and Mirror commands used consecutively) n" u* @2 p4 k) _+ k
1862863 ALLEGRO_EDITOR PLACEMENT Too many messages in the command window when symbol does not support mirroring0 @( l) F+ l. |! B. d0 T
1909857 ALLEGRO_EDITOR PLACEMENT Using Mirror with Alt Symbol placement displays incorrect graphics. t W9 Y" a) h
1917128 ALLEGRO_EDITOR PLACEMENT Place - Autoplace - Room when all the components of the room are placed on board causing crash& ^* ~$ {0 h6 }$ r
1925144 ALLEGRO_EDITOR PLACEMENT PCB Editor stops responding on using the Autoplace - Room command
8 Q6 a) _! Y( h4 m' ?1961509 ALLEGRO_EDITOR PLACEMENT PCB Editor crashes on choosing Place - Autoplace -Room0 j5 D+ Z* a: w% O
1930669 ALLEGRO_EDITOR REPORTS Net 'VSS' not included in the Etch Length By Pin Pair Report
5 q$ }2 X' m) P2 j1982934 ALLEGRO_EDITOR SCRIPTS PCB Editor stops responding if Generate button is used to create script from journal file6 v! W$ k3 p8 d1 v/ j
1337346 ALLEGRO_EDITOR SHAPE Shape Check is generating problem point errors that seem unnecessary
8 Z3 Q* m# X* Z! a6 @% S1396692 ALLEGRO_EDITOR SHAPE Zcopy with expansion not following board outline/ V3 v l v- j" O m. w
1902001 ALLEGRO_EDITOR SHAPE Shape behaving differently across hotfixes. y1 z: X5 W: t; {5 n; C
1921287 ALLEGRO_EDITOR SHAPE 3D canvas is showing some stray objects
/ G" U2 T( m. J# X3 H1936482 ALLEGRO_EDITOR SHAPE Option for Fillet to not obey NO_SHAPE_CONNECT Property
* m! R' L5 J. S$ c1943899 ALLEGRO_EDITOR SHAPE Only one Shape to Route Keep In DRC in release 17.2-2016 compared to two in release 16.6
* ~& |. W- m) u: i: [5 V. \; {9 G1944041 ALLEGRO_EDITOR SHAPE shape_rki_autoclip makes shape voiding incorrect
+ {* H5 l8 K: e# O8 ^1 h1947675 ALLEGRO_EDITOR SHAPE Shape void error when dv_squarecorners is enabled
' u* Z N7 |* x1949250 ALLEGRO_EDITOR SHAPE Shapes are filled even after raising and lowering priority
& l8 D S& y3 _$ h0 Q1984526 ALLEGRO_EDITOR SHAPE Same net shape voided is inconsistent with respect to vias
$ F* c% R( {( \$ G) P! F4 o, N, }1984955 ALLEGRO_EDITOR SHAPE Dynamic shape creating same net spacing drcs.0 o" ?" K# h, _; o
1839147 ALLEGRO_EDITOR SKILL axlDBGetLength() reports that the segments of a filled rectangle shape are invalid database ID arguments+ @ s& i0 N3 S& }! C
1882776 ALLEGRO_EDITOR SKILL SKILL documentation for axlIsBetween() is wrong& s( l. ^8 |* B! D( q: j
1882882 ALLEGRO_EDITOR SKILL Example for axlMathConstants needs correction in Allegro SKILL Reference9 g/ P. D: ~8 j/ j$ w4 C, s& l
1902712 ALLEGRO_EDITOR SKILL axlAltSymbolReplace moves symbol to the top of design while replacing0 k( S7 o( x1 P& i
1906329 ALLEGRO_EDITOR SYMBOL Mechanical Pin to Conductor property set on a pin in a symbol does not pass to the board: a0 l! H8 q7 J" Y) j9 ~0 f
1911343 ALLEGRO_EDITOR UI_FORMS Global Visibility not turning all layers off, V9 |) {3 a N
1985584 ALLEGRO_EDITOR UI_FORMS Import logic changes the Current Working Directory
. R( a c5 G( Y9 }! V" q- Q" {1987829 ALLEGRO_EDITOR UI_FORMS Import logic changes the current working directory
. \. i @2 t/ Q9 e5 D' C1992722 ALLEGRO_EDITOR UI_FORMS After netlist import process, the board file is changing its current path! Z1 e8 X" H8 @% X: Q$ Y& z; d
1697506 ALLEGRO_EDITOR UI_GENERAL Stroke Editor working in OrCAD PCB Editor of release 16.6 does not work in release 17.2-20163 \, c! q; p$ i# z1 e' F2 `8 i
1702631 ALLEGRO_EDITOR UI_GENERAL Etch Length by Net report does not list correct net name for nets in a bus+ N5 d2 i) m2 G6 ]! R
1703105 ALLEGRO_EDITOR UI_GENERAL Bus net names are incorrect in reports when using the allegro_html_qt variable
5 z# {1 i0 b' g6 _9 c: t1770786 ALLEGRO_EDITOR UI_GENERAL Stroke Editor working in OrCAD PCB Editor of release 16.6 does not work in release 17.2-2016% D% _ F1 z2 A! ? ]) x
1784938 ALLEGRO_EDITOR UI_GENERAL Etch Length by Net report does not show net names with angle brackets in release 17.2-20169 x1 R8 C9 t- F' J! ^' ?1 N$ S- A
1822557 ALLEGRO_EDITOR UI_GENERAL axlUIWCloseAll is not closing text window in release 17.2-2016" x$ v2 Z$ C7 T. j5 z4 X) I
1836400 ALLEGRO_EDITOR UI_GENERAL Net names are truncated in HTML reports
: n- a; r* |# Q' O/ C1869879 ALLEGRO_EDITOR UI_GENERAL Links not working in the Net loop report
; D" E" v: t7 u( l( {1895878 ALLEGRO_EDITOR UI_GENERAL axlUIWClose()/axlUIWCloseAll() functions do not work when allegro_html_qt setting is enabled., n" k8 c; F& P# o& L- U0 o
1912282 ALLEGRO_EDITOR UI_GENERAL PCB Editor exits with error message on editing objects
8 G9 c5 w$ A) y4 q/ a1913962 ALLEGRO_EDITOR UI_GENERAL PCB Editor toolbars change on choosing View - UI Settings - Save Settings and then restarting
/ g; L/ [' T. o, x1933172 APD UI_GENERAL Cannot paste text into the command prompt without clicking when 'enable_command_window_history' is set8 ~( u& p/ f8 W
1843712 CAPTURE NETGROUPS Signals shown only for first segment of NetGroup
Q; H- ~! g; u% r" @ b/ z# s1917768 CAPTURE NEW_SYM_EDITO Missing package pin overview in Symbol editor# D+ w& i7 p: ~4 n6 D+ S
1920088 CAPTURE NEW_SYM_EDITO Package view missing in the new Symbol Editor
+ t. `& y. c3 `7 N& c8 I; A1922196 CAPTURE NEW_SYM_EDITO Snap to grid issue in Symbol editor
' O: L D* i* {1927268 CAPTURE NEW_SYM_EDITO View Package is grayed out in release 17.2-2016, hotfix 038 and later versions
! `2 Q' U, L( [/ }. w1928012 CAPTURE NEW_SYM_EDITO In new Symbol Editor, View - Package is grayed out
- P' X8 |; T u) K! n% h9 j+ g1930865 CAPTURE NEW_SYM_EDITO View Package missing in hotfix 038
- e' H+ @9 I* Z* P1938507 CAPTURE NEW_SYM_EDITO Issues with new Symbol Editor: Justification and spreadsheet usability
4 Q8 S8 W3 b5 T1940869 CAPTURE NEW_SYM_EDITO Missing pins in 'Edit Pins of All Section' table view for 4k resolution but not in 2k resolution
% F# i9 T6 Z6 ]# Y5 ?! f1940888 CAPTURE NEW_SYM_EDITO Copying pins from a part and pasting on different parts not working properly.
- e7 E# _* ^" R2 \- J0 l1942994 CAPTURE NEW_SYM_EDITO Cut / Paste of object in New Part / Symbol editor always pastes on grid
7 y- r$ ?# h3 g& K& _1944396 CAPTURE NEW_SYM_EDITO JavaScript error while copying from 'Edit Pins of All Sections'7 I8 w" m8 ~' g p0 A3 ~3 W
1950224 CAPTURE NEW_SYM_EDITO Cyrillic alphabets are not displayed properly on Schematic.
" c# n4 ~ b$ }# w+ v, G6 b0 _! t1951369 CAPTURE NEW_SYM_EDITO Cancel closes Symbol Editor+ v* ]1 P" }$ n% `, d
1966785 CAPTURE NEW_SYM_EDITO Edit Part is grayed out& `- Q9 a$ j+ t
1973135 CAPTURE NEW_SYM_EDITO Issue with new Symbol Editor: cannot copy-paste pins
) B3 ^1 H4 U4 a# _1973344 CAPTURE NEW_SYM_EDITO JavaScript error on opening part from design
$ X2 m: m! S; \6 u" x* Y4 h1974122 CAPTURE NEW_SYM_EDITO Cannot copy-paste all pin list on the new Symbol Editor
& s' i: L% S! s9 f+ _7 `5 b$ i1983593 CAPTURE NEW_SYM_EDITO Script error on copying and pasting to property sheet
# J7 ?0 ~, Q. x9 o4 u1 m; |7 J1929692 CAPTURE OPTIONS PACK_SHORT issues with Pin Numbers that contain letters/alphabets# D1 _* o4 r1 A$ j* h3 b8 f
1876939 CAPTURE OTHER Incorrect Capture renaming error (ORCAP-1310)3 ?- | y5 p8 T, P& z" ~
1916090 CAPTURE OTHER Incorrect error message when 'save as' fails due to long directory path0 y q4 L0 w/ I* Q9 C
1921927 CAPTURE OTHER Two functions are mapped to Shift + R in OrCAD Capture in hotfix 038
9 o, y0 J8 x4 v1946453 CAPTURE OTHER Shift+R shortcut is assigned to two functions.$ b0 P4 s N% T
1965456 CAPTURE OTHER Shortcut Shift + R is not opening the Independent Sources dialog box
7 t1 w7 I- g4 U( p9 k1968757 CAPTURE OTHER Close CIP is grayed when right-clicking on the tab in Capture.
" t, R/ g8 w2 X% e" p y0 W q1938437 CAPTURE PART_EDITOR OrCAD Capture new Symbol Editor Pin Type missing in table
+ F* m9 A! g. Z! i% n9 x4 V1906757 CAPTURE SCHEMATICS Intersheet reference is overlapping with the offpage connector name
7 f* D+ s# A T3 ?+ {1867016 CAPTURE SCHEMATIC_EDI Part placeholders not being positioned when moved0 z) U) L. D* g, Y* a5 l( Q
1932837 CAPTURE SCHEMATIC_EDI Parameters graphics are not correctly positioned
& Z, |! }$ Z: ^1949518 CAPTURE SCHEMATIC_EDI Getting error when comparing designs
, t% [" W0 g; h# f9 O1967545 CAPTURE SCHEMATIC_EDI Only section A of heterogeneous part being placed and not sections B, C, or D
6 T/ j2 O) V' q; b1933919 CIS DBC_CFG_WIZAR New CIS Configuration .dbc file created in release 17.2-2016 shows release 16.3
0 V- q' U+ f0 P k1932550 CIS RELATIONAL_DB VIEW NAME in Relational Database configuration is not working as expected.
: s9 h% T9 r+ d1832524 CONCEPT_HDL CHECKPLUS Default checkplus rules show body height of 0 (sym_2 of the attached cell). This causes the cell to fail verification.
/ I# k6 O7 h, F- X1912023 CONCEPT_HDL CHECKPLUS signalWidth predicate does not recognize SIG[1..0] as bus.6 F7 a6 d% I9 t' i ~
1966120 CONCEPT_HDL COPY_PROJECT Copying release 17.2-2016 project results in message stating the project is of an older version, l, d. p. X Y' A* e5 O# O
1879425 CONCEPT_HDL CORE Adding signals with the right-click menu is not following the defined color scheme$ k. {, ~* C! b6 h. A0 q% o$ ^1 @1 z( X
1890542 CONCEPT_HDL CORE Getting ERROR(SPCOCN-1911) when running export physical with backannotation
& p+ G- U6 y) c1907684 CONCEPT_HDL CORE Moving symbol makes canvas unresponsive for a long time+ g- Q; R5 p/ [% \+ U' A3 Z
1920711 CONCEPT_HDL CORE Pin names changes when mirroring the swapped section.: K, V8 m2 ?4 r4 O7 m- Q
1931421 CONCEPT_HDL CORE On Linux, 'cpmaccess -read' returns incorrect value e. u$ t n& _( Q6 g
1931782 CONCEPT_HDL CORE Setting DONT_FORCE_ORIGIN_ONGRID to ON does not work for sig_name
" w. S3 ] @8 u; |1932433 CONCEPT_HDL CORE _movetogrid causes signal disconnection. w {% C9 c; p
1946993 CONCEPT_HDL CORE DE-HDL Part Manager fails to update parts on schematic if new KEY properties exist in PTF but not in schematic
+ D5 k8 G" \: l7 |5 V! }: O1947029 CONCEPT_HDL CORE Design Entry HDL Font Support not working for signal rename" s) c3 X) P7 ]* c+ L$ G( ~
1962865 CONCEPT_HDL CORE Schematic symbol creation with '-' as pin name not packaging
$ i! u1 l5 h# L. P0 f( N' D, }/ s1966805 CONCEPT_HDL CORE Issues with packaging design containing cells named with a leading underscore; T+ t3 g. L; D
1967760 CONCEPT_HDL CORE DE-HDL crashes on moving Net Group/Port in release 17.2-2016, hotfix 044
) ~( G+ m( l" I0 N! k" y1968282 CONCEPT_HDL CORE DE-HDL Part Manager fails to update parts on schematic when new KEY properties exist in PTF and not in schematic; b6 X" k2 B1 o7 g
1972815 CONCEPT_HDL CORE Part Manager not updating missing key attributes from the ptf file by using 'Update instances' option7 G0 i2 B' {' {/ O0 P) E
1887790 CONCEPT_HDL CREFER CRefer links not working in selected cpm file
* |# l' E7 c8 A; f1898535 CONCEPT_HDL INTERFACE_DES Global Navigation window does not reflect removal of a net on page2 that is part of a netgroup on page1' b o6 u9 u& I! o
1888048 CONCEPT_HDL PDF Japanese characters are not output correctly to PDF on Linux.
S5 }: \: t/ }" A) P7 m7 w+ b$ r1937505 CONCEPT_HDL PDF Missing intersection dot in schematic PDF
6 Y& E) A' i# S" `1 S6 Q1942486 CONSTRAINT_MGR CONCEPT_HDL CM crashes when you save after importing a TCF file: H/ a u( I, Q2 `
1983743 CONSTRAINT_MGR CONCEPT_HDL Region Class-Class members are being duplicated in CM in the current session. w! o2 o4 U' ?5 h2 j
1906573 CONSTRAINT_MGR ECS_APPLY Database corrupt and DBDoctor reports illegal database pointer error3 `, @) `- d" r P
1913805 CONSTRAINT_MGR OTHER Setting environmental variable CM_PARTIAL_DCF in release 17.2-2016 causing crash; R5 M7 \6 y# r! G4 t2 ?
1914813 CONSTRAINT_MGR OTHER C++ Runtime error and non-recoverable crash in class-class worksheet, C7 ?5 J" ?- M5 Z, b
1920142 CONSTRAINT_MGR OTHER Xnet names are not consistent in the design: C5 E1 y" g" a8 Y
1898549 CONSTRAINT_MGR SCHEM_FTB Importing netlist causing crash in release 17.2-2016, hotfix 036
/ ?) y% e' j; i! O: U1814851 CONSTRAINT_MGR UI_FORMS Field solver /DRC check running forever8 t- O! H/ k/ h) Y
1889862 CONSTRAINT_MGR UI_FORMS PCB Editor hangs while assigning net voltages in CM0 |# U' k }& p3 B& y9 z$ e
1965470 CONSTRAINT_MGR UI_FORMS Constraint Manager GUI Issue in release 17.2-2016, hotfix 039: Font size small and rows/columns in shrink mode: q0 x) F7 Z- t0 S. z; p; Q
1945406 ECW ADMINISTRATIO Tree view was not refreshed soon after changing the site permission.
, |, J0 ^) a) F: {8 |% {+ E1826848 ECW METRICS SPDWECW-551 and SPDWECW-553 should be warnings, not errors
( J! N0 w) B! `1933373 ECW PROJECT_MANAG ecwbatch does not accept password and does not ignore invalid users
3 i3 K! P: R! n) p3 S/ }1921502 F2B PACKAGERXL Errors on running Export Physical:SPCOPK-1138 and SPCOPK-1149" [0 D" M! f" A4 z4 C
1929846 F2B PACKAGERXL PackagerXL is still creating the pstcmbc.dat file on a release 16.6 design uprevved to release 17.2-2016; J+ s) X1 f3 }8 P% X% M, Z
1953780 F2B PACKAGERXL Updated subdesign package information not updated on the top-level design in the reuse flow
( \7 j6 q! e, W2 }* ^: K1971738 F2B PACKAGERXL Deleting blank space from pstxnet.dat file crashing DE-HDL l( x. P( j* y8 Q# X
1891002 INSTALLATION DOWNLOAD_MGR Issue with Download Manager (Change Preferences Option does not Work)" K& {- E; N: @9 w& X: ?, ~
1972890 ORBITIO OTHER OrbitIO-APR failed to run if PCB design included
+ F \* o8 L$ S3 u1 H8 m Q% T1954262 PCB_LIBRARIAN CORE Footprint model check in fails with verification checks failed error
3 J; _( S) N6 g2 t7 n1943656 PCB_LIBRARIAN GRAPHICAL_EDI Symbol Editor is blank if .ascii file is newer than .css file
) Y5 h5 s. D- I- g* ^; G1897887 PCB_LIBRARIAN SYMBOL_EDITOR New Symbol Editor: Inconsistent symbol results when adding vector pins in Part Developer) g1 d0 V) h. l& Y, u$ b
1898003 PCB_LIBRARIAN SYMBOL_EDITOR Issue with Page Border Symbol
7 z7 p( I. ^7 s3 C+ \1842007 PSPICE LIBRARIES Change required in swit_reg.lib7 J- l% _* A4 `5 k# w
1906922 PSPICE LIBRARIES Mismatch in mapping of IC pins in model and PSpice template for analog device AD8138
* t0 T- G2 ]8 o1947586 PSPICE LIBRARIES Update the model AD8138/AD in ANLG_DEV.OLB2 X7 z7 G9 S1 F; K: N( I/ n) `& `
1748470 PSPICE MATLAB PSpice displays an error when sending current in co-simulation# y" K: D" P$ R7 y: {9 [8 u
1802455 PSPICE MATLAB Incorrect current direction for pins in SLPS flow" P# x; W1 q/ Y5 A
1852811 PSPICE MATLAB ORPSIM-2604 being reported in SLPS simulation/ U" U* m# b9 Q
1858716 PSPICE MATLAB Co-Simulation fails if 'RC' is used as reference of resistor! N- f2 c* \# f2 J8 V; }0 D; a
1921641 PSPICE MODELEDITOR Model Editor in Client Server installation slow to invoke
6 A+ X" t% [% r* O3 _1922160 PSPICE MODELING_APPS New Capture Associate Symbol GUI not reading libraries* J4 t5 @! c' |8 V( H* _, W( I
1843698 PSPICE PROBE PSpice icons appear very small on a specific computer% `! w- S! C @( J- V/ {# C' |
1773841 PSPICE SIMULATOR orSimSetup64 crashes when running the simulation for attached design: R: U; @0 \% ]. s. o8 M+ B% ?
1816316 PSPICE SIMULATOR Simulation stuck; however, the status bar is correctly updated during Pseudo Transient Analysis
& A1 K0 o) Z; L1887119 SCM IMPORTS Cannot selectively update changes in VDD
1 W, Y; v6 j9 |, d' z4 A% }/ t) b1889362 SCM IMPORTS Cannot selectively update changes in Visual Design Differences
2 F4 l1 C+ o5 j8 d7 S- S" S! M1958545 SCM SETUP Auto assign models does not work in SCM same way as in DE-HDL& U+ K1 F2 K$ }
1988841 SIG_EXPLORER INTERACTIV SigXplorer stops responding or crashes in hotfix 047 when a design is saved; x$ G( B( e6 y* y, s
1988943 SIG_EXPLORER INTERACTIV SigXplorer crashes on selecting Update Constraint Manager
7 i% R! m+ w, }- J- T) V3 v0 X1991375 SIG_EXPLORER INTERACTIV SigXplorer crashes when clicking Save5 ~5 d9 } |8 P* |( n
1993749 SIG_EXPLORER INTERACTIV SigXplorer crashes on saving topology7 E" q& I5 O$ ~; \& E& H9 E& _
1969975 SIG_INTEGRITY GUI Model Browser edits model above the one that is selected8 @% j, T9 f8 \, r
1953184 SIP_LAYOUT IMPORT_DATA Sub Drawing not saving dashed lines8 T5 {4 C, M9 \6 P. @2 Y+ s
1913864 SIP_LAYOUT ORBITIO_IF SiP Layout design import results in wrong die rotation
; F6 t/ T; p4 t6 V" |' m1880237 SIP_LAYOUT PADSTACK_EDIT Background Window comes to the forefront when closing the Padstack editor
; Y6 g' j" ~5 O& x1972560 SIP_LAYOUT STREAM_IF GDS Export fidelity issue: inverted arcs& }& J. l! G& O( g; p
1920317 SIP_LAYOUT THIEVING Thieving pattern does not allow for OOPS operation9 Q% ]- P& Y" `% D7 c5 ~# h
1909075 SYSTEMSI DOC SystemSI PBA channel and circuit simulations do not respond if bit pattern is 1s or 0s
% v5 x! G4 f* K4 d1916101 SYSTEMSI DOC Lack of stimulus in file causes Serial Link Analysis to become unresponsive
$ ]- a0 M1 V, q$ K1919562 SYSTEMSI ENG_PBA SystemSI generates wrong timing bathtub curves in channel simulations for write and read
2 }; i9 {9 S9 e1964064 SYSTEMSI GUI_PBA Able to sweep AMI parameters in SSI-PBA
; ?7 c' }) x% D) m( } m! k1971266 SYSTEMSI GUI_PBA MCP header shows only 49 ckt nodes instead of 52 for s52p S-parameter file. [/ S8 ?) M2 v+ E
1885625 SYSTEMSI GUI_SLA Manage AMI + DLL from Setup Analysis Window1 D) B* f1 ^3 q9 R
1924382 SYSTEMSI GUI_SLA Data Rate field in SystemSI Stimulus property form is confusing for PAM4 operation# `8 q# w6 _$ H" F& _
1982341 SYSTEM_CAPTURE CANVAS_EDIT Signal rename does not maintain new signal name value4 p4 J9 ]# m, E' a5 _$ [" G6 m, w
1976857 SYSTEM_CAPTURE CONSTRAINT_MA System Capture-CM Match Group Creation is not updating correctly" C3 g, y2 Q+ s2 N1 d/ J: x4 y
1929606 SYSTEM_CAPTURE DESIGN_CORRUP Opening design causes System Capture to crash
# w4 Y# @! s. |7 b1914697 SYSTEM_CAPTURE DRC Overlapping component DRC does not work+ e$ Y( W4 M" W& @' t5 f
1973467 SYSTEM_CAPTURE IMPORT_PCB System Capture Import Physical shows many component and physical differences on a design that is synced up9 q, d; U$ c4 i# ^5 @: {$ k0 R
1962603 SYSTEM_CAPTURE NAVLINKS Ability to not underline hyperlinks for Navigation Link values
' d# x% J4 `# w/ J [% o8 k( R1967639 SYSTEM_CAPTURE PART_MANAGER Part Manager does not open in System Capture for part property value changes even after setting the cpm directive.
2 Y; c: P9 I) j& c9 P1964388 SYSTEM_CAPTURE SMART_PDF Some shapes are not visible in the smart PDF schematics
9 _% J4 I$ K6 |6 h. R1976832 SYSTEM_CAPTURE TDO Rolling Back local lower-block requires check-out of higher-level packaged & variant views
5 e D- x& H/ b( ]4 \1976844 SYSTEM_CAPTURE TDO CM - TDO check-out dependencies are broken
! |1 Z0 f& ?$ |* ^! B; [1976859 SYSTEM_CAPTURE TDO Variant Editor in System Capture -TDO allows to delete a variant without checking out variants view% f6 R6 B- J9 a4 ~# O, G
1839816 TDA CORE All the design objects are locked in the EDM dashboard after a DSFrame error
+ A: n' Y( ]0 b5 @! z; ^1889898 TDA CORE Cannot check in the top level of the project in TDO
( ]# R) I2 e) \$ B; ^5 ?0 U. c1892411 TDA CORE Unable to undo the block checkout if something fails7 l& K, |- d: A
1877757 TDA DEHDL Refresh Hierarchy does not show latest TDO lock/unlock status in DE-HDL1 X. Q n5 g! b# c. X. n
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