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本帖最后由 i4dm99 于 2018-10-24 10:05 编辑
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感谢分享，能共享一下都更新了哪些内容吗
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( X6 z: Q0 w' A6 q4 \, V! D**************************************************************4 _6 M% u& y; k5 Z
Fixed CCRs: SPB 17.2 HF048
7 a9 `2 ~0 {) L10-13-2018* v* m. h1 { U# P- @5 \3 u8 P1 h4 Y
========================================================================================================================================================$ |, w2 s1 o3 w- n
CCRID Product ProductLevel2 Title
( B( ]& @" X, {2 ^" W9 z/ ?========================================================================================================================================================
8 n5 E9 B9 E h+ K4 U2 n1913039 ADW ADWSERVER EDM Library Server exits with error message on starting library server service
2 ^. p4 p% V) p) @( ^, i$ f1709155 ADW COMPONENT_BRO Search query does not search for all the parts in the library
1 I4 I% W0 V7 }1827231 ADW COMPONENT_BRO Clicking the 'a' key in Part Manager launched from DE-HDL crashes DE-HDL
- h. M1 m. ] w; X; \- q8 W* J$ P" F1903818 ADW COMPONENT_BRO Parts that have comment_body do not display version
8 f m. v5 o0 O+ r1917961 ADW COMPONENT_BRO Component Browser PPL column values are truncated when selecting the top '*' filter
; j+ |% f, r9 ]7 v9 D# g1938172 ADW COMPONENT_BRO Symbol version with COMMENT_BODY set to TRUE cannot be instantiated
: r0 b$ T% v! v. S, w5 H" j1914103 ADW CONF conf creates incorrect path in fetch_dump.ini when MLR is enabled.% N9 t' C& O6 v5 B# h* p, c
1911422 ADW DBADMIN RuleP101 - PACK_TYPE check against schematic model not working
/ R( B5 ^; ~; \( s) p( O" E4 X1926691 ADW DBEDITOR Adding a new classification and immediately trying to delete it results in errors* z7 Q0 {1 R5 Z( \5 g
1926694 ADW DBEDITOR Renaming a classification and then renaming it back to the original results in error
7 {' q+ C8 D9 J1934870 ADW DBEDITOR Adding a new classification and immediately trying to delete it results in errors
, k) x& y V) }/ ?1872387 ADW DSN_MIGRATION Design Migration does not cache all used parts into flatlib/part_table.ptf# @) Q6 J: N4 w4 Q2 w
1254292 ADW FLOW_MGR Flow Manager Open Last Project should open last project closed
* {8 E( Z+ H( r, _7 K; ]1281817 ADW FLOW_MGR '-proj' switch in 'pcbdw_fm' does not work; launches Flow Manager without loading any project* n# t! A) T) t# F5 F% O' v
1727286 ADW FLOW_MGR Product options for PCB SI and Power Integrity are incorrect in the flow and tool launchers5 U# B9 b5 x* J* u: \ m8 C
1875498 ADW FLOW_MGR EDM fails to open or becomes unresponsive.
7 Z+ J- S8 ~& ^" _0 r5 ]1879386 ADW FLOW_MGR Unable to access COS with the default Firefox version in the 17.2 installation
0 n( C! T; t; y2 }6 [+ g' d1922541 ADW FLOW_MGR Warning message for unavailability of Java version appears on opening a project on Linux2 L. h; T! z& f! P/ J& d8 Z& \/ c
1945451 ADW FLOW_MGR Checklist does not work with two-byte characters( Z8 ^, W" t3 x/ _
1956213 ADW FLOW_MGR Not able to invoke Flow Manager on the remote system
! l' [' `/ D1 v% u. w! r1892285 ADW LIBDISTRIBUTI Symbol not consistently available in 16.6 ADW Library
, X6 W( J! ~6 t* m1961731 ADW LIBIMPORT libimport fails to create tar for two Capture models/ g+ V, Z# }7 |( I
1836620 ADW LRM Library Revision Manager crashes on clicking Help* z8 u' s! h" v- V- n
1961845 ADW PART_BROWSER Error regarding environment variable \, I$ V" [" D7 x
1890782 ADW TDA Launching TDO dashboard connected to PLM returns a license error3 \. h% B8 U$ S/ W
1980914 ADW TDA Cannot start Design Entry HDL and Component Browser in a TDO design: L& }; a" ^8 k- q! l+ U
1833750 ALLEGRO_EDITOR 3D_CANVAS Soldermask Text is not shown in 3D Canvas3 L2 a: j- w4 b* p1 y& _
1891230 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas Viewer not bending PCB with proper radius
& _& ]; n5 p# N; R6 b1 k4 D/ x$ R1913338 ALLEGRO_EDITOR 3D_CANVAS STEP models missing from exported .stp file9 d2 a3 I* X8 Q! v) V8 z9 d
1927507 ALLEGRO_EDITOR 3D_CANVAS Get Error: All bend operations are disabled due to licensing and/or DLL installation issues on invoking 3D Canvas
- m3 c" G/ F& `1931508 ALLEGRO_EDITOR 3D_CANVAS Place Bound Bottom is displayed on Top, when dra is opened in 3D Canvas
# g- Z4 Z' G4 e, _( S8 v1 u" F, B& F1943060 ALLEGRO_EDITOR 3D_CANVAS Placebound bottom is not showing correctly.
) K1 D3 v' e" |/ t' g+ W1 | q1950099 ALLEGRO_EDITOR 3D_CANVAS Place Bound Bottom is displayed on Top, when dra is opened in 3D Canvas
5 [* G( |& D9 P7 G0 x. A1988307 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation0 n0 w/ [, h+ W; J9 x
1923585 ALLEGRO_EDITOR ARTWORK Additional unwanted subclasses appear in film control when a new film definition is added% [# [* |6 J% }. z! u
1944079 ALLEGRO_EDITOR COLOR Export of Board Parameters (Net Colors) does not contain entries for nets with spaces2 e$ ^( b1 ~+ L
1856320 ALLEGRO_EDITOR DATABASE Donut pad fails to connect with cross-hatched shape in full contact thermal mode, despite hatch overlap of donut.( W# i) [$ x3 t" @% N1 @' ~
1912313 ALLEGRO_EDITOR DATABASE Database corrupted during background process5 q) F5 ^$ h( T7 _) y
1913344 ALLEGRO_EDITOR DATABASE When changing accuracy of design, the thermal relief for donut pad's outer pad connects to inner pad
Y0 y- J7 u/ _/ j/ e3 M' V1914470 ALLEGRO_EDITOR DATABASE Release 17.2-2016: export libraries command does not inherit posi/nega information
, ^; q) M. s4 f2 O! {1 @9 A# j& M1932086 ALLEGRO_EDITOR DATABASE Unable to resolve DBDoctor error: f, \6 R x) s4 m
1963932 ALLEGRO_EDITOR DATABASE DB Doctor is not recognizing placed parts and showing them as unplaced.: V' U9 D1 ?2 G9 C6 \$ V
1987735 ALLEGRO_EDITOR DATABASE Interior sub-lamination backdrill holes are displayed with Top Soldermask pads where backdrill does not exist- g! `% X4 l# \7 J
1977622 ALLEGRO_EDITOR DFM Not able to add value '5' or multiples of 5 in in DFF constraints for maximum stacked via count
) G# T/ c+ `9 x& c; z+ f1 O$ v9 _6 j1892809 ALLEGRO_EDITOR DRC_CONSTR NODRC_ETCH_OUTSIDE_KEEPIN property is not working on TEXT3 g2 A) k2 [' Y4 X, O; o$ @" L1 F
1894765 ALLEGRO_EDITOR DRC_CONSTR DRC for no_drc_component_board_overlap is not created if the place bound is outside Place Keepin
" K0 m4 E0 `# o( v( k5 Y' `1896627 ALLEGRO_EDITOR DRC_CONSTR Moving components takes long time while doing placement
6 P( l6 p! ?& O1914591 ALLEGRO_EDITOR DRC_CONSTR Spacing constraints for Mechanical to Hole shows resolved constraints different from the actual air-gap/space
6 v, E, d. A, Y8 i) o8 O$ w) v1956468 ALLEGRO_EDITOR DRC_CONSTR DRC getting generated while moving the uvia and getting removed after updating DRC./ k" |5 X! X. U7 c
1884149 ALLEGRO_EDITOR EDIT_ETCH Arced Routing of differential pair creates unexpected arc radii
5 I- y$ N' W. g. B1891985 ALLEGRO_EDITOR EDIT_ETCH Etch edit does not follow the constraints( J3 q. w5 I/ h" o
1860056 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes on right-click after choosing the Move command
- `5 d6 h# |; t1 v o2 n1860723 ALLEGRO_EDITOR GRAPHICS APD crashes on right-click when using the Move command$ W* }1 d L8 w8 ^3 I
1870058 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes when using Place Manual -H command. K4 K Z m. r: W5 O+ J$ k
1930282 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes on executing axlVisibleDesign(nil) from allegro.ilinit: q3 c! q" Y9 V
1882813 ALLEGRO_EDITOR INTERACTIV Unable to set the end point with 'snap pick to' when adding an arc. y5 C& C# k# @' e' t! x+ n
1884725 ALLEGRO_EDITOR INTERACTIV Edit and Move vertex operation not working as desired
$ b* l2 k' f+ f+ J/ z1902359 ALLEGRO_EDITOR INTERACTIV Connector boundary remains ON for a layer if visibility toggles in Shape Edit application mode) \" {. Z! _+ C) x: u/ h9 x) x( V/ `
1909004 ALLEGRO_EDITOR INTERACTIV Parameter description showing wrong for Padless Holes under Design Parameter Editor
- p+ R" M' q* [% _! M- g7 g1912055 ALLEGRO_EDITOR INTERACTIV PCB Editor crashes on Delete By Query - AutoSilkscreen - Find By Query* |) I8 w1 r) c* Y8 F8 ~$ b6 }
1924503 ALLEGRO_EDITOR INTERACTIV Editing shape causes PCB Editor to crash
# p# D% U9 V: Q& L! i d7 {, _1929614 ALLEGRO_EDITOR INTERACTIV Unable to Place Via Array when Staggered ring is selected in Global Ring Parameters.
6 z I; z1 t |5 y1 k* V1938523 ALLEGRO_EDITOR INTERACTIV Change Shape Type message is same for dynamic and static shapes0 I o& N# r/ u K) S
1940827 ALLEGRO_EDITOR INTERACTIV Irrelevant/incorrect warning message when doing Edit- Change on Clines; Y1 c* f6 x7 z& W9 q+ V* R# ~
1872653 ALLEGRO_EDITOR INTERFACES DXF export shows embedded layers in the layer configuration file
" ?' ~4 F# E5 ?% O2 e5 R3 Q, n& j1873971 ALLEGRO_EDITOR INTERFACES IDX proposal comments are not shown when importing the IDX file into Allegro
$ u( ] X7 A8 }* R( i% [, e( Z- b1892172 ALLEGRO_EDITOR INTERFACES STEP Package Mapping form needs to be larger+ N0 k# @, z# d0 n4 Y; G
1893311 ALLEGRO_EDITOR INTERFACES A line became two lines after import dxf7 ~3 ~: @; {& l
1937816 ALLEGRO_EDITOR INTERFACES Unit as % in Property Definition not supported by SubDrawing8 E! d5 O# j9 X2 J: }
1973084 ALLEGRO_EDITOR INTERFACES Physical library not placed if design and IDF database not matched while running
2 ~5 T# n; U' n! B' K1987526 ALLEGRO_EDITOR INTERFACES IDX import Fails to recognize SURFACE FINISHES Class+ }9 Q4 \% E8 O5 X: ]$ y+ @5 n' k
1872856 ALLEGRO_EDITOR IN_DESIGN_ANA Message displayed when creating directed groups needs to be improved& V4 [9 b8 ^6 z, _! h' R$ }
1900832 ALLEGRO_EDITOR IN_DESIGN_ANA RTP: Return Path DRC does not check circle void correctly
6 L' y/ g! B+ s( O1935641 ALLEGRO_EDITOR IN_DESIGN_ANA Return path DRC crashes PCB Editor
+ ~2 d: R# ^. x- Y: Q: F9 [# {1649465 ALLEGRO_EDITOR MANUFACT Manufacturing options are not visible in OrCAD PCB Designer legacy menu
" b5 r# C$ e/ y0 ?7 Y# V0 B1873417 ALLEGRO_EDITOR MANUFACT Autosilk fails to add line information. Only part of the line is getting copied to the autosilk layer.
+ n3 p* R: R6 c/ G: Y! r5 n+ R9 B$ B1911596 ALLEGRO_EDITOR MANUFACT Documentation Editor drill chart shows two different rows for the same slot.
5 h1 i- i+ v/ _2 x1937721 ALLEGRO_EDITOR MANUFACT Drill figure character scaled up in GERBER
/ G" Q$ \% h7 m! Y g2 I1957768 ALLEGRO_EDITOR MANUFACT Import IPC2581 on cross-section does not import line width and impedance
! `- }4 |4 V2 p/ ?' b1969363 ALLEGRO_EDITOR MANUFACT Pressfit connector backdrill depth is considering MNC Layer" q& x% g* j6 V. d& C
1891102 ALLEGRO_EDITOR MULTI_USER Rejected by server error messages when using Symphony Team Design2 d) Q2 i9 _" C1 v+ c
1928082 ALLEGRO_EDITOR MULTI_USER Unknown SubClass BOUNDARY/MULTI_USER_LOCK automatically added when defining Artwork Output.
2 k R; @- w1 q1976705 ALLEGRO_EDITOR MULTI_USER Symphony client disconnects from server without any notification - despite ping mechanism: V8 {( W7 e, X* d2 q
1972554 ALLEGRO_EDITOR NC Mill symbol moved from Nclegend-slots-1-2 to Nclegend-1-2 subclass if nc_param.txt not present
/ X) k R1 {. {7 w& l! f5 T1914412 ALLEGRO_EDITOR OTHER Autosilk lines do not clear padstacks that are not rectangular
$ G: ^( Z6 i, g" p* |: F1921933 ALLEGRO_EDITOR PAD_EDITOR column clearance cannot reset to 0 in padstack editor) b4 R: [' ?, D# j
1922234 ALLEGRO_EDITOR PAD_EDITOR DBDoctor reports 'illegal value for pad' and does not fix when zero corner radius for Rounded Rectangle is defined+ i$ w) e9 O v( q* v9 M* E" y
1932183 ALLEGRO_EDITOR PAD_EDITOR Drill Symbol information not exported in Padstack XML if Drill Figure in none
{# H) P( ]( }1934880 ALLEGRO_EDITOR PAD_EDITOR Shapes with offsets not displaying properly in Padstack Editor views% \* y4 n! u* k8 g( @9 U
1813270 ALLEGRO_EDITOR PLACEMENT When a place replicate module is updated, the vias used in thermal pad are removed
% {$ h4 V& m- E9 Y! r1 T% I2 ~ g1840275 ALLEGRO_EDITOR PLACEMENT Placing component with the Mirror option causing display problems
0 C4 a1 P8 W- }# h. V" X' g1854099 ALLEGRO_EDITOR PLACEMENT Align components to zero spacing causing mirrored components to overlap
0 ?/ B$ k' ^5 `# ] O. Y1854696 ALLEGRO_EDITOR PLACEMENT Pins shown incorrectly when the Alt Symbol and Mirror commands used consecutively
! H* Z( e I1 p% A: l1862863 ALLEGRO_EDITOR PLACEMENT Too many messages in the command window when symbol does not support mirroring5 m+ e W, S6 ^' D1 x
1909857 ALLEGRO_EDITOR PLACEMENT Using Mirror with Alt Symbol placement displays incorrect graphics' r5 y8 N8 x% H% v2 P2 D* F
1917128 ALLEGRO_EDITOR PLACEMENT Place - Autoplace - Room when all the components of the room are placed on board causing crash
' u' G5 t: m, F0 ^9 J; E& p1925144 ALLEGRO_EDITOR PLACEMENT PCB Editor stops responding on using the Autoplace - Room command
+ Y: E" C' @! ]) R1961509 ALLEGRO_EDITOR PLACEMENT PCB Editor crashes on choosing Place - Autoplace -Room
6 a' {# f3 ~* u9 p1930669 ALLEGRO_EDITOR REPORTS Net 'VSS' not included in the Etch Length By Pin Pair Report
% S" F R1 S6 u# f1982934 ALLEGRO_EDITOR SCRIPTS PCB Editor stops responding if Generate button is used to create script from journal file
9 Q& t$ Y7 i$ Z) ~. g4 ^' I1337346 ALLEGRO_EDITOR SHAPE Shape Check is generating problem point errors that seem unnecessary0 T: {3 b2 Q7 h& C9 n3 o0 y5 D; ^
1396692 ALLEGRO_EDITOR SHAPE Zcopy with expansion not following board outline
/ _# q' z. L# x2 f* C! |1902001 ALLEGRO_EDITOR SHAPE Shape behaving differently across hotfixes9 z' V3 ]6 g" m/ J6 C& l
1921287 ALLEGRO_EDITOR SHAPE 3D canvas is showing some stray objects
$ R# C( P7 ^: p2 Z1936482 ALLEGRO_EDITOR SHAPE Option for Fillet to not obey NO_SHAPE_CONNECT Property
4 x0 n$ [1 E& ?1943899 ALLEGRO_EDITOR SHAPE Only one Shape to Route Keep In DRC in release 17.2-2016 compared to two in release 16.64 [" y+ t+ m+ s
1944041 ALLEGRO_EDITOR SHAPE shape_rki_autoclip makes shape voiding incorrect
L5 ]/ C" o+ b" s4 }6 d4 j- s4 L1947675 ALLEGRO_EDITOR SHAPE Shape void error when dv_squarecorners is enabled
' V5 H3 B; d2 B. ?* j$ N2 G1949250 ALLEGRO_EDITOR SHAPE Shapes are filled even after raising and lowering priority: X. ?5 ^$ R: G7 V. P
1984526 ALLEGRO_EDITOR SHAPE Same net shape voided is inconsistent with respect to vias$ h N& |$ x* E# U. F# p8 K
1984955 ALLEGRO_EDITOR SHAPE Dynamic shape creating same net spacing drcs.& p- [" U; r5 a B1 Q* b f
1839147 ALLEGRO_EDITOR SKILL axlDBGetLength() reports that the segments of a filled rectangle shape are invalid database ID arguments
* r3 ~5 G9 z* e* l- k Q T' h1882776 ALLEGRO_EDITOR SKILL SKILL documentation for axlIsBetween() is wrong
U# Q6 p, ?7 u8 w3 V/ D) R1882882 ALLEGRO_EDITOR SKILL Example for axlMathConstants needs correction in Allegro SKILL Reference
6 z- j, B2 ~4 u2 q1902712 ALLEGRO_EDITOR SKILL axlAltSymbolReplace moves symbol to the top of design while replacing i- `7 y# w" t0 ?" Z
1906329 ALLEGRO_EDITOR SYMBOL Mechanical Pin to Conductor property set on a pin in a symbol does not pass to the board' {( L/ O) O: b" `8 J7 n
1911343 ALLEGRO_EDITOR UI_FORMS Global Visibility not turning all layers off
7 H- G- T/ `9 \ H7 O7 j: g1985584 ALLEGRO_EDITOR UI_FORMS Import logic changes the Current Working Directory4 ]7 J$ _0 Z( z1 S' r: `; J: [
1987829 ALLEGRO_EDITOR UI_FORMS Import logic changes the current working directory$ U8 {5 O6 J+ n4 h0 S$ z( L% ?
1992722 ALLEGRO_EDITOR UI_FORMS After netlist import process, the board file is changing its current path
5 L* C5 w# S/ S P$ h" ~1697506 ALLEGRO_EDITOR UI_GENERAL Stroke Editor working in OrCAD PCB Editor of release 16.6 does not work in release 17.2-2016
. \7 S5 E9 S1 u* K5 K* B1702631 ALLEGRO_EDITOR UI_GENERAL Etch Length by Net report does not list correct net name for nets in a bus4 C% ^7 q9 [' [9 T5 |
1703105 ALLEGRO_EDITOR UI_GENERAL Bus net names are incorrect in reports when using the allegro_html_qt variable
9 q+ x+ f5 B: a6 O1770786 ALLEGRO_EDITOR UI_GENERAL Stroke Editor working in OrCAD PCB Editor of release 16.6 does not work in release 17.2-20169 b# ]- N* X# t# t( W, b* y- B; V
1784938 ALLEGRO_EDITOR UI_GENERAL Etch Length by Net report does not show net names with angle brackets in release 17.2-2016
8 s5 t2 }2 z0 |# }) v$ u/ H# q1822557 ALLEGRO_EDITOR UI_GENERAL axlUIWCloseAll is not closing text window in release 17.2-2016
" l$ A6 f; v6 l2 g& R, q/ v1836400 ALLEGRO_EDITOR UI_GENERAL Net names are truncated in HTML reports
+ x5 _8 f0 K( a7 W$ B1869879 ALLEGRO_EDITOR UI_GENERAL Links not working in the Net loop report
5 T7 O$ F7 W, V4 q$ p1895878 ALLEGRO_EDITOR UI_GENERAL axlUIWClose()/axlUIWCloseAll() functions do not work when allegro_html_qt setting is enabled.
4 R& i; q- X3 p+ T1912282 ALLEGRO_EDITOR UI_GENERAL PCB Editor exits with error message on editing objects" F0 U3 ? A9 R- ^* q2 R
1913962 ALLEGRO_EDITOR UI_GENERAL PCB Editor toolbars change on choosing View - UI Settings - Save Settings and then restarting
# Z7 v/ } D! s2 w2 J5 { O$ W1933172 APD UI_GENERAL Cannot paste text into the command prompt without clicking when 'enable_command_window_history' is set
+ j3 f, _$ k" I7 \1843712 CAPTURE NETGROUPS Signals shown only for first segment of NetGroup
3 B5 s. Q. s' k1 K& M; O0 |0 y- B1917768 CAPTURE NEW_SYM_EDITO Missing package pin overview in Symbol editor) M3 i: B5 K. I" R) ?* M
1920088 CAPTURE NEW_SYM_EDITO Package view missing in the new Symbol Editor. ^8 z1 m" B" \
1922196 CAPTURE NEW_SYM_EDITO Snap to grid issue in Symbol editor
, Z2 @+ L8 u1 H8 q2 o1927268 CAPTURE NEW_SYM_EDITO View Package is grayed out in release 17.2-2016, hotfix 038 and later versions: ]% G/ T) N7 H4 @& b, _
1928012 CAPTURE NEW_SYM_EDITO In new Symbol Editor, View - Package is grayed out+ t% I/ k) {" u9 `% S( W% F
1930865 CAPTURE NEW_SYM_EDITO View Package missing in hotfix 038
. B: [5 g- T R) o7 j1938507 CAPTURE NEW_SYM_EDITO Issues with new Symbol Editor: Justification and spreadsheet usability
5 g/ w+ F8 \! p% l7 \1940869 CAPTURE NEW_SYM_EDITO Missing pins in 'Edit Pins of All Section' table view for 4k resolution but not in 2k resolution
, y2 h4 m+ e: B1940888 CAPTURE NEW_SYM_EDITO Copying pins from a part and pasting on different parts not working properly.
' J' J! i0 K) h6 S" X" P1942994 CAPTURE NEW_SYM_EDITO Cut / Paste of object in New Part / Symbol editor always pastes on grid
5 J1 K8 n H3 ^% Q) g1944396 CAPTURE NEW_SYM_EDITO JavaScript error while copying from 'Edit Pins of All Sections'
1 N- E" N, u& H: m$ o1950224 CAPTURE NEW_SYM_EDITO Cyrillic alphabets are not displayed properly on Schematic.
7 s* j3 W+ g+ h* Y* i) O5 X* W1951369 CAPTURE NEW_SYM_EDITO Cancel closes Symbol Editor
E) P# U( Y: @8 \& |3 e) R9 D1966785 CAPTURE NEW_SYM_EDITO Edit Part is grayed out
% K% H8 ~0 I( a- z; b1973135 CAPTURE NEW_SYM_EDITO Issue with new Symbol Editor: cannot copy-paste pins
: f: n& W+ W* f2 a) R5 [1973344 CAPTURE NEW_SYM_EDITO JavaScript error on opening part from design7 F b! D0 q0 N& }! ?
1974122 CAPTURE NEW_SYM_EDITO Cannot copy-paste all pin list on the new Symbol Editor2 z6 X1 v" S+ N* r9 B
1983593 CAPTURE NEW_SYM_EDITO Script error on copying and pasting to property sheet
8 d% v. @" }6 z$ V4 r1929692 CAPTURE OPTIONS PACK_SHORT issues with Pin Numbers that contain letters/alphabets2 a. s' O. N! o6 u& U
1876939 CAPTURE OTHER Incorrect Capture renaming error (ORCAP-1310)
0 i. J r- _$ j% o/ \) F1916090 CAPTURE OTHER Incorrect error message when 'save as' fails due to long directory path
/ v5 O1 k3 b, a7 d$ \4 O7 u" r1921927 CAPTURE OTHER Two functions are mapped to Shift + R in OrCAD Capture in hotfix 038
* K) B u! z/ T6 v4 s, {( y1946453 CAPTURE OTHER Shift+R shortcut is assigned to two functions.& j# z* o$ [2 l* |. [2 @2 z
1965456 CAPTURE OTHER Shortcut Shift + R is not opening the Independent Sources dialog box
2 N5 r& y7 M2 b, h' V2 V0 w1968757 CAPTURE OTHER Close CIP is grayed when right-clicking on the tab in Capture." ?" a/ o( M5 m2 G" {* E
1938437 CAPTURE PART_EDITOR OrCAD Capture new Symbol Editor Pin Type missing in table$ ^8 C3 c- r0 Y/ s* T3 x9 A0 p
1906757 CAPTURE SCHEMATICS Intersheet reference is overlapping with the offpage connector name
# H: Z: e; S9 A5 y- _) w+ L1867016 CAPTURE SCHEMATIC_EDI Part placeholders not being positioned when moved5 |& u! T1 m3 a6 Q5 }
1932837 CAPTURE SCHEMATIC_EDI Parameters graphics are not correctly positioned
5 C- X* L) l2 ^$ i1 K1 B1 u1949518 CAPTURE SCHEMATIC_EDI Getting error when comparing designs
) S4 Z4 N( r* r4 k% X) L1967545 CAPTURE SCHEMATIC_EDI Only section A of heterogeneous part being placed and not sections B, C, or D$ c$ n* ]& J' X0 j1 G
1933919 CIS DBC_CFG_WIZAR New CIS Configuration .dbc file created in release 17.2-2016 shows release 16.3
& F* J7 M: ~1 C; y1932550 CIS RELATIONAL_DB VIEW NAME in Relational Database configuration is not working as expected.
* J1 }) q, o: E9 G" y/ m1 v1832524 CONCEPT_HDL CHECKPLUS Default checkplus rules show body height of 0 (sym_2 of the attached cell). This causes the cell to fail verification.
0 ^& g. }4 o) x6 f: Q8 C1912023 CONCEPT_HDL CHECKPLUS signalWidth predicate does not recognize SIG[1..0] as bus.- S$ x, y. Z# D6 O) l$ o7 e
1966120 CONCEPT_HDL COPY_PROJECT Copying release 17.2-2016 project results in message stating the project is of an older version
9 m G' l+ _+ s! u4 Y, o1879425 CONCEPT_HDL CORE Adding signals with the right-click menu is not following the defined color scheme$ P; g. C# ?9 ~1 @9 g" N6 W( @: `/ f) K
1890542 CONCEPT_HDL CORE Getting ERROR(SPCOCN-1911) when running export physical with backannotation
* y7 V0 ^, M+ a1907684 CONCEPT_HDL CORE Moving symbol makes canvas unresponsive for a long time
% Q/ P, B) y8 o/ S, E: E! n1920711 CONCEPT_HDL CORE Pin names changes when mirroring the swapped section.# ^8 O4 `: b* T: p. w# b4 J
1931421 CONCEPT_HDL CORE On Linux, 'cpmaccess -read' returns incorrect value
& h7 y( E A% S1931782 CONCEPT_HDL CORE Setting DONT_FORCE_ORIGIN_ONGRID to ON does not work for sig_name# }# F7 H9 ]1 }9 N! i+ `+ W- l
1932433 CONCEPT_HDL CORE _movetogrid causes signal disconnection
. x1 x+ [) M/ X/ c9 T, M b- k1946993 CONCEPT_HDL CORE DE-HDL Part Manager fails to update parts on schematic if new KEY properties exist in PTF but not in schematic7 Z- i+ ~2 b$ p( Y& d
1947029 CONCEPT_HDL CORE Design Entry HDL Font Support not working for signal rename
' J G A5 k9 f o V Y1962865 CONCEPT_HDL CORE Schematic symbol creation with '-' as pin name not packaging) @, _7 \* D% p9 O; I% [
1966805 CONCEPT_HDL CORE Issues with packaging design containing cells named with a leading underscore& z& Z3 b/ f" v
1967760 CONCEPT_HDL CORE DE-HDL crashes on moving Net Group/Port in release 17.2-2016, hotfix 044
" ^/ ]3 d, e2 ^" {1968282 CONCEPT_HDL CORE DE-HDL Part Manager fails to update parts on schematic when new KEY properties exist in PTF and not in schematic
0 ]( m, Y: L/ I+ @+ u1972815 CONCEPT_HDL CORE Part Manager not updating missing key attributes from the ptf file by using 'Update instances' option
6 V6 S" d* g0 p7 d+ b1887790 CONCEPT_HDL CREFER CRefer links not working in selected cpm file
0 e. d4 N" f0 q' z( P1898535 CONCEPT_HDL INTERFACE_DES Global Navigation window does not reflect removal of a net on page2 that is part of a netgroup on page1
) Y& ^3 f8 G7 I1 c9 {- `1888048 CONCEPT_HDL PDF Japanese characters are not output correctly to PDF on Linux.8 l; l* w1 I: J$ e
1937505 CONCEPT_HDL PDF Missing intersection dot in schematic PDF7 p" D/ U: w" C% O! K
1942486 CONSTRAINT_MGR CONCEPT_HDL CM crashes when you save after importing a TCF file1 v9 z' x$ X; b
1983743 CONSTRAINT_MGR CONCEPT_HDL Region Class-Class members are being duplicated in CM in the current session- O0 x4 S, L" ?0 r% b
1906573 CONSTRAINT_MGR ECS_APPLY Database corrupt and DBDoctor reports illegal database pointer error
+ _2 v- r' d! n# G6 m" ]5 P1913805 CONSTRAINT_MGR OTHER Setting environmental variable CM_PARTIAL_DCF in release 17.2-2016 causing crash) i; c; S3 F7 _+ C$ w2 Y( L
1914813 CONSTRAINT_MGR OTHER C++ Runtime error and non-recoverable crash in class-class worksheet% h0 m% H2 W: N: C+ p* x' q: C; s
1920142 CONSTRAINT_MGR OTHER Xnet names are not consistent in the design; ~% k" A7 C- ?4 Z% h: o- ?( x
1898549 CONSTRAINT_MGR SCHEM_FTB Importing netlist causing crash in release 17.2-2016, hotfix 036# Z: Z* f! e M+ H
1814851 CONSTRAINT_MGR UI_FORMS Field solver /DRC check running forever& E! |6 [* |4 c# P
1889862 CONSTRAINT_MGR UI_FORMS PCB Editor hangs while assigning net voltages in CM% f9 u# C: ~& |% y+ z" R/ g2 k: f- H
1965470 CONSTRAINT_MGR UI_FORMS Constraint Manager GUI Issue in release 17.2-2016, hotfix 039: Font size small and rows/columns in shrink mode$ ?: r7 K7 t- f
1945406 ECW ADMINISTRATIO Tree view was not refreshed soon after changing the site permission.
5 u& F# m+ Z, q* X) S; ?1826848 ECW METRICS SPDWECW-551 and SPDWECW-553 should be warnings, not errors; n7 G$ H# }1 R2 b# D( c, y. [
1933373 ECW PROJECT_MANAG ecwbatch does not accept password and does not ignore invalid users
' I% g7 P4 z$ e9 @$ t1921502 F2B PACKAGERXL Errors on running Export Physical:SPCOPK-1138 and SPCOPK-1149
' x) g7 N# T7 y1 p3 R' H1929846 F2B PACKAGERXL PackagerXL is still creating the pstcmbc.dat file on a release 16.6 design uprevved to release 17.2-2016. s1 y+ ^& X) p( p) I7 C# `
1953780 F2B PACKAGERXL Updated subdesign package information not updated on the top-level design in the reuse flow- f5 S H7 H) Y; I) k
1971738 F2B PACKAGERXL Deleting blank space from pstxnet.dat file crashing DE-HDL
5 ^% K. U& Z7 Z; ^* y% p1891002 INSTALLATION DOWNLOAD_MGR Issue with Download Manager (Change Preferences Option does not Work)- J! s& e6 U2 ?/ r
1972890 ORBITIO OTHER OrbitIO-APR failed to run if PCB design included
6 I7 g3 A1 I2 y1954262 PCB_LIBRARIAN CORE Footprint model check in fails with verification checks failed error
, W1 g) P) n. y" e$ a7 k1943656 PCB_LIBRARIAN GRAPHICAL_EDI Symbol Editor is blank if .ascii file is newer than .css file+ F2 w* _9 _- P
1897887 PCB_LIBRARIAN SYMBOL_EDITOR New Symbol Editor: Inconsistent symbol results when adding vector pins in Part Developer8 @+ b6 b8 t4 |$ K: y" G
1898003 PCB_LIBRARIAN SYMBOL_EDITOR Issue with Page Border Symbol
5 E; @4 h+ O( P0 ^% D. H. f6 ?1842007 PSPICE LIBRARIES Change required in swit_reg.lib
/ e1 d+ Z: J9 z7 A/ t/ n- a" c1906922 PSPICE LIBRARIES Mismatch in mapping of IC pins in model and PSpice template for analog device AD8138/ g( P' Q( Q+ s4 C/ I
1947586 PSPICE LIBRARIES Update the model AD8138/AD in ANLG_DEV.OLB' l, ?: l: q! I7 g* p j
1748470 PSPICE MATLAB PSpice displays an error when sending current in co-simulation% H) n, Z$ y3 b
1802455 PSPICE MATLAB Incorrect current direction for pins in SLPS flow
: d) x- j, w" s5 }: V1852811 PSPICE MATLAB ORPSIM-2604 being reported in SLPS simulation
6 }, d9 T) l( v1858716 PSPICE MATLAB Co-Simulation fails if 'RC' is used as reference of resistor
4 T' k4 z" }/ ~; c% z1921641 PSPICE MODELEDITOR Model Editor in Client Server installation slow to invoke( O# ~3 b1 L. b/ }$ i2 j5 H0 K
1922160 PSPICE MODELING_APPS New Capture Associate Symbol GUI not reading libraries( n- _/ G8 f% p* t8 W; J5 M1 w
1843698 PSPICE PROBE PSpice icons appear very small on a specific computer8 f# c% K; \6 Y# j" j' ]
1773841 PSPICE SIMULATOR orSimSetup64 crashes when running the simulation for attached design! m' v* H7 {! u0 Z4 N4 D
1816316 PSPICE SIMULATOR Simulation stuck; however, the status bar is correctly updated during Pseudo Transient Analysis
q/ | m( Y; R; p1887119 SCM IMPORTS Cannot selectively update changes in VDD8 O, j$ y) n$ _. l
1889362 SCM IMPORTS Cannot selectively update changes in Visual Design Differences
. W; f, F) G1 d/ K0 h1958545 SCM SETUP Auto assign models does not work in SCM same way as in DE-HDL
/ ]/ i) y$ R3 G. G E1988841 SIG_EXPLORER INTERACTIV SigXplorer stops responding or crashes in hotfix 047 when a design is saved
% r' I: y& K% ]' `, Y1988943 SIG_EXPLORER INTERACTIV SigXplorer crashes on selecting Update Constraint Manager
5 v4 }4 x R9 @) F; z1991375 SIG_EXPLORER INTERACTIV SigXplorer crashes when clicking Save: }# }' W+ y- `
1993749 SIG_EXPLORER INTERACTIV SigXplorer crashes on saving topology8 j4 c l( u5 ^5 b9 k! Z
1969975 SIG_INTEGRITY GUI Model Browser edits model above the one that is selected
1 m9 F/ w# u7 P( J1953184 SIP_LAYOUT IMPORT_DATA Sub Drawing not saving dashed lines
" N1 U* r; f- W4 l+ O1913864 SIP_LAYOUT ORBITIO_IF SiP Layout design import results in wrong die rotation ^- C, r( ?- C; P! d
1880237 SIP_LAYOUT PADSTACK_EDIT Background Window comes to the forefront when closing the Padstack editor0 i2 I% K4 A) V7 `. m5 I
1972560 SIP_LAYOUT STREAM_IF GDS Export fidelity issue: inverted arcs
* x1 k8 ^6 T% p* M: j" @1920317 SIP_LAYOUT THIEVING Thieving pattern does not allow for OOPS operation6 O y# r5 x( C- x G! z' L& ~: D
1909075 SYSTEMSI DOC SystemSI PBA channel and circuit simulations do not respond if bit pattern is 1s or 0s
, m0 f/ H3 W: g* N" I* P/ G1916101 SYSTEMSI DOC Lack of stimulus in file causes Serial Link Analysis to become unresponsive
7 L; ?; O' i# o: s5 l1919562 SYSTEMSI ENG_PBA SystemSI generates wrong timing bathtub curves in channel simulations for write and read
* P+ f( z, m* W1964064 SYSTEMSI GUI_PBA Able to sweep AMI parameters in SSI-PBA* I# @( _- |/ w( i! d
1971266 SYSTEMSI GUI_PBA MCP header shows only 49 ckt nodes instead of 52 for s52p S-parameter file
/ Y2 X% V3 H/ k6 m. Z/ A+ w1885625 SYSTEMSI GUI_SLA Manage AMI + DLL from Setup Analysis Window- A8 Y# c3 }3 i2 ]- K
1924382 SYSTEMSI GUI_SLA Data Rate field in SystemSI Stimulus property form is confusing for PAM4 operation
& s' k2 N* Z2 S/ B1982341 SYSTEM_CAPTURE CANVAS_EDIT Signal rename does not maintain new signal name value6 y+ L L& e9 Q8 m
1976857 SYSTEM_CAPTURE CONSTRAINT_MA System Capture-CM Match Group Creation is not updating correctly
Y$ d! v: v; P0 p/ r$ j1929606 SYSTEM_CAPTURE DESIGN_CORRUP Opening design causes System Capture to crash
: v$ d) t) T7 v F1914697 SYSTEM_CAPTURE DRC Overlapping component DRC does not work" T; l+ c6 q2 s+ ^
1973467 SYSTEM_CAPTURE IMPORT_PCB System Capture Import Physical shows many component and physical differences on a design that is synced up; G, T/ D! r7 r# k* q- x( B
1962603 SYSTEM_CAPTURE NAVLINKS Ability to not underline hyperlinks for Navigation Link values
& N5 X7 |4 I" L9 O3 w1967639 SYSTEM_CAPTURE PART_MANAGER Part Manager does not open in System Capture for part property value changes even after setting the cpm directive.
& o: w& D4 x( d0 ?1964388 SYSTEM_CAPTURE SMART_PDF Some shapes are not visible in the smart PDF schematics
7 M: r q% H6 t% _& N% }% Q1976832 SYSTEM_CAPTURE TDO Rolling Back local lower-block requires check-out of higher-level packaged & variant views
# M4 p; U) |" A1976844 SYSTEM_CAPTURE TDO CM - TDO check-out dependencies are broken
; A8 @* {" k$ q! H) X: r* D) a" Y1976859 SYSTEM_CAPTURE TDO Variant Editor in System Capture -TDO allows to delete a variant without checking out variants view
' o2 ]3 D) H' B: m8 S5 ~1839816 TDA CORE All the design objects are locked in the EDM dashboard after a DSFrame error* n2 @/ I+ d3 T) _( K/ a8 J( p
1889898 TDA CORE Cannot check in the top level of the project in TDO- @/ ?0 s2 t* N! _5 x( i
1892411 TDA CORE Unable to undo the block checkout if something fails
: ^' B% g+ D( }1877757 TDA DEHDL Refresh Hierarchy does not show latest TDO lock/unlock status in DE-HDL% Z# x1 L% I, p. g; ^1 G0 J6 P
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