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本帖最后由 i4dm99 于 2018-10-24 10:05 编辑
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感谢分享，能共享一下都更新了哪些内容吗5 {$ }0 ]3 t# l
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7 U) N3 h+ n8 ?4 ^9 ? w9 S**************************************************************
6 Z n7 I4 l+ z" \# d0 VFixed CCRs: SPB 17.2 HF048" N5 N( h# d4 a9 N
10-13-2018! O# d7 m" l V& I) Q: p& ?! L& r3 B
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' @/ e5 q, w1 D WCCRID Product ProductLevel2 Title
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F4 j, C. ^' k1913039 ADW ADWSERVER EDM Library Server exits with error message on starting library server service! E& L( H+ b: t% |% _2 @
1709155 ADW COMPONENT_BRO Search query does not search for all the parts in the library
, n7 Q# f& c; M; F% Q' C0 U1827231 ADW COMPONENT_BRO Clicking the 'a' key in Part Manager launched from DE-HDL crashes DE-HDL
* y' W2 C0 J5 K0 l1903818 ADW COMPONENT_BRO Parts that have comment_body do not display version+ P) ^( t& N: A9 T5 `' u
1917961 ADW COMPONENT_BRO Component Browser PPL column values are truncated when selecting the top '*' filter
$ s2 q, S7 Q: \# z) ^7 z& V; e1938172 ADW COMPONENT_BRO Symbol version with COMMENT_BODY set to TRUE cannot be instantiated9 \# I: l% {% ~
1914103 ADW CONF conf creates incorrect path in fetch_dump.ini when MLR is enabled.* r$ V6 Q) t5 v" }- n
1911422 ADW DBADMIN RuleP101 - PACK_TYPE check against schematic model not working
I& g! O. [* w/ Q6 H" L1926691 ADW DBEDITOR Adding a new classification and immediately trying to delete it results in errors
3 }% X* K' D) x5 G$ f( M1926694 ADW DBEDITOR Renaming a classification and then renaming it back to the original results in error1 Y3 Z4 n5 {, k
1934870 ADW DBEDITOR Adding a new classification and immediately trying to delete it results in errors
7 {" D: ~! B$ H; R0 L* l$ m1872387 ADW DSN_MIGRATION Design Migration does not cache all used parts into flatlib/part_table.ptf
* b* }1 I, }/ z/ Q8 n( J1254292 ADW FLOW_MGR Flow Manager Open Last Project should open last project closed- Q: F) F6 y+ p S( {; \6 a
1281817 ADW FLOW_MGR '-proj' switch in 'pcbdw_fm' does not work; launches Flow Manager without loading any project
: p3 |& V. G' D% m7 [0 e1727286 ADW FLOW_MGR Product options for PCB SI and Power Integrity are incorrect in the flow and tool launchers
1 Y7 E" }% }' l1875498 ADW FLOW_MGR EDM fails to open or becomes unresponsive.
+ I' r7 Z3 {' J$ O1879386 ADW FLOW_MGR Unable to access COS with the default Firefox version in the 17.2 installation
4 H8 }! c7 i" Q% p7 }/ U1922541 ADW FLOW_MGR Warning message for unavailability of Java version appears on opening a project on Linux
" |7 i6 w, c+ y8 X6 f* \3 K1945451 ADW FLOW_MGR Checklist does not work with two-byte characters
# k/ f* P5 p; q' i5 s+ U# u- Z1956213 ADW FLOW_MGR Not able to invoke Flow Manager on the remote system: O G7 e. U7 n# S3 I, x2 j
1892285 ADW LIBDISTRIBUTI Symbol not consistently available in 16.6 ADW Library
9 O3 \0 n# Q. R: D8 m$ C! m9 r1961731 ADW LIBIMPORT libimport fails to create tar for two Capture models0 }* {# C8 [6 O4 u8 c
1836620 ADW LRM Library Revision Manager crashes on clicking Help7 W# [2 l1 u: a: E
1961845 ADW PART_BROWSER Error regarding environment variable
$ R# a2 g' b" h7 B# k y t1890782 ADW TDA Launching TDO dashboard connected to PLM returns a license error0 y5 P0 S7 v9 Q* v# P4 B4 _! ?
1980914 ADW TDA Cannot start Design Entry HDL and Component Browser in a TDO design* k1 U! k/ Z2 z
1833750 ALLEGRO_EDITOR 3D_CANVAS Soldermask Text is not shown in 3D Canvas% y1 C- y* }) t5 E3 x7 k) {
1891230 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas Viewer not bending PCB with proper radius
" M$ \; M$ }! k& N* y! g% @' Q1913338 ALLEGRO_EDITOR 3D_CANVAS STEP models missing from exported .stp file& r k4 r2 y9 F# y% [
1927507 ALLEGRO_EDITOR 3D_CANVAS Get Error: All bend operations are disabled due to licensing and/or DLL installation issues on invoking 3D Canvas5 ^0 y# {7 l! c2 V& {* n* A
1931508 ALLEGRO_EDITOR 3D_CANVAS Place Bound Bottom is displayed on Top, when dra is opened in 3D Canvas
% |& W6 e8 j' @; H9 E1943060 ALLEGRO_EDITOR 3D_CANVAS Placebound bottom is not showing correctly.
7 t+ j5 `/ O3 p q) [, W" E1950099 ALLEGRO_EDITOR 3D_CANVAS Place Bound Bottom is displayed on Top, when dra is opened in 3D Canvas
7 E3 g0 K" ]* j8 E+ Z9 X1988307 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation
: N m) {1 u( O. ~1923585 ALLEGRO_EDITOR ARTWORK Additional unwanted subclasses appear in film control when a new film definition is added8 ^9 N. |( v8 z7 T
1944079 ALLEGRO_EDITOR COLOR Export of Board Parameters (Net Colors) does not contain entries for nets with spaces
- |$ s$ r$ c' r# B: Q) z1856320 ALLEGRO_EDITOR DATABASE Donut pad fails to connect with cross-hatched shape in full contact thermal mode, despite hatch overlap of donut.
6 E9 R9 ^* Y6 d1912313 ALLEGRO_EDITOR DATABASE Database corrupted during background process
, a. a a9 F D9 |1913344 ALLEGRO_EDITOR DATABASE When changing accuracy of design, the thermal relief for donut pad's outer pad connects to inner pad& E% e8 N% M7 ?1 _
1914470 ALLEGRO_EDITOR DATABASE Release 17.2-2016: export libraries command does not inherit posi/nega information
* A% f: F4 G, R1932086 ALLEGRO_EDITOR DATABASE Unable to resolve DBDoctor error9 e4 B: H7 G& o b
1963932 ALLEGRO_EDITOR DATABASE DB Doctor is not recognizing placed parts and showing them as unplaced.
. Y: y8 o- z) W+ r1987735 ALLEGRO_EDITOR DATABASE Interior sub-lamination backdrill holes are displayed with Top Soldermask pads where backdrill does not exist
9 B4 ]( O6 K/ _3 N1977622 ALLEGRO_EDITOR DFM Not able to add value '5' or multiples of 5 in in DFF constraints for maximum stacked via count6 p& {) n1 L8 { k. f4 P3 Z
1892809 ALLEGRO_EDITOR DRC_CONSTR NODRC_ETCH_OUTSIDE_KEEPIN property is not working on TEXT, B9 I7 M0 j( R; V6 i$ J# s
1894765 ALLEGRO_EDITOR DRC_CONSTR DRC for no_drc_component_board_overlap is not created if the place bound is outside Place Keepin
) B2 F' ~: l" g' |2 L3 e& N1 h ~' z& V1896627 ALLEGRO_EDITOR DRC_CONSTR Moving components takes long time while doing placement
. r2 T$ Q) [% Q( ^5 K4 a5 ]8 g1914591 ALLEGRO_EDITOR DRC_CONSTR Spacing constraints for Mechanical to Hole shows resolved constraints different from the actual air-gap/space
2 o# g* i7 i9 a0 P2 b1956468 ALLEGRO_EDITOR DRC_CONSTR DRC getting generated while moving the uvia and getting removed after updating DRC.
! Z5 N$ W6 a7 A9 s2 @9 b0 `# k1884149 ALLEGRO_EDITOR EDIT_ETCH Arced Routing of differential pair creates unexpected arc radii- `- v' E0 K5 K# L, e& v! g
1891985 ALLEGRO_EDITOR EDIT_ETCH Etch edit does not follow the constraints( j G% b- ^& L% \2 K- H- _
1860056 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes on right-click after choosing the Move command
/ Y. s4 ]8 b7 L' y% L& ^1860723 ALLEGRO_EDITOR GRAPHICS APD crashes on right-click when using the Move command* W% L: S X/ |' [ c
1870058 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes when using Place Manual -H command. s8 X/ s+ L2 F9 G8 Z. f
1930282 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes on executing axlVisibleDesign(nil) from allegro.ilinit
' H f" e1 N: k. [1882813 ALLEGRO_EDITOR INTERACTIV Unable to set the end point with 'snap pick to' when adding an arc& x8 W+ {" Q5 h8 t) M& {% D6 D! T2 x
1884725 ALLEGRO_EDITOR INTERACTIV Edit and Move vertex operation not working as desired4 J: Z3 }: a& G+ R* [4 C0 i0 ?0 @
1902359 ALLEGRO_EDITOR INTERACTIV Connector boundary remains ON for a layer if visibility toggles in Shape Edit application mode
$ C3 z& w/ s5 W3 b5 f' ?( d- P1909004 ALLEGRO_EDITOR INTERACTIV Parameter description showing wrong for Padless Holes under Design Parameter Editor7 [ g8 |7 m( \6 m7 _0 k8 X8 F
1912055 ALLEGRO_EDITOR INTERACTIV PCB Editor crashes on Delete By Query - AutoSilkscreen - Find By Query' c, s1 ~: _3 x% z
1924503 ALLEGRO_EDITOR INTERACTIV Editing shape causes PCB Editor to crash
( ~0 s) j1 r4 {+ ?3 M. _0 m! p; B4 m1929614 ALLEGRO_EDITOR INTERACTIV Unable to Place Via Array when Staggered ring is selected in Global Ring Parameters.
; N# T) l! e8 M" P0 L9 m1938523 ALLEGRO_EDITOR INTERACTIV Change Shape Type message is same for dynamic and static shapes
/ g$ ~$ O- y: B7 T1940827 ALLEGRO_EDITOR INTERACTIV Irrelevant/incorrect warning message when doing Edit- Change on Clines
) V" _9 X/ H0 L5 j8 z- { [1872653 ALLEGRO_EDITOR INTERFACES DXF export shows embedded layers in the layer configuration file
1 Y* x4 s# M- t" |/ @1873971 ALLEGRO_EDITOR INTERFACES IDX proposal comments are not shown when importing the IDX file into Allegro
. n* A4 B: t% ^6 d+ i1892172 ALLEGRO_EDITOR INTERFACES STEP Package Mapping form needs to be larger+ L( H2 ^- u3 H B1 G) o2 ?
1893311 ALLEGRO_EDITOR INTERFACES A line became two lines after import dxf' g( x# K& z' u) P/ a1 N
1937816 ALLEGRO_EDITOR INTERFACES Unit as % in Property Definition not supported by SubDrawing
- H& m; `9 z7 c. c1973084 ALLEGRO_EDITOR INTERFACES Physical library not placed if design and IDF database not matched while running
5 A0 D6 I2 r, y$ Y; J0 X1987526 ALLEGRO_EDITOR INTERFACES IDX import Fails to recognize SURFACE FINISHES Class
! ^6 a9 J( _+ E1872856 ALLEGRO_EDITOR IN_DESIGN_ANA Message displayed when creating directed groups needs to be improved
3 G$ l( r* o. |; C) K1900832 ALLEGRO_EDITOR IN_DESIGN_ANA RTP: Return Path DRC does not check circle void correctly, |; `* z2 X4 t. H1 k8 k
1935641 ALLEGRO_EDITOR IN_DESIGN_ANA Return path DRC crashes PCB Editor
3 Q$ Z& T2 D, t- c5 m6 Z8 ]$ x4 G1649465 ALLEGRO_EDITOR MANUFACT Manufacturing options are not visible in OrCAD PCB Designer legacy menu- E& @3 _4 Q* a1 D# W; ~
1873417 ALLEGRO_EDITOR MANUFACT Autosilk fails to add line information. Only part of the line is getting copied to the autosilk layer.- Y3 _( H; ^0 x
1911596 ALLEGRO_EDITOR MANUFACT Documentation Editor drill chart shows two different rows for the same slot./ V) Z* A' t) F, s! Z T
1937721 ALLEGRO_EDITOR MANUFACT Drill figure character scaled up in GERBER
) z& E* V: t! y, V4 n4 R u1957768 ALLEGRO_EDITOR MANUFACT Import IPC2581 on cross-section does not import line width and impedance3 s; X. k0 C- |0 y
1969363 ALLEGRO_EDITOR MANUFACT Pressfit connector backdrill depth is considering MNC Layer% y2 Z) b3 v7 ]4 k) D" ^
1891102 ALLEGRO_EDITOR MULTI_USER Rejected by server error messages when using Symphony Team Design
$ r9 ] G9 Q+ H1928082 ALLEGRO_EDITOR MULTI_USER Unknown SubClass BOUNDARY/MULTI_USER_LOCK automatically added when defining Artwork Output.* ?1 F" C! O, C1 B+ [7 b
1976705 ALLEGRO_EDITOR MULTI_USER Symphony client disconnects from server without any notification - despite ping mechanism/ L, T E3 P. ?: D+ J3 Y
1972554 ALLEGRO_EDITOR NC Mill symbol moved from Nclegend-slots-1-2 to Nclegend-1-2 subclass if nc_param.txt not present
|9 I) O3 ?) Z1 i4 E1914412 ALLEGRO_EDITOR OTHER Autosilk lines do not clear padstacks that are not rectangular' t5 |! \" E- a+ w1 X1 D, T# x
1921933 ALLEGRO_EDITOR PAD_EDITOR column clearance cannot reset to 0 in padstack editor) u; W, P( v0 E. E3 W2 W1 p. m6 A' H
1922234 ALLEGRO_EDITOR PAD_EDITOR DBDoctor reports 'illegal value for pad' and does not fix when zero corner radius for Rounded Rectangle is defined
* m1 `. n1 t0 B( P8 v7 J. \1932183 ALLEGRO_EDITOR PAD_EDITOR Drill Symbol information not exported in Padstack XML if Drill Figure in none
& |3 j: X2 R+ M: }0 @+ y1934880 ALLEGRO_EDITOR PAD_EDITOR Shapes with offsets not displaying properly in Padstack Editor views
8 T; ]8 K% a! m& u3 S9 [% b1813270 ALLEGRO_EDITOR PLACEMENT When a place replicate module is updated, the vias used in thermal pad are removed( w) u# b" ]8 ?7 i& w
1840275 ALLEGRO_EDITOR PLACEMENT Placing component with the Mirror option causing display problems
; ]8 Z% O+ t/ i$ K/ w& w' P6 B0 X7 U1854099 ALLEGRO_EDITOR PLACEMENT Align components to zero spacing causing mirrored components to overlap" R1 n3 i. `2 a5 U3 @$ i6 l
1854696 ALLEGRO_EDITOR PLACEMENT Pins shown incorrectly when the Alt Symbol and Mirror commands used consecutively5 w3 E5 w( j- i, C+ ^
1862863 ALLEGRO_EDITOR PLACEMENT Too many messages in the command window when symbol does not support mirroring
+ {( N& t o& T' H$ \* L) I1909857 ALLEGRO_EDITOR PLACEMENT Using Mirror with Alt Symbol placement displays incorrect graphics
* V' I" Z6 V7 o# x! J1917128 ALLEGRO_EDITOR PLACEMENT Place - Autoplace - Room when all the components of the room are placed on board causing crash, p; |' A7 _; s$ K8 `/ X
1925144 ALLEGRO_EDITOR PLACEMENT PCB Editor stops responding on using the Autoplace - Room command2 i; d% X$ u- h0 z: v% @
1961509 ALLEGRO_EDITOR PLACEMENT PCB Editor crashes on choosing Place - Autoplace -Room
6 [1 u' l( ?- o+ p8 U- o9 q5 `1930669 ALLEGRO_EDITOR REPORTS Net 'VSS' not included in the Etch Length By Pin Pair Report1 v- u) N$ F' ~' ~7 L g
1982934 ALLEGRO_EDITOR SCRIPTS PCB Editor stops responding if Generate button is used to create script from journal file
! h# P- h( A0 E; y1337346 ALLEGRO_EDITOR SHAPE Shape Check is generating problem point errors that seem unnecessary3 ]7 t7 [" M5 A
1396692 ALLEGRO_EDITOR SHAPE Zcopy with expansion not following board outline
- B$ F! g, U: ^' _5 j& P/ U1902001 ALLEGRO_EDITOR SHAPE Shape behaving differently across hotfixes& w* q9 o( }; I* ]
1921287 ALLEGRO_EDITOR SHAPE 3D canvas is showing some stray objects
, [# o; f% H, l! W# F1 I! \! G1936482 ALLEGRO_EDITOR SHAPE Option for Fillet to not obey NO_SHAPE_CONNECT Property' W! j1 N9 o; f+ e$ }7 q+ ~
1943899 ALLEGRO_EDITOR SHAPE Only one Shape to Route Keep In DRC in release 17.2-2016 compared to two in release 16.6# q% r* a. @4 b' p- u( W4 W8 Q
1944041 ALLEGRO_EDITOR SHAPE shape_rki_autoclip makes shape voiding incorrect
4 O0 x& |& I! `8 N1947675 ALLEGRO_EDITOR SHAPE Shape void error when dv_squarecorners is enabled7 V" g2 t2 M2 M( G( z" q4 u
1949250 ALLEGRO_EDITOR SHAPE Shapes are filled even after raising and lowering priority
- l8 w/ c( I6 ?" Y1984526 ALLEGRO_EDITOR SHAPE Same net shape voided is inconsistent with respect to vias+ U( f# z8 h) t. y
1984955 ALLEGRO_EDITOR SHAPE Dynamic shape creating same net spacing drcs.
2 c7 k* o2 A. _" g+ z4 w" Z1839147 ALLEGRO_EDITOR SKILL axlDBGetLength() reports that the segments of a filled rectangle shape are invalid database ID arguments/ F. ^* @; D6 t5 l( |6 }2 j1 p7 Q
1882776 ALLEGRO_EDITOR SKILL SKILL documentation for axlIsBetween() is wrong! b# F( L8 d! y2 P* m, ^% Q
1882882 ALLEGRO_EDITOR SKILL Example for axlMathConstants needs correction in Allegro SKILL Reference
' f3 T$ ~0 L ?& \: S: I' A1902712 ALLEGRO_EDITOR SKILL axlAltSymbolReplace moves symbol to the top of design while replacing/ r$ v. ^2 u4 M1 S+ {. V- z& T
1906329 ALLEGRO_EDITOR SYMBOL Mechanical Pin to Conductor property set on a pin in a symbol does not pass to the board+ W6 V' t* l% ]8 k8 B6 ]4 H) G) O! _
1911343 ALLEGRO_EDITOR UI_FORMS Global Visibility not turning all layers off: ~7 v: `% _1 t8 m d" D- ~
1985584 ALLEGRO_EDITOR UI_FORMS Import logic changes the Current Working Directory a1 A) v) y8 Z- u4 T: f
1987829 ALLEGRO_EDITOR UI_FORMS Import logic changes the current working directory7 h& B9 v9 A8 |' ~8 ?/ L
1992722 ALLEGRO_EDITOR UI_FORMS After netlist import process, the board file is changing its current path
/ V2 r- B; ?) F/ z1697506 ALLEGRO_EDITOR UI_GENERAL Stroke Editor working in OrCAD PCB Editor of release 16.6 does not work in release 17.2-20160 |8 c" C4 S# C* P3 c& I
1702631 ALLEGRO_EDITOR UI_GENERAL Etch Length by Net report does not list correct net name for nets in a bus) t# e2 m$ ?) @9 Z
1703105 ALLEGRO_EDITOR UI_GENERAL Bus net names are incorrect in reports when using the allegro_html_qt variable
% q- H# H6 }. @2 i2 n4 O1770786 ALLEGRO_EDITOR UI_GENERAL Stroke Editor working in OrCAD PCB Editor of release 16.6 does not work in release 17.2-2016
7 r$ _ f$ n1 W, H1784938 ALLEGRO_EDITOR UI_GENERAL Etch Length by Net report does not show net names with angle brackets in release 17.2-2016
( _$ o$ L& e! B) ]* ?1 F1822557 ALLEGRO_EDITOR UI_GENERAL axlUIWCloseAll is not closing text window in release 17.2-2016: r3 o4 x7 @1 P, x1 e
1836400 ALLEGRO_EDITOR UI_GENERAL Net names are truncated in HTML reports `) c i; e0 ?4 c" n7 M5 W
1869879 ALLEGRO_EDITOR UI_GENERAL Links not working in the Net loop report
" f& e& G$ [% C9 p, A8 Z" q: C1895878 ALLEGRO_EDITOR UI_GENERAL axlUIWClose()/axlUIWCloseAll() functions do not work when allegro_html_qt setting is enabled.
+ d4 T/ j# W: D2 E. [- ]$ c1912282 ALLEGRO_EDITOR UI_GENERAL PCB Editor exits with error message on editing objects
( s: b9 I! ^% P* A1 ]1 Q5 b0 z6 l1913962 ALLEGRO_EDITOR UI_GENERAL PCB Editor toolbars change on choosing View - UI Settings - Save Settings and then restarting6 P6 e U+ D2 |! z+ D
1933172 APD UI_GENERAL Cannot paste text into the command prompt without clicking when 'enable_command_window_history' is set
( K- J( Z" C7 u3 E( g1843712 CAPTURE NETGROUPS Signals shown only for first segment of NetGroup
: D$ U5 M7 V n/ Z, x1917768 CAPTURE NEW_SYM_EDITO Missing package pin overview in Symbol editor0 B# h$ z0 E$ M- \( _/ y
1920088 CAPTURE NEW_SYM_EDITO Package view missing in the new Symbol Editor* c6 ^2 y9 I) c3 C
1922196 CAPTURE NEW_SYM_EDITO Snap to grid issue in Symbol editor
; a5 @# S# ]. A5 D# m9 r1927268 CAPTURE NEW_SYM_EDITO View Package is grayed out in release 17.2-2016, hotfix 038 and later versions, R5 }5 I& E# W. N
1928012 CAPTURE NEW_SYM_EDITO In new Symbol Editor, View - Package is grayed out
8 O2 W' v7 m$ s$ H& B9 D1930865 CAPTURE NEW_SYM_EDITO View Package missing in hotfix 0380 j, o' u; g) V0 p T7 C9 Q
1938507 CAPTURE NEW_SYM_EDITO Issues with new Symbol Editor: Justification and spreadsheet usability
6 O* ]& N% \+ J1940869 CAPTURE NEW_SYM_EDITO Missing pins in 'Edit Pins of All Section' table view for 4k resolution but not in 2k resolution( ^9 T) R/ _# k/ L% Z) a5 W7 \
1940888 CAPTURE NEW_SYM_EDITO Copying pins from a part and pasting on different parts not working properly.
5 R7 |9 m3 |/ C4 j2 ^: ]1942994 CAPTURE NEW_SYM_EDITO Cut / Paste of object in New Part / Symbol editor always pastes on grid
0 |% f1 N1 W1 k8 `, v2 z1944396 CAPTURE NEW_SYM_EDITO JavaScript error while copying from 'Edit Pins of All Sections'2 T2 |/ N: J6 w Y7 L6 O8 O
1950224 CAPTURE NEW_SYM_EDITO Cyrillic alphabets are not displayed properly on Schematic.
) D3 R. [( l# o: [1951369 CAPTURE NEW_SYM_EDITO Cancel closes Symbol Editor. U; y4 e* g2 y; _
1966785 CAPTURE NEW_SYM_EDITO Edit Part is grayed out3 Y! y4 F# Y) X) }% S
1973135 CAPTURE NEW_SYM_EDITO Issue with new Symbol Editor: cannot copy-paste pins) {$ }3 n' L5 B" k/ I4 ~' |$ N
1973344 CAPTURE NEW_SYM_EDITO JavaScript error on opening part from design: O& J- l" g8 F8 n
1974122 CAPTURE NEW_SYM_EDITO Cannot copy-paste all pin list on the new Symbol Editor7 R1 G; j' I0 {$ e* p' n
1983593 CAPTURE NEW_SYM_EDITO Script error on copying and pasting to property sheet
5 t5 A; E1 A6 e, X4 c7 O6 b/ I1929692 CAPTURE OPTIONS PACK_SHORT issues with Pin Numbers that contain letters/alphabets
+ O ]' R" N/ }1 ^1876939 CAPTURE OTHER Incorrect Capture renaming error (ORCAP-1310)
2 L+ X/ U0 {; x0 N1916090 CAPTURE OTHER Incorrect error message when 'save as' fails due to long directory path: d2 y( Y2 _# T
1921927 CAPTURE OTHER Two functions are mapped to Shift + R in OrCAD Capture in hotfix 0385 I1 k& }# d2 E: ]6 _- K
1946453 CAPTURE OTHER Shift+R shortcut is assigned to two functions.
5 L s4 M8 ~7 _2 }. `& q1965456 CAPTURE OTHER Shortcut Shift + R is not opening the Independent Sources dialog box& l; P4 B- O. N: s8 J0 p
1968757 CAPTURE OTHER Close CIP is grayed when right-clicking on the tab in Capture.
. d: b$ I# k$ i( w |6 M1938437 CAPTURE PART_EDITOR OrCAD Capture new Symbol Editor Pin Type missing in table% v) M; ]4 z7 `/ F
1906757 CAPTURE SCHEMATICS Intersheet reference is overlapping with the offpage connector name( p) {+ ]9 D$ n% n9 N
1867016 CAPTURE SCHEMATIC_EDI Part placeholders not being positioned when moved+ j/ l5 K+ K2 c& g0 x0 K) l
1932837 CAPTURE SCHEMATIC_EDI Parameters graphics are not correctly positioned/ C4 j4 O( V4 l0 e
1949518 CAPTURE SCHEMATIC_EDI Getting error when comparing designs/ w2 h% R6 G' X6 E! c2 e$ g
1967545 CAPTURE SCHEMATIC_EDI Only section A of heterogeneous part being placed and not sections B, C, or D
% q1 _! r7 _5 r" j& Z3 o: M' f1933919 CIS DBC_CFG_WIZAR New CIS Configuration .dbc file created in release 17.2-2016 shows release 16.3+ S% u8 {, e& @ z }" X
1932550 CIS RELATIONAL_DB VIEW NAME in Relational Database configuration is not working as expected.; ]( I- y3 w/ T+ |' P8 X" L$ K
1832524 CONCEPT_HDL CHECKPLUS Default checkplus rules show body height of 0 (sym_2 of the attached cell). This causes the cell to fail verification., i& n/ q( N( P# V5 \% z3 i
1912023 CONCEPT_HDL CHECKPLUS signalWidth predicate does not recognize SIG[1..0] as bus.. Q' @- {5 c) x8 d9 ]% {# |
1966120 CONCEPT_HDL COPY_PROJECT Copying release 17.2-2016 project results in message stating the project is of an older version
; }0 g, p8 j8 u" g1879425 CONCEPT_HDL CORE Adding signals with the right-click menu is not following the defined color scheme
1 H& t( P4 j- \* r) o: ?2 P& d1 E1890542 CONCEPT_HDL CORE Getting ERROR(SPCOCN-1911) when running export physical with backannotation
/ n; v9 s) w9 x2 b" N9 E: T1907684 CONCEPT_HDL CORE Moving symbol makes canvas unresponsive for a long time
6 U- V$ R) l: V- U5 ~1920711 CONCEPT_HDL CORE Pin names changes when mirroring the swapped section.
/ Y; b# t/ D9 r) N7 }1931421 CONCEPT_HDL CORE On Linux, 'cpmaccess -read' returns incorrect value
" U% ^; Q6 l6 o! N3 a7 j1931782 CONCEPT_HDL CORE Setting DONT_FORCE_ORIGIN_ONGRID to ON does not work for sig_name
# u8 r2 @ `. X- c! g6 L1932433 CONCEPT_HDL CORE _movetogrid causes signal disconnection* ^0 L' y) g$ D$ W
1946993 CONCEPT_HDL CORE DE-HDL Part Manager fails to update parts on schematic if new KEY properties exist in PTF but not in schematic7 b4 Z9 y M) H$ L D9 L8 _
1947029 CONCEPT_HDL CORE Design Entry HDL Font Support not working for signal rename
* e0 j; n- x' l. V& o; }1962865 CONCEPT_HDL CORE Schematic symbol creation with '-' as pin name not packaging
5 v3 t$ S2 `) s) s! H# z) n+ X! i1 i1966805 CONCEPT_HDL CORE Issues with packaging design containing cells named with a leading underscore
6 _. i" e- o8 K- ~4 Q) L+ l, V6 C: B1967760 CONCEPT_HDL CORE DE-HDL crashes on moving Net Group/Port in release 17.2-2016, hotfix 044
" H% }2 d$ a9 ^7 u8 ?4 {1968282 CONCEPT_HDL CORE DE-HDL Part Manager fails to update parts on schematic when new KEY properties exist in PTF and not in schematic+ g5 y9 {; p) X9 g/ e3 n
1972815 CONCEPT_HDL CORE Part Manager not updating missing key attributes from the ptf file by using 'Update instances' option2 |/ I/ w5 h& k
1887790 CONCEPT_HDL CREFER CRefer links not working in selected cpm file
1 |3 Z7 Z3 n7 ]/ g7 Q+ B1898535 CONCEPT_HDL INTERFACE_DES Global Navigation window does not reflect removal of a net on page2 that is part of a netgroup on page1$ Z' ~4 S/ D4 a3 Q" i
1888048 CONCEPT_HDL PDF Japanese characters are not output correctly to PDF on Linux.) `) y! M3 ?" l. Z* V
1937505 CONCEPT_HDL PDF Missing intersection dot in schematic PDF
2 E$ g$ C2 j; U) F* Q3 d- i1942486 CONSTRAINT_MGR CONCEPT_HDL CM crashes when you save after importing a TCF file
' t' K7 V' w% G1983743 CONSTRAINT_MGR CONCEPT_HDL Region Class-Class members are being duplicated in CM in the current session+ [/ d9 B+ v' n' b
1906573 CONSTRAINT_MGR ECS_APPLY Database corrupt and DBDoctor reports illegal database pointer error/ F. B& k7 F7 e/ l) P8 ?( u% M; V
1913805 CONSTRAINT_MGR OTHER Setting environmental variable CM_PARTIAL_DCF in release 17.2-2016 causing crash
/ e/ L" c: M% T4 P& Z1914813 CONSTRAINT_MGR OTHER C++ Runtime error and non-recoverable crash in class-class worksheet0 P0 K. b( c2 g$ w
1920142 CONSTRAINT_MGR OTHER Xnet names are not consistent in the design
' X$ A G8 w9 T( W! n# w7 |) u1898549 CONSTRAINT_MGR SCHEM_FTB Importing netlist causing crash in release 17.2-2016, hotfix 036. ^) l( b* W1 G* b# U9 [: h9 A
1814851 CONSTRAINT_MGR UI_FORMS Field solver /DRC check running forever& J# X& c8 u5 ~( z
1889862 CONSTRAINT_MGR UI_FORMS PCB Editor hangs while assigning net voltages in CM& K; s6 X3 P% V9 d' B
1965470 CONSTRAINT_MGR UI_FORMS Constraint Manager GUI Issue in release 17.2-2016, hotfix 039: Font size small and rows/columns in shrink mode
4 r: w$ V l9 \( b& e2 L1945406 ECW ADMINISTRATIO Tree view was not refreshed soon after changing the site permission.
2 T8 o1 d" R, }' b, o1826848 ECW METRICS SPDWECW-551 and SPDWECW-553 should be warnings, not errors9 P/ W5 V2 N6 _- V6 |
1933373 ECW PROJECT_MANAG ecwbatch does not accept password and does not ignore invalid users
! s" {0 Z! y6 h$ j2 Z5 B Q5 _1921502 F2B PACKAGERXL Errors on running Export Physical:SPCOPK-1138 and SPCOPK-1149, v3 S; q6 B" [2 g' [0 h! @
1929846 F2B PACKAGERXL PackagerXL is still creating the pstcmbc.dat file on a release 16.6 design uprevved to release 17.2-2016/ Z- c/ ?2 r- X. P$ ?
1953780 F2B PACKAGERXL Updated subdesign package information not updated on the top-level design in the reuse flow3 F- [. H& Y$ J. Z* W
1971738 F2B PACKAGERXL Deleting blank space from pstxnet.dat file crashing DE-HDL. X5 u; O1 ^" b; ]
1891002 INSTALLATION DOWNLOAD_MGR Issue with Download Manager (Change Preferences Option does not Work)6 S& i# X+ [- V U
1972890 ORBITIO OTHER OrbitIO-APR failed to run if PCB design included
3 ^& e: ]4 q. O4 |) D! X7 e1954262 PCB_LIBRARIAN CORE Footprint model check in fails with verification checks failed error
& G H$ e. z8 q; N$ R7 x1943656 PCB_LIBRARIAN GRAPHICAL_EDI Symbol Editor is blank if .ascii file is newer than .css file% @6 f, M0 F& |( {$ v* s
1897887 PCB_LIBRARIAN SYMBOL_EDITOR New Symbol Editor: Inconsistent symbol results when adding vector pins in Part Developer
# ~" T+ V( W2 y& E# l$ {1898003 PCB_LIBRARIAN SYMBOL_EDITOR Issue with Page Border Symbol4 n" u- F0 S) {$ d J$ u1 t
1842007 PSPICE LIBRARIES Change required in swit_reg.lib
' q# b2 [6 U4 q2 v4 m1906922 PSPICE LIBRARIES Mismatch in mapping of IC pins in model and PSpice template for analog device AD81385 {7 I. B8 V0 O! d' g
1947586 PSPICE LIBRARIES Update the model AD8138/AD in ANLG_DEV.OLB1 P+ F% M( @8 `7 e2 k
1748470 PSPICE MATLAB PSpice displays an error when sending current in co-simulation R5 N* f6 S* B/ C
1802455 PSPICE MATLAB Incorrect current direction for pins in SLPS flow4 ~* Y3 A& y6 |2 x. y. v3 G9 X
1852811 PSPICE MATLAB ORPSIM-2604 being reported in SLPS simulation6 q) d1 A; n4 F! C' q2 w- g R
1858716 PSPICE MATLAB Co-Simulation fails if 'RC' is used as reference of resistor
, v' |! Q1 {# ?% a; e/ g \& }' x$ e; z1921641 PSPICE MODELEDITOR Model Editor in Client Server installation slow to invoke' z4 o& u" h% H! x; D
1922160 PSPICE MODELING_APPS New Capture Associate Symbol GUI not reading libraries
/ o0 n* H4 N9 z: c/ J9 t6 N1843698 PSPICE PROBE PSpice icons appear very small on a specific computer
( p- r' O' v5 r6 {% @6 o6 o1773841 PSPICE SIMULATOR orSimSetup64 crashes when running the simulation for attached design8 h; `$ {+ t/ ]% q5 Z6 [ h
1816316 PSPICE SIMULATOR Simulation stuck; however, the status bar is correctly updated during Pseudo Transient Analysis7 G: m7 N# t+ a8 b4 k- A. A
1887119 SCM IMPORTS Cannot selectively update changes in VDD8 C7 g. {, |1 h* D% r! b! ?
1889362 SCM IMPORTS Cannot selectively update changes in Visual Design Differences N1 |$ [. P, S2 s1 h. @
1958545 SCM SETUP Auto assign models does not work in SCM same way as in DE-HDL0 t& }1 v& m) y
1988841 SIG_EXPLORER INTERACTIV SigXplorer stops responding or crashes in hotfix 047 when a design is saved
, Y4 V: V- Z% I4 S( U+ ^1988943 SIG_EXPLORER INTERACTIV SigXplorer crashes on selecting Update Constraint Manager
+ z K+ J7 w7 x1991375 SIG_EXPLORER INTERACTIV SigXplorer crashes when clicking Save
. Q9 O! s% |5 K& H0 [1993749 SIG_EXPLORER INTERACTIV SigXplorer crashes on saving topology
0 h1 s7 d& R" Q4 o k9 ~( o1969975 SIG_INTEGRITY GUI Model Browser edits model above the one that is selected3 b7 i3 E- M* _
1953184 SIP_LAYOUT IMPORT_DATA Sub Drawing not saving dashed lines0 G6 x5 e/ y$ h+ G3 v
1913864 SIP_LAYOUT ORBITIO_IF SiP Layout design import results in wrong die rotation5 {" \' A# r/ e: K3 \. R7 [; b
1880237 SIP_LAYOUT PADSTACK_EDIT Background Window comes to the forefront when closing the Padstack editor
! L T) j, _* R8 {! [1972560 SIP_LAYOUT STREAM_IF GDS Export fidelity issue: inverted arcs
- J" b& U% j4 j( Z0 {1920317 SIP_LAYOUT THIEVING Thieving pattern does not allow for OOPS operation
" G( G% \( ^9 F1909075 SYSTEMSI DOC SystemSI PBA channel and circuit simulations do not respond if bit pattern is 1s or 0s+ z( A9 k; j2 c( X$ o9 s. V
1916101 SYSTEMSI DOC Lack of stimulus in file causes Serial Link Analysis to become unresponsive; w4 ?7 N/ J; \8 } m7 Y
1919562 SYSTEMSI ENG_PBA SystemSI generates wrong timing bathtub curves in channel simulations for write and read
P, [# O s* \1964064 SYSTEMSI GUI_PBA Able to sweep AMI parameters in SSI-PBA
# b# u$ ?4 @7 }$ j' w( ?% y" M1971266 SYSTEMSI GUI_PBA MCP header shows only 49 ckt nodes instead of 52 for s52p S-parameter file) f; O9 W$ w1 b) H! ?4 T9 s
1885625 SYSTEMSI GUI_SLA Manage AMI + DLL from Setup Analysis Window G+ f4 E& K/ p6 j* M
1924382 SYSTEMSI GUI_SLA Data Rate field in SystemSI Stimulus property form is confusing for PAM4 operation+ J z# \% p, m7 @
1982341 SYSTEM_CAPTURE CANVAS_EDIT Signal rename does not maintain new signal name value
5 A' P/ \& b! z" [) y$ e1976857 SYSTEM_CAPTURE CONSTRAINT_MA System Capture-CM Match Group Creation is not updating correctly
! ~; L7 f: K* Q1 Q) t d1929606 SYSTEM_CAPTURE DESIGN_CORRUP Opening design causes System Capture to crash4 B% B. X( m0 H! B5 s. ]
1914697 SYSTEM_CAPTURE DRC Overlapping component DRC does not work* A$ b& V2 a! B
1973467 SYSTEM_CAPTURE IMPORT_PCB System Capture Import Physical shows many component and physical differences on a design that is synced up* r5 N8 Y: w+ `& `
1962603 SYSTEM_CAPTURE NAVLINKS Ability to not underline hyperlinks for Navigation Link values
, l% q$ \- D+ [1967639 SYSTEM_CAPTURE PART_MANAGER Part Manager does not open in System Capture for part property value changes even after setting the cpm directive.
2 c0 X8 H. }4 |. h) @1964388 SYSTEM_CAPTURE SMART_PDF Some shapes are not visible in the smart PDF schematics$ c" k; }2 Q* p) N7 [/ F
1976832 SYSTEM_CAPTURE TDO Rolling Back local lower-block requires check-out of higher-level packaged & variant views) U6 j: @7 J4 U) f4 F9 T! e `
1976844 SYSTEM_CAPTURE TDO CM - TDO check-out dependencies are broken
8 F9 v* d: | |2 J& w# m/ `1976859 SYSTEM_CAPTURE TDO Variant Editor in System Capture -TDO allows to delete a variant without checking out variants view/ I, a5 e; B8 P
1839816 TDA CORE All the design objects are locked in the EDM dashboard after a DSFrame error; S0 j- ^3 s( |# x- t& a" _
1889898 TDA CORE Cannot check in the top level of the project in TDO$ T2 |7 D0 r$ c: h& R' `+ G
1892411 TDA CORE Unable to undo the block checkout if something fails
0 `2 J! F) H& R' G" q- x; q1877757 TDA DEHDL Refresh Hierarchy does not show latest TDO lock/unlock status in DE-HDL
3 [ g0 ^. Y: g& J. c, T- Z0 d0 A, T% ^" p) y6 h0 [- i
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