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Checking Schematic: FPGA
4 }. K0 z! a0 h--------------------------------------------------
( {4 x4 r" m1 eChecking Electrical Rules
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WARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_V21 Bidirectional Connected to Output Port: FPGA, PAGE-A1 DR FPGA END (4.90, 2.20)
$ e2 h, x2 P( z8 d" mWARNING [DRC0004] Possible pin type conflict U1,IO_VB7N0_AA19 Bidirectional Connected to Output Port: FPGA, PAGE-A1 DR FPGA END (5.00, 4.80)
3 Q' ?9 M; s$ j7 n( `WARNING [DRC0004] Possible pin type conflictWARNING [DRC0004] Possible pin type conflict U1,IO_VB7N0_W15 Bidirectional Connected to Output Port: FPGA, PAGE-A1 DR FPGA END (2.50, 5.30) U1,IO_VB7N0_Y14 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (2.50, 5.50) 4 B1 K p$ z! p$ ?% t- |* G, }+ M, H
WARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_V20 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (4.90, 2.10) _7 G' T4 m. X; O x
WARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_V22 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (4.90, 2.30)
+ Z/ f# C) p) {; Y" VWARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_W22 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (4.90, 2.70)
% ~2 d6 Q$ L. \WARNING [DRC0004] Possible pin type conflict U1,IO_VB7N0_W16 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (2.50, 5.40)
+ z% y# b8 T2 @: fWARNING [DRC0004] Possible pin type conflict U1,IO_VB7N0_AB18 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (5.00, 5.60)
% R# O. m+ B1 V o- G: @WARNING [DRC0004] Possible pin type conflict U1,IO_VB7N0_Y17 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (2.50, 5.60) : h: B3 M6 O( g# E
WARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_Y21 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (4.90, 3.10)
- U3 B% \6 Y; F3 G1 rWARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_Y22 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (4.90, 3.20) 8 x" L7 e# Z8 k- _5 ^
WARNING [DRC0004] Possible pin type conflict U1,IO_VB7N0_AA18 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (5.00, 4.70) $ Z0 \" j! B, @
WARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_W21 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (4.90, 2.60) " }$ A+ E3 \& N& `
WARNING [DRC0004] Possible pin type conflict U1,IO_VB7N0_AB19 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (5.00, 5.70)
, b+ p/ |' ^* {2 K" Z0 | |WARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_R17 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (4.90, 1.70) ! {( _+ O8 U" [( @# b% s
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