SystemSI仿真时VTT报错

ares0260

请教各位，在仿真ddr时有如图报错
有劳各位指点一下！！！
# p2 T% e  j) J4 X# H7 ~6 \! F
- ]* Y# C' Y4 O*** Messages reported by SPDSIM (build14.0.2.09101) ***
9 h' Z( h4 B2 z2 B" XWarning 5160: ".ends rpacks  " is not supported in include file, ignored.
8 S* P! n6 L2 |  Z  Location: statement at line 4
' j& u7 Z0 E$ n2 V  Context: .inc 'D:\cadence-SI\CHP4\T20160612\L1\TEST\DEMO\rpacks.sp'
Error 2178: In the value expression:
1 L0 b6 O8 g4 ?3 @" d, z Undefined parameter name "vtt".
) {+ I& s& d& h8 u6 d8 f9 R9 F
  Location: statement at line 197
; z+ d1 N4 ?# K  Context: .end

Dandy_15

VTT 没有定义，定义一下就可以了，