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本帖最后由 i4dm99 于 2018-10-24 10:05 编辑 % R1 @/ [ d6 J* s
8 q0 ~0 q% ?6 v f4 Y b( c) w" o感谢分享，能共享一下都更新了哪些内容吗
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" n3 D' g9 ^5 ^0 N# MFixed CCRs: SPB 17.2 HF048; |: D4 R3 ^1 t1 j8 [8 v7 @ {1 |
10-13-20183 d9 y4 I! k0 R% C+ D
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$ ~( \/ n' K2 T' n/ cCCRID Product ProductLevel2 Title
5 I4 K. |) y) m% B3 _========================================================================================================================================================
& g2 A: C j' G1913039 ADW ADWSERVER EDM Library Server exits with error message on starting library server service
, b2 m5 ]' ^$ s) @$ c7 u1709155 ADW COMPONENT_BRO Search query does not search for all the parts in the library
% N+ `# {4 x( `7 f! i1827231 ADW COMPONENT_BRO Clicking the 'a' key in Part Manager launched from DE-HDL crashes DE-HDL; e# ]) }, h- Y B: f
1903818 ADW COMPONENT_BRO Parts that have comment_body do not display version* K1 E5 v8 [/ K. N1 k
1917961 ADW COMPONENT_BRO Component Browser PPL column values are truncated when selecting the top '*' filter( r! d- w0 p& Y
1938172 ADW COMPONENT_BRO Symbol version with COMMENT_BODY set to TRUE cannot be instantiated2 N' z+ X: y) Y1 M' O3 E+ Z$ e
1914103 ADW CONF conf creates incorrect path in fetch_dump.ini when MLR is enabled.
/ k) A, z j6 J1 s* u3 m0 C/ p! O7 Y5 w# c1911422 ADW DBADMIN RuleP101 - PACK_TYPE check against schematic model not working
$ }4 S" Z/ U% o, I1926691 ADW DBEDITOR Adding a new classification and immediately trying to delete it results in errors! C9 U6 Z1 o( {+ A
1926694 ADW DBEDITOR Renaming a classification and then renaming it back to the original results in error
$ G3 D: [% y5 U6 \! z+ a- w3 C2 f1934870 ADW DBEDITOR Adding a new classification and immediately trying to delete it results in errors
C& Y7 x3 F6 ]/ u( P1872387 ADW DSN_MIGRATION Design Migration does not cache all used parts into flatlib/part_table.ptf/ i! `( o* y& N6 P* N6 j; G
1254292 ADW FLOW_MGR Flow Manager Open Last Project should open last project closed
. y) K( a9 h( x1 J1281817 ADW FLOW_MGR '-proj' switch in 'pcbdw_fm' does not work; launches Flow Manager without loading any project
0 Y+ X1 c& e9 ]( z4 J1727286 ADW FLOW_MGR Product options for PCB SI and Power Integrity are incorrect in the flow and tool launchers5 ]3 z; H- l; t# B
1875498 ADW FLOW_MGR EDM fails to open or becomes unresponsive. d- Q! |; N4 \& C0 ~- y1 F
1879386 ADW FLOW_MGR Unable to access COS with the default Firefox version in the 17.2 installation
9 P( P& }4 y" O+ r" `# J1922541 ADW FLOW_MGR Warning message for unavailability of Java version appears on opening a project on Linux- D; e) K& U* C
1945451 ADW FLOW_MGR Checklist does not work with two-byte characters" G3 i5 J5 }* ?5 y8 S' J
1956213 ADW FLOW_MGR Not able to invoke Flow Manager on the remote system
/ m6 B$ T9 f8 L% G \: H+ B1892285 ADW LIBDISTRIBUTI Symbol not consistently available in 16.6 ADW Library
8 w7 u* ]+ h6 o# @1961731 ADW LIBIMPORT libimport fails to create tar for two Capture models
2 R4 I7 d% n5 w8 o, h1836620 ADW LRM Library Revision Manager crashes on clicking Help
- R" l5 U/ A2 q9 v/ Z, `1961845 ADW PART_BROWSER Error regarding environment variable
% D+ }4 C: F$ A: @1890782 ADW TDA Launching TDO dashboard connected to PLM returns a license error( l# x% z" F3 p
1980914 ADW TDA Cannot start Design Entry HDL and Component Browser in a TDO design' l( z/ H9 _5 n: Q
1833750 ALLEGRO_EDITOR 3D_CANVAS Soldermask Text is not shown in 3D Canvas. D0 p2 m$ b! s0 m2 t
1891230 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas Viewer not bending PCB with proper radius
, w& q9 V7 V/ @( ~9 s- _1913338 ALLEGRO_EDITOR 3D_CANVAS STEP models missing from exported .stp file2 f3 x4 F# |% s+ k
1927507 ALLEGRO_EDITOR 3D_CANVAS Get Error: All bend operations are disabled due to licensing and/or DLL installation issues on invoking 3D Canvas( Q& ?9 b9 |# z6 D7 B+ C
1931508 ALLEGRO_EDITOR 3D_CANVAS Place Bound Bottom is displayed on Top, when dra is opened in 3D Canvas
6 E) `! O' R6 Y! b2 w1943060 ALLEGRO_EDITOR 3D_CANVAS Placebound bottom is not showing correctly.: \4 u8 w; s8 V- N9 f
1950099 ALLEGRO_EDITOR 3D_CANVAS Place Bound Bottom is displayed on Top, when dra is opened in 3D Canvas6 z, X; y: o4 ~1 \$ e
1988307 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation1 X2 I( y( c2 o6 \" _! Q/ u
1923585 ALLEGRO_EDITOR ARTWORK Additional unwanted subclasses appear in film control when a new film definition is added
% b) m) F( ?$ B9 u# Z' g1944079 ALLEGRO_EDITOR COLOR Export of Board Parameters (Net Colors) does not contain entries for nets with spaces2 ?! I7 Z# |. W
1856320 ALLEGRO_EDITOR DATABASE Donut pad fails to connect with cross-hatched shape in full contact thermal mode, despite hatch overlap of donut.2 U3 n" t! F4 G K r6 D) |9 Y. B
1912313 ALLEGRO_EDITOR DATABASE Database corrupted during background process( g6 t: s7 B1 N5 Z
1913344 ALLEGRO_EDITOR DATABASE When changing accuracy of design, the thermal relief for donut pad's outer pad connects to inner pad
6 G- p, @% k1 o# I/ l1 M1914470 ALLEGRO_EDITOR DATABASE Release 17.2-2016: export libraries command does not inherit posi/nega information# h0 B$ c5 w6 ]6 \6 J
1932086 ALLEGRO_EDITOR DATABASE Unable to resolve DBDoctor error
* Y8 j- f. O1 z% W g1963932 ALLEGRO_EDITOR DATABASE DB Doctor is not recognizing placed parts and showing them as unplaced.- l/ R% y+ k/ s6 B$ `" r1 Y
1987735 ALLEGRO_EDITOR DATABASE Interior sub-lamination backdrill holes are displayed with Top Soldermask pads where backdrill does not exist
8 P& Q1 k$ I2 b) B% y1977622 ALLEGRO_EDITOR DFM Not able to add value '5' or multiples of 5 in in DFF constraints for maximum stacked via count
S! [. D @$ E) C' t/ \1892809 ALLEGRO_EDITOR DRC_CONSTR NODRC_ETCH_OUTSIDE_KEEPIN property is not working on TEXT
; {9 v0 q1 M! X. E: r1 D1894765 ALLEGRO_EDITOR DRC_CONSTR DRC for no_drc_component_board_overlap is not created if the place bound is outside Place Keepin3 }( b- I8 P- [0 S9 r# L5 r$ o0 j4 p
1896627 ALLEGRO_EDITOR DRC_CONSTR Moving components takes long time while doing placement
4 o' Y5 e6 t7 @9 x% q+ x9 d) m2 q1914591 ALLEGRO_EDITOR DRC_CONSTR Spacing constraints for Mechanical to Hole shows resolved constraints different from the actual air-gap/space3 r% H3 A9 Q/ W% |: {# m
1956468 ALLEGRO_EDITOR DRC_CONSTR DRC getting generated while moving the uvia and getting removed after updating DRC.; B5 G! F* ]) }3 q0 G3 E
1884149 ALLEGRO_EDITOR EDIT_ETCH Arced Routing of differential pair creates unexpected arc radii# ^; O; J4 F9 a8 O3 T5 K
1891985 ALLEGRO_EDITOR EDIT_ETCH Etch edit does not follow the constraints
' j8 x/ a0 s1 X# }% Z+ L$ T* ~8 z1860056 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes on right-click after choosing the Move command
! E" W) |9 u' X$ t1860723 ALLEGRO_EDITOR GRAPHICS APD crashes on right-click when using the Move command" |% y# p" ?# C4 c% e% p7 X
1870058 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes when using Place Manual -H command
1 X, {3 g1 E; }2 {% ^1930282 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes on executing axlVisibleDesign(nil) from allegro.ilinit
2 Z) W" ]' w7 P. Q* t1882813 ALLEGRO_EDITOR INTERACTIV Unable to set the end point with 'snap pick to' when adding an arc
: v3 I$ d% B& Q0 q5 @, u1884725 ALLEGRO_EDITOR INTERACTIV Edit and Move vertex operation not working as desired
6 m7 k3 Q5 s# y M+ ~9 W1902359 ALLEGRO_EDITOR INTERACTIV Connector boundary remains ON for a layer if visibility toggles in Shape Edit application mode' w) c+ r2 M; _- j8 Z$ e$ k
1909004 ALLEGRO_EDITOR INTERACTIV Parameter description showing wrong for Padless Holes under Design Parameter Editor
( q/ {6 |# N }# m7 F! [ F/ Q1912055 ALLEGRO_EDITOR INTERACTIV PCB Editor crashes on Delete By Query - AutoSilkscreen - Find By Query
) E+ ~. n9 Y! g5 W. J1924503 ALLEGRO_EDITOR INTERACTIV Editing shape causes PCB Editor to crash
8 M8 i, L' ?$ e3 Y2 X6 N1929614 ALLEGRO_EDITOR INTERACTIV Unable to Place Via Array when Staggered ring is selected in Global Ring Parameters.
1 {0 Y4 X/ `$ r: _7 O- w1938523 ALLEGRO_EDITOR INTERACTIV Change Shape Type message is same for dynamic and static shapes$ L6 O3 g6 _" V$ H; Y- I G
1940827 ALLEGRO_EDITOR INTERACTIV Irrelevant/incorrect warning message when doing Edit- Change on Clines
' s; X( y! u3 ~) k# d; I+ k1872653 ALLEGRO_EDITOR INTERFACES DXF export shows embedded layers in the layer configuration file
* `$ ~" L; q1 d# V1 h/ {1873971 ALLEGRO_EDITOR INTERFACES IDX proposal comments are not shown when importing the IDX file into Allegro
. N) o7 C2 x8 ~* @4 P4 e1 ^, M1892172 ALLEGRO_EDITOR INTERFACES STEP Package Mapping form needs to be larger/ T1 A3 w8 u4 x+ M1 S/ G
1893311 ALLEGRO_EDITOR INTERFACES A line became two lines after import dxf
$ @5 h/ {; N1 V2 e7 Y# ~1937816 ALLEGRO_EDITOR INTERFACES Unit as % in Property Definition not supported by SubDrawing
0 E0 h' r A- y4 v1 Z7 W) z' \1973084 ALLEGRO_EDITOR INTERFACES Physical library not placed if design and IDF database not matched while running2 z. G" x3 L0 w: L' _7 Z
1987526 ALLEGRO_EDITOR INTERFACES IDX import Fails to recognize SURFACE FINISHES Class6 i& U* h/ W2 ^5 s, c
1872856 ALLEGRO_EDITOR IN_DESIGN_ANA Message displayed when creating directed groups needs to be improved
% q7 u/ N, K8 [9 |0 b' N% T9 K1900832 ALLEGRO_EDITOR IN_DESIGN_ANA RTP: Return Path DRC does not check circle void correctly
% o) h/ U8 O9 N. `1935641 ALLEGRO_EDITOR IN_DESIGN_ANA Return path DRC crashes PCB Editor
1 M/ Q8 _3 s2 c W: v, X) a1649465 ALLEGRO_EDITOR MANUFACT Manufacturing options are not visible in OrCAD PCB Designer legacy menu
9 N5 N' C1 f! ~& D1873417 ALLEGRO_EDITOR MANUFACT Autosilk fails to add line information. Only part of the line is getting copied to the autosilk layer.
- E, t. p) [* Q3 y! L8 L1911596 ALLEGRO_EDITOR MANUFACT Documentation Editor drill chart shows two different rows for the same slot.
8 V* E3 T. i" O1 O9 b% c1937721 ALLEGRO_EDITOR MANUFACT Drill figure character scaled up in GERBER; u2 \5 e/ o6 ~: P1 _! |- T
1957768 ALLEGRO_EDITOR MANUFACT Import IPC2581 on cross-section does not import line width and impedance
! ]7 l+ q2 U9 y7 J/ U4 F1969363 ALLEGRO_EDITOR MANUFACT Pressfit connector backdrill depth is considering MNC Layer9 t) H5 E! y9 Z E) n
1891102 ALLEGRO_EDITOR MULTI_USER Rejected by server error messages when using Symphony Team Design! h. Q% E, ?: r( N" x, n7 W
1928082 ALLEGRO_EDITOR MULTI_USER Unknown SubClass BOUNDARY/MULTI_USER_LOCK automatically added when defining Artwork Output.( v& x; _6 J+ W+ M$ R
1976705 ALLEGRO_EDITOR MULTI_USER Symphony client disconnects from server without any notification - despite ping mechanism
" o% @! o3 F9 l$ e# ~, X1972554 ALLEGRO_EDITOR NC Mill symbol moved from Nclegend-slots-1-2 to Nclegend-1-2 subclass if nc_param.txt not present
. ]( l8 R4 a7 l( x1914412 ALLEGRO_EDITOR OTHER Autosilk lines do not clear padstacks that are not rectangular3 R; y: a0 Z0 d
1921933 ALLEGRO_EDITOR PAD_EDITOR column clearance cannot reset to 0 in padstack editor- k1 B- X3 C ?: X0 E |( y6 c
1922234 ALLEGRO_EDITOR PAD_EDITOR DBDoctor reports 'illegal value for pad' and does not fix when zero corner radius for Rounded Rectangle is defined0 b; c6 G; U: V+ j( `
1932183 ALLEGRO_EDITOR PAD_EDITOR Drill Symbol information not exported in Padstack XML if Drill Figure in none& ~& a( ~8 z1 Q& c" u
1934880 ALLEGRO_EDITOR PAD_EDITOR Shapes with offsets not displaying properly in Padstack Editor views" K0 P% R: ^. }# h$ \
1813270 ALLEGRO_EDITOR PLACEMENT When a place replicate module is updated, the vias used in thermal pad are removed% U3 @* ]. l8 \2 f. m7 o
1840275 ALLEGRO_EDITOR PLACEMENT Placing component with the Mirror option causing display problems
2 L3 C n. A" R! Q0 p9 S$ P1854099 ALLEGRO_EDITOR PLACEMENT Align components to zero spacing causing mirrored components to overlap
; v! f! ?- F2 U! r; ^2 j) b* N& W1854696 ALLEGRO_EDITOR PLACEMENT Pins shown incorrectly when the Alt Symbol and Mirror commands used consecutively
! y! x9 |( `1 |: D8 z6 ~4 Y/ o1862863 ALLEGRO_EDITOR PLACEMENT Too many messages in the command window when symbol does not support mirroring
3 c: a6 D# ]9 ]; m4 v2 b1909857 ALLEGRO_EDITOR PLACEMENT Using Mirror with Alt Symbol placement displays incorrect graphics9 u- h: o' B1 |! [
1917128 ALLEGRO_EDITOR PLACEMENT Place - Autoplace - Room when all the components of the room are placed on board causing crash
' X0 h1 r8 R8 h/ z o% j1925144 ALLEGRO_EDITOR PLACEMENT PCB Editor stops responding on using the Autoplace - Room command
7 o) g4 |! w' {5 v# G# t1961509 ALLEGRO_EDITOR PLACEMENT PCB Editor crashes on choosing Place - Autoplace -Room
5 K D2 [2 } w: p, F5 H( }, W3 {1930669 ALLEGRO_EDITOR REPORTS Net 'VSS' not included in the Etch Length By Pin Pair Report
0 Y/ z; }8 V) I5 k) k/ j0 z1982934 ALLEGRO_EDITOR SCRIPTS PCB Editor stops responding if Generate button is used to create script from journal file
, E- J3 Q' B2 @1337346 ALLEGRO_EDITOR SHAPE Shape Check is generating problem point errors that seem unnecessary
' |( _3 X' M! o$ [1396692 ALLEGRO_EDITOR SHAPE Zcopy with expansion not following board outline
" E$ @# Z8 Y8 G* E2 b8 U9 {1902001 ALLEGRO_EDITOR SHAPE Shape behaving differently across hotfixes* E+ z' W2 q3 h) b. b) ~
1921287 ALLEGRO_EDITOR SHAPE 3D canvas is showing some stray objects
' i( Z3 k( q q7 b7 q! ~4 r1936482 ALLEGRO_EDITOR SHAPE Option for Fillet to not obey NO_SHAPE_CONNECT Property. f" M. v4 U: |; n' [
1943899 ALLEGRO_EDITOR SHAPE Only one Shape to Route Keep In DRC in release 17.2-2016 compared to two in release 16.6
% h/ V# F/ t0 \ ]+ L2 X. m$ `1944041 ALLEGRO_EDITOR SHAPE shape_rki_autoclip makes shape voiding incorrect
2 @" y9 T: Y; [9 {1947675 ALLEGRO_EDITOR SHAPE Shape void error when dv_squarecorners is enabled
. L6 [# [/ o/ A( g2 z. B( v1 ~2 M) }; o1949250 ALLEGRO_EDITOR SHAPE Shapes are filled even after raising and lowering priority
1 v& a3 n9 |) N1984526 ALLEGRO_EDITOR SHAPE Same net shape voided is inconsistent with respect to vias% O: ~7 y" m8 j& z T
1984955 ALLEGRO_EDITOR SHAPE Dynamic shape creating same net spacing drcs.2 b' H; J) K! H5 K( s( I* h
1839147 ALLEGRO_EDITOR SKILL axlDBGetLength() reports that the segments of a filled rectangle shape are invalid database ID arguments2 \, t% d7 X) Z2 Y! D: M
1882776 ALLEGRO_EDITOR SKILL SKILL documentation for axlIsBetween() is wrong
( r3 j; t" q( y( S6 E1882882 ALLEGRO_EDITOR SKILL Example for axlMathConstants needs correction in Allegro SKILL Reference
8 L# g( u% k4 a* O. v2 g- `1902712 ALLEGRO_EDITOR SKILL axlAltSymbolReplace moves symbol to the top of design while replacing0 w$ {$ h1 [6 V+ @8 X
1906329 ALLEGRO_EDITOR SYMBOL Mechanical Pin to Conductor property set on a pin in a symbol does not pass to the board1 n' ^/ n( E) d
1911343 ALLEGRO_EDITOR UI_FORMS Global Visibility not turning all layers off0 p; p4 H4 _$ {6 _. ], X% V
1985584 ALLEGRO_EDITOR UI_FORMS Import logic changes the Current Working Directory
# a- B4 z4 v4 Y1987829 ALLEGRO_EDITOR UI_FORMS Import logic changes the current working directory
- y* H/ W0 @# V0 j1 u1992722 ALLEGRO_EDITOR UI_FORMS After netlist import process, the board file is changing its current path) ?( |1 C" V4 u
1697506 ALLEGRO_EDITOR UI_GENERAL Stroke Editor working in OrCAD PCB Editor of release 16.6 does not work in release 17.2-2016
; \! Z9 \+ j0 P- @7 b: P1702631 ALLEGRO_EDITOR UI_GENERAL Etch Length by Net report does not list correct net name for nets in a bus
$ q( \$ [" \% U1 R3 s1703105 ALLEGRO_EDITOR UI_GENERAL Bus net names are incorrect in reports when using the allegro_html_qt variable
0 |+ G/ c. M( w' D7 k1770786 ALLEGRO_EDITOR UI_GENERAL Stroke Editor working in OrCAD PCB Editor of release 16.6 does not work in release 17.2-2016
- P# ^# G6 p$ f! P- S9 D7 L1784938 ALLEGRO_EDITOR UI_GENERAL Etch Length by Net report does not show net names with angle brackets in release 17.2-20162 ^5 ]: f) o8 K; _0 B- J+ T( T( g7 H
1822557 ALLEGRO_EDITOR UI_GENERAL axlUIWCloseAll is not closing text window in release 17.2-2016% p2 H/ m! l& p6 u& F
1836400 ALLEGRO_EDITOR UI_GENERAL Net names are truncated in HTML reports
* ^$ T9 c$ L( A Y# |. g; z4 x7 B1869879 ALLEGRO_EDITOR UI_GENERAL Links not working in the Net loop report
" F& }& f! M& f# Y! e1895878 ALLEGRO_EDITOR UI_GENERAL axlUIWClose()/axlUIWCloseAll() functions do not work when allegro_html_qt setting is enabled.
* ?( [1 ?1 A* X" w1912282 ALLEGRO_EDITOR UI_GENERAL PCB Editor exits with error message on editing objects
4 r! S+ y7 O& u! {1913962 ALLEGRO_EDITOR UI_GENERAL PCB Editor toolbars change on choosing View - UI Settings - Save Settings and then restarting
* S) d+ Y% b: y! |3 z1933172 APD UI_GENERAL Cannot paste text into the command prompt without clicking when 'enable_command_window_history' is set
, D) U# H$ s* m' z' c" j1843712 CAPTURE NETGROUPS Signals shown only for first segment of NetGroup
0 i% b' T; E; ^7 T! j1917768 CAPTURE NEW_SYM_EDITO Missing package pin overview in Symbol editor, A" l; I5 g) J% c D2 _1 _
1920088 CAPTURE NEW_SYM_EDITO Package view missing in the new Symbol Editor
& Y+ r& O0 q1 C( f3 [' e1922196 CAPTURE NEW_SYM_EDITO Snap to grid issue in Symbol editor
, Z: G6 L2 P* c! |1927268 CAPTURE NEW_SYM_EDITO View Package is grayed out in release 17.2-2016, hotfix 038 and later versions! O3 |) H7 x4 J/ Q0 A
1928012 CAPTURE NEW_SYM_EDITO In new Symbol Editor, View - Package is grayed out
. I5 k1 [( \+ t: f1930865 CAPTURE NEW_SYM_EDITO View Package missing in hotfix 0386 E& D9 {/ N( p, j6 x8 d# |# o9 H
1938507 CAPTURE NEW_SYM_EDITO Issues with new Symbol Editor: Justification and spreadsheet usability
+ [0 i$ c$ W: E1 d6 D0 ~$ q4 P9 z$ G1940869 CAPTURE NEW_SYM_EDITO Missing pins in 'Edit Pins of All Section' table view for 4k resolution but not in 2k resolution/ u+ i/ L% r/ {2 d. P
1940888 CAPTURE NEW_SYM_EDITO Copying pins from a part and pasting on different parts not working properly.8 v( E x2 ]0 u, y g( j- W
1942994 CAPTURE NEW_SYM_EDITO Cut / Paste of object in New Part / Symbol editor always pastes on grid
' `; V9 U/ B% ]& i' Z( z2 F1944396 CAPTURE NEW_SYM_EDITO JavaScript error while copying from 'Edit Pins of All Sections'
# i* S/ G& F7 ]- C0 D0 q9 n" T; d! M1950224 CAPTURE NEW_SYM_EDITO Cyrillic alphabets are not displayed properly on Schematic.; s2 M+ `( m6 f) X& { [+ H; Z
1951369 CAPTURE NEW_SYM_EDITO Cancel closes Symbol Editor
+ D; A; h u; `# m& C1966785 CAPTURE NEW_SYM_EDITO Edit Part is grayed out
1 j: X9 M6 [2 x, U m1973135 CAPTURE NEW_SYM_EDITO Issue with new Symbol Editor: cannot copy-paste pins
& _! q; J: A* r) \2 t5 M7 K1973344 CAPTURE NEW_SYM_EDITO JavaScript error on opening part from design4 ] ^# |1 }- Y2 _2 j# T$ Q" ^
1974122 CAPTURE NEW_SYM_EDITO Cannot copy-paste all pin list on the new Symbol Editor
# n7 n `: F& n, d) [1983593 CAPTURE NEW_SYM_EDITO Script error on copying and pasting to property sheet
% [2 q' ?. Z, N) N7 J6 z' w1929692 CAPTURE OPTIONS PACK_SHORT issues with Pin Numbers that contain letters/alphabets
) @- ^8 M* z1 v( p8 U4 Y1876939 CAPTURE OTHER Incorrect Capture renaming error (ORCAP-1310)& c( b7 J' C( }! G% E; j
1916090 CAPTURE OTHER Incorrect error message when 'save as' fails due to long directory path$ m/ t8 g! @. H- h8 o
1921927 CAPTURE OTHER Two functions are mapped to Shift + R in OrCAD Capture in hotfix 0381 D* I: d1 C5 A2 Q
1946453 CAPTURE OTHER Shift+R shortcut is assigned to two functions.
7 b, `( a N$ g1965456 CAPTURE OTHER Shortcut Shift + R is not opening the Independent Sources dialog box
4 X/ s: D9 C8 [1 Z; d4 h* r- V2 Q1968757 CAPTURE OTHER Close CIP is grayed when right-clicking on the tab in Capture.0 a% |9 V. Y6 E( w% h# H1 a. c
1938437 CAPTURE PART_EDITOR OrCAD Capture new Symbol Editor Pin Type missing in table
9 \7 K* H- g; ?! E/ s. f1906757 CAPTURE SCHEMATICS Intersheet reference is overlapping with the offpage connector name
- ^, K& `- X" z( G6 U; n: S1867016 CAPTURE SCHEMATIC_EDI Part placeholders not being positioned when moved" F# y* E" P1 s. M* c4 g
1932837 CAPTURE SCHEMATIC_EDI Parameters graphics are not correctly positioned3 V9 {$ Q" {; }- Z" I/ l2 O
1949518 CAPTURE SCHEMATIC_EDI Getting error when comparing designs
( |/ r2 O8 O# k- _( M9 W7 h9 A. {1967545 CAPTURE SCHEMATIC_EDI Only section A of heterogeneous part being placed and not sections B, C, or D6 T4 ]) X" m+ @+ I( G. ^9 G
1933919 CIS DBC_CFG_WIZAR New CIS Configuration .dbc file created in release 17.2-2016 shows release 16.3- @. G+ J/ O8 f- `
1932550 CIS RELATIONAL_DB VIEW NAME in Relational Database configuration is not working as expected.
" T% U- t) F5 v9 u8 J/ i" V, s. a1832524 CONCEPT_HDL CHECKPLUS Default checkplus rules show body height of 0 (sym_2 of the attached cell). This causes the cell to fail verification.
2 y" |4 _9 l0 g9 F, o$ N% k1912023 CONCEPT_HDL CHECKPLUS signalWidth predicate does not recognize SIG[1..0] as bus.
$ {; E3 g8 a6 X0 l% n; j( O+ Q# G1966120 CONCEPT_HDL COPY_PROJECT Copying release 17.2-2016 project results in message stating the project is of an older version
~& D$ j: N+ n- B: S9 J9 T' h( L2 |1879425 CONCEPT_HDL CORE Adding signals with the right-click menu is not following the defined color scheme
. K' Z) p! n9 J5 R# R& s1890542 CONCEPT_HDL CORE Getting ERROR(SPCOCN-1911) when running export physical with backannotation
& C J7 k% R) J' u1907684 CONCEPT_HDL CORE Moving symbol makes canvas unresponsive for a long time; p2 G7 J" ]' V8 e6 P: }5 C
1920711 CONCEPT_HDL CORE Pin names changes when mirroring the swapped section.$ J; X! K+ @# I9 [
1931421 CONCEPT_HDL CORE On Linux, 'cpmaccess -read' returns incorrect value; U& @: X. d& W& r8 V6 U; a
1931782 CONCEPT_HDL CORE Setting DONT_FORCE_ORIGIN_ONGRID to ON does not work for sig_name
# }1 H1 w$ `7 D2 h; W1932433 CONCEPT_HDL CORE _movetogrid causes signal disconnection1 w. x3 I' g( K) p
1946993 CONCEPT_HDL CORE DE-HDL Part Manager fails to update parts on schematic if new KEY properties exist in PTF but not in schematic
! ^5 B9 n* _0 l, h, J, I1947029 CONCEPT_HDL CORE Design Entry HDL Font Support not working for signal rename7 z8 a7 W3 J( k. P! O3 Z) a
1962865 CONCEPT_HDL CORE Schematic symbol creation with '-' as pin name not packaging
! R% f2 ~0 ]1 C$ x7 |1 |3 W1966805 CONCEPT_HDL CORE Issues with packaging design containing cells named with a leading underscore5 V3 ]; ?8 U" U" }
1967760 CONCEPT_HDL CORE DE-HDL crashes on moving Net Group/Port in release 17.2-2016, hotfix 044! E' k$ p/ o1 D
1968282 CONCEPT_HDL CORE DE-HDL Part Manager fails to update parts on schematic when new KEY properties exist in PTF and not in schematic1 C& o- F Z- n# _' u
1972815 CONCEPT_HDL CORE Part Manager not updating missing key attributes from the ptf file by using 'Update instances' option5 R4 d }! |. D. {. t: o! e" k. z
1887790 CONCEPT_HDL CREFER CRefer links not working in selected cpm file: P7 X1 f( M. d7 T, N
1898535 CONCEPT_HDL INTERFACE_DES Global Navigation window does not reflect removal of a net on page2 that is part of a netgroup on page12 M2 E+ x L' ^
1888048 CONCEPT_HDL PDF Japanese characters are not output correctly to PDF on Linux.4 C9 M2 b! a8 c- b$ H
1937505 CONCEPT_HDL PDF Missing intersection dot in schematic PDF5 b+ c" e* u" H3 N
1942486 CONSTRAINT_MGR CONCEPT_HDL CM crashes when you save after importing a TCF file
5 {& [# y Y: ]" f1983743 CONSTRAINT_MGR CONCEPT_HDL Region Class-Class members are being duplicated in CM in the current session' X9 S* `3 d/ ? L' c0 ~
1906573 CONSTRAINT_MGR ECS_APPLY Database corrupt and DBDoctor reports illegal database pointer error
8 p, Y# T% h6 l |* A+ ~0 T" |7 C1913805 CONSTRAINT_MGR OTHER Setting environmental variable CM_PARTIAL_DCF in release 17.2-2016 causing crash1 I O4 s& l/ e
1914813 CONSTRAINT_MGR OTHER C++ Runtime error and non-recoverable crash in class-class worksheet
% F1 a+ I% d+ ^1920142 CONSTRAINT_MGR OTHER Xnet names are not consistent in the design
6 }& ~0 M( V6 f; }. b1898549 CONSTRAINT_MGR SCHEM_FTB Importing netlist causing crash in release 17.2-2016, hotfix 0364 [/ v" s+ X% J7 D4 M, L. W) P
1814851 CONSTRAINT_MGR UI_FORMS Field solver /DRC check running forever) E- w! Y4 E3 X
1889862 CONSTRAINT_MGR UI_FORMS PCB Editor hangs while assigning net voltages in CM
: J+ ], o7 ~$ e6 s1965470 CONSTRAINT_MGR UI_FORMS Constraint Manager GUI Issue in release 17.2-2016, hotfix 039: Font size small and rows/columns in shrink mode4 p: F6 b! g; a" Z9 j6 j6 S: v
1945406 ECW ADMINISTRATIO Tree view was not refreshed soon after changing the site permission.) ]0 {) W/ m9 y3 d: d8 F: u
1826848 ECW METRICS SPDWECW-551 and SPDWECW-553 should be warnings, not errors
- O+ O% W+ ^$ D. c1933373 ECW PROJECT_MANAG ecwbatch does not accept password and does not ignore invalid users* k: @0 L7 j$ {: A6 K
1921502 F2B PACKAGERXL Errors on running Export Physical:SPCOPK-1138 and SPCOPK-1149
9 r5 `0 @/ f+ F# P5 N1929846 F2B PACKAGERXL PackagerXL is still creating the pstcmbc.dat file on a release 16.6 design uprevved to release 17.2-20160 e- K, u( O4 B' o. v* S c7 L
1953780 F2B PACKAGERXL Updated subdesign package information not updated on the top-level design in the reuse flow
* W8 R/ z- y+ u: B- ^( U1971738 F2B PACKAGERXL Deleting blank space from pstxnet.dat file crashing DE-HDL% c" D; A, z& {9 |. j$ c
1891002 INSTALLATION DOWNLOAD_MGR Issue with Download Manager (Change Preferences Option does not Work)
V. y( ]( N$ N* R* n8 Y1972890 ORBITIO OTHER OrbitIO-APR failed to run if PCB design included( O4 U- s* I0 J4 ~7 |; s% a
1954262 PCB_LIBRARIAN CORE Footprint model check in fails with verification checks failed error
! m( k0 ]* {5 o! }' K1943656 PCB_LIBRARIAN GRAPHICAL_EDI Symbol Editor is blank if .ascii file is newer than .css file
3 Y3 {5 R" n! s, V) q1897887 PCB_LIBRARIAN SYMBOL_EDITOR New Symbol Editor: Inconsistent symbol results when adding vector pins in Part Developer
/ Q& {, n( O, ]. D+ ~# w# r- ]( y1898003 PCB_LIBRARIAN SYMBOL_EDITOR Issue with Page Border Symbol1 |% W# _7 z& T1 x
1842007 PSPICE LIBRARIES Change required in swit_reg.lib
) ~( \/ n0 D! E/ G) `1 i: ]1906922 PSPICE LIBRARIES Mismatch in mapping of IC pins in model and PSpice template for analog device AD8138
2 V6 @2 L4 \9 w8 c1947586 PSPICE LIBRARIES Update the model AD8138/AD in ANLG_DEV.OLB, M# q5 l' K. D( c( V( i
1748470 PSPICE MATLAB PSpice displays an error when sending current in co-simulation }! Z) t/ j/ K6 h" C$ k* b Q# j
1802455 PSPICE MATLAB Incorrect current direction for pins in SLPS flow
/ q7 d6 P9 ^! N& \/ O: {1852811 PSPICE MATLAB ORPSIM-2604 being reported in SLPS simulation% ?" M: O7 k2 ]- l$ T" {
1858716 PSPICE MATLAB Co-Simulation fails if 'RC' is used as reference of resistor
' E: ` n! R' J$ `/ ?1921641 PSPICE MODELEDITOR Model Editor in Client Server installation slow to invoke
; G; l$ E; T) F0 {1922160 PSPICE MODELING_APPS New Capture Associate Symbol GUI not reading libraries
3 Z% `/ c: A7 A* Y/ H4 ^/ {1843698 PSPICE PROBE PSpice icons appear very small on a specific computer' i) ]/ F; i8 ]2 S
1773841 PSPICE SIMULATOR orSimSetup64 crashes when running the simulation for attached design
2 l( e6 L: Q2 K- }) a6 A3 {7 ~: ^1816316 PSPICE SIMULATOR Simulation stuck; however, the status bar is correctly updated during Pseudo Transient Analysis
2 H) }% B3 n/ m1887119 SCM IMPORTS Cannot selectively update changes in VDD& }; C# h! i1 B S4 V: J0 I/ e3 K* M
1889362 SCM IMPORTS Cannot selectively update changes in Visual Design Differences5 |! S$ G( i- q" _% g, Q6 P
1958545 SCM SETUP Auto assign models does not work in SCM same way as in DE-HDL
0 y7 v! s1 N( _1 G1988841 SIG_EXPLORER INTERACTIV SigXplorer stops responding or crashes in hotfix 047 when a design is saved
% W: U% F. m$ \3 h! O1988943 SIG_EXPLORER INTERACTIV SigXplorer crashes on selecting Update Constraint Manager
. t& E- }3 v: k1 b* |& D# M5 ~1991375 SIG_EXPLORER INTERACTIV SigXplorer crashes when clicking Save% r" n' q; p- D m
1993749 SIG_EXPLORER INTERACTIV SigXplorer crashes on saving topology. W1 a, D. N3 d
1969975 SIG_INTEGRITY GUI Model Browser edits model above the one that is selected) k/ K, T7 k/ Y( O% e3 w! u. U
1953184 SIP_LAYOUT IMPORT_DATA Sub Drawing not saving dashed lines$ l0 M8 m, `: j8 B* r0 G& [% ^
1913864 SIP_LAYOUT ORBITIO_IF SiP Layout design import results in wrong die rotation. r& B& O' f$ D" L9 X
1880237 SIP_LAYOUT PADSTACK_EDIT Background Window comes to the forefront when closing the Padstack editor/ y! v, _* m* a
1972560 SIP_LAYOUT STREAM_IF GDS Export fidelity issue: inverted arcs8 P! S2 e$ z+ @9 g ]6 T
1920317 SIP_LAYOUT THIEVING Thieving pattern does not allow for OOPS operation
6 T0 j& ^4 A$ ~# Q1909075 SYSTEMSI DOC SystemSI PBA channel and circuit simulations do not respond if bit pattern is 1s or 0s: G) k) q, T- G) D
1916101 SYSTEMSI DOC Lack of stimulus in file causes Serial Link Analysis to become unresponsive+ w& V4 d) g, Q& G8 V+ w# M7 U
1919562 SYSTEMSI ENG_PBA SystemSI generates wrong timing bathtub curves in channel simulations for write and read
) k2 U/ Y' g0 U& E1964064 SYSTEMSI GUI_PBA Able to sweep AMI parameters in SSI-PBA+ a- T. x+ P1 Z
1971266 SYSTEMSI GUI_PBA MCP header shows only 49 ckt nodes instead of 52 for s52p S-parameter file
; k- L4 L. [$ ]* I: \- V' R0 D1885625 SYSTEMSI GUI_SLA Manage AMI + DLL from Setup Analysis Window
7 M o I, h1 @7 `6 e1924382 SYSTEMSI GUI_SLA Data Rate field in SystemSI Stimulus property form is confusing for PAM4 operation
8 S0 s+ i: T( |9 l+ G' a# J1982341 SYSTEM_CAPTURE CANVAS_EDIT Signal rename does not maintain new signal name value
) D2 R4 _" o% f1976857 SYSTEM_CAPTURE CONSTRAINT_MA System Capture-CM Match Group Creation is not updating correctly& z+ x9 g' t/ V! s3 }
1929606 SYSTEM_CAPTURE DESIGN_CORRUP Opening design causes System Capture to crash
% v1 q; w2 {* f% x( w) E! p1914697 SYSTEM_CAPTURE DRC Overlapping component DRC does not work
2 L4 o- `% ^4 s! f; n& z, H- T, h1973467 SYSTEM_CAPTURE IMPORT_PCB System Capture Import Physical shows many component and physical differences on a design that is synced up, b, @/ L( v' s) [8 ?
1962603 SYSTEM_CAPTURE NAVLINKS Ability to not underline hyperlinks for Navigation Link values
! C2 y/ f+ Z9 f8 G1967639 SYSTEM_CAPTURE PART_MANAGER Part Manager does not open in System Capture for part property value changes even after setting the cpm directive.
. A* A- U8 y5 n1964388 SYSTEM_CAPTURE SMART_PDF Some shapes are not visible in the smart PDF schematics
3 |/ x/ x% c8 j1 E6 K# x1976832 SYSTEM_CAPTURE TDO Rolling Back local lower-block requires check-out of higher-level packaged & variant views
5 \5 c" i0 R% ~1976844 SYSTEM_CAPTURE TDO CM - TDO check-out dependencies are broken; x) I& W* e% d O6 s! A3 B0 l$ g+ t
1976859 SYSTEM_CAPTURE TDO Variant Editor in System Capture -TDO allows to delete a variant without checking out variants view
9 l3 \5 \5 A: ]1839816 TDA CORE All the design objects are locked in the EDM dashboard after a DSFrame error
! Y; F, E! e/ A0 D: H1889898 TDA CORE Cannot check in the top level of the project in TDO
4 w# I# r: N5 k3 c' n1892411 TDA CORE Unable to undo the block checkout if something fails# }: w' |5 M2 b! {" Y+ B3 r. e
1877757 TDA DEHDL Refresh Hierarchy does not show latest TDO lock/unlock status in DE-HDL2 y( p8 ]5 ]2 t% z" K; F) f: t7 V
6 Q4 Z* T* N5 T3 e* s: H3 S& X2 ] ~
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