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装完还是显示052
- S& ?6 i9 o! \% n! h5 h3 aFixed CCRs: SPB 17.2 HF053. z( F7 G: `3 M& S- _% @
03-01-20199 h7 U/ f5 ^* A3 v2 m0 f/ o" d
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! a/ r& C# @) J! O- ^CCRID Product ProductLevel2 Title- X% c7 u3 W7 P5 I
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" w5 c/ C. u; ?* i& L) _* s2035766 ADW DSN_MIGRATION EDM release 17.2-2016: design migration UI is cut off on right: {$ A* r, O" X& e% s L4 m& V
2044872 ADW PART_BROWSER Component Browser: Only one PTF file read for multiple PTF files under Part Table all referenced in master.tag8 R0 B ^+ `/ ~) f
2025147 ADW TDO-SHAREPOIN Design Management stops responding when a board file is deleted and then checked in with the same name5 z5 n9 t2 e7 d6 F. O. i+ b" J# M
2025201 ADW TDO-SHAREPOIN Getting error message (SPDWSD-20) when logging in to team design* D' c% }: q" _4 L# [
2052046 ADW TDO-SHAREPOIN Joining projects is downloading 0-byte files due to SSL error. T" t) r" }% |( b2 l$ e; F: g( b; C
2056694 ADW TDO-SHAREPOIN Design Management stops responding on checking in an object with the same name as a previously deleted object) ]- W1 V$ i0 ]4 l4 b. \( e0 t
2047512 ALLEGRO_EDITOR 3D_CANVAS Mechanical components do not move when bending in 3D Viewer
* }. ~7 w4 E1 }" R2048086 ALLEGRO_EDITOR 3D_CANVAS Wirebonds are not linked to diepad when component is embedded body down! a# f3 O+ ]& S* |, `- g
2051277 ALLEGRO_EDITOR 3D_CANVAS 3D View Vias are Offset from Board in Z direction
3 ?4 y5 @4 G' M0 r2054327 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation
0 G+ a: l2 x7 `0 c6 `2056547 ALLEGRO_EDITOR 3D_CANVAS 3D model not shown for component with STEP file assigned) o) j8 T; N6 Y7 t. P, u
2044980 ALLEGRO_EDITOR ARTWORK 'Import - Artwork': PCB Editor stops responding and no artworks are loaded
- i1 S+ B7 g) I. r8 Z2061203 ALLEGRO_EDITOR CROSS_SECTION Importing cross-section from single stackup to multiple stackup adding additional layers to the primary zone
. y' w3 _- j# P8 e1 ^! y1826533 ALLEGRO_EDITOR DATABASE Dyn_Thermal_Con_Type not behaving as defined in Symbol Editor after placing on PCB file.2 `# H6 y8 d4 w9 ^
1857282 ALLEGRO_EDITOR DATABASE PCB Editor slow when Manhattan and Path length tooltip enabled in datatip customization, t/ x6 e+ k) [1 i( [
2052767 ALLEGRO_EDITOR DATABASE Allegro PCB Editor crashes on editing padstack
* }/ _- ?2 b+ e/ ~; k6 O+ v# |4 d1825692 ALLEGRO_EDITOR DRAFTING Dimension line text moved by Update Symbols3 F/ ]: D& K$ O* w1 o k
1874814 ALLEGRO_EDITOR DRAFTING 'Connect Lines' does not merge overlapping lines1 ]2 f) ^& N- l: Q
1874935 ALLEGRO_EDITOR DRAFTING Angular dimension text has extra spaces added before the degree symbol. ~" ?: ~. ]) a3 L7 u7 G# H
1882597 ALLEGRO_EDITOR DRAFTING 'Trim Segment' should allow trimming for all intersecting segment types5 F& Z }) Y! {
2052315 ALLEGRO_EDITOR DRC_CONSTR DRC (pad-shape) incorrect when both pad and drill are offset from pad origin.% Z$ w# ]7 |1 }& @
2040603 ALLEGRO_EDITOR EDIT_SHAPE Shape is not updating correctly after the 'move' command# @9 l1 M& Q5 y) U
2050177 ALLEGRO_EDITOR INTERACTIV Letters need to remain aligned and uniform after performing Boolean ANDNOT operation5 D3 {. e/ W1 [* M( s j
2052586 ALLEGRO_EDITOR IPC IPC356 showing shorts and disconnects for chip-on-board design
; b1 Y1 ?! i. I9 a* E3 y. H% H3 P2044350 ALLEGRO_EDITOR MANUFACT Cross Section table showing multiple decimal digits for the Tolerance column
0 x' P2 w; [' s( h4 B- ]! d2051150 ALLEGRO_EDITOR NC Counterbore/Countersink holes not being shown in the NC legend table.2 |( t& h; A! b# v r" |! V
2058199 ALLEGRO_EDITOR NC 'Manufacture - NC - Drill Legend' does not populate the CounterBore/CounterSink row values in the Drill Chart table9 D" ?; [' {; Z
2061809 ALLEGRO_EDITOR NC Counter bore NC Legend does not show any data( r2 G7 ~- ?1 q
2063477 ALLEGRO_EDITOR NC Counter bore NC Legend does not show its value
* |( G6 ?% y. ?- L: K2033849 ALLEGRO_EDITOR PLACEMENT PCB Editor stops responding when removing a plane that the Place Replicate command added2 p3 n& p4 C% k
2037509 ALLEGRO_EDITOR PLACEMENT Move or Rotate or Mirror of a module/group makes PCB Editor to crash with no .SAV file created% ~8 l: ]& t. [6 i" q
2047480 ALLEGRO_EDITOR SCHEM_FTB Importing netlist using Capture-CM flow in PCB Editor is crashing netrev. h( Q/ O" b5 m/ S1 \
2046276 ALLEGRO_EDITOR SHAPE Add notch is not snapping to the grid point
% K( V4 \+ A! k: f/ f4 x2047572 ALLEGRO_EDITOR SHAPE Voiding elements on static shape do not void adjacent layer keep-outs and PCB Editor stops responding0 t; s3 W) z6 F$ Q
2048483 ALLEGRO_EDITOR SHAPE Shapes not getting updated post backdrill update
5 N! F! \9 o& _0 s- z8 r' ^9 u2050120 ALLEGRO_EDITOR SHAPE Dynamic fill is flooding over other etch shapes within a symbol.
7 n+ W. t: y4 _2058017 ALLEGRO_EDITOR SHAPE Shape not voiding correctly when fillets are present
+ p0 \. O1 J8 q) P2010569 ALLEGRO_EDITOR SKILL Using SKILL to add 'nil' to a DRC object following a 'println' statement crashes PCB Editor in hotfix 048.8 r: n" H8 A0 ]" { h H; w( l
2055055 ALLEGRO_EDITOR SKILL Using SKILL to add a 'nil' property value to a String causes Allegro PCB Editor to crash
+ `7 w: y1 E6 H; [0 f4 x z$ E7 f1961689 ALLEGRO_EDITOR SYMBOL Pin Numbers are moved from center with Pin Rotation when adding pins to Footprint
2 p! K' @$ T; A/ O2034949 ALLEGRO_EDITOR SYMBOL Angular dimension from DRA not created in PCB
$ s) b7 c6 _6 R7 c+ x) D2046242 ALLEGRO_EDITOR UI_GENERAL Searching User Preference Summary results in crash( F% \' I& B! f* D, T+ R2 d1 C( |
2053496 ALLEGRO_EDITOR UI_GENERAL Confirmation dialog box is behind canvas. E/ K+ `& p6 U9 B5 i' L
2063423 ALLEGRO_EDITOR UI_GENERAL Blocking dialog popped up by axlUIPrompt() goes behind the canvas and is hidden
) _% r8 r. @* E1886781 ALLEGRO_VIEWER OTHER Opening Color192 in Allegro Free Viewer causes it to crash
) Z% N& d- P0 x5 ^9 B: u1699433 APD EDIT_ETCH Field solver runs when not expected" C7 Y( r1 L( G4 r5 ^! D
1937159 APD EDIT_ETCH Routing clines takes long time1 U8 W2 I( y/ T% A* L
2050863 APD SHAPE Taper voiding process is different in Within the region/Out of Region- I* N9 O5 w) K9 g$ i) m
2047391 CAPTURE PART_EDITOR Pin type cannot be changed in hotfix 051
9 y8 w" o$ D, R2049161 CAP_EDIF IMPORT Fatal error 'cannot determine grid' when converting third-party design to Capture
( _: s; @ J+ m4 w2053578 CONCEPT_HDL CONSTRAINT_MG Values specified for custom properties are not preserved: f, M) m, @- r2 G: S3 P
2047583 CONCEPT_HDL COPY_PROJECT Design Entry HDL crashing when trying to open page 52 of copied project
/ U ?7 x- Q. i8 [) }2 F! i' s. Y2036239 CONCEPT_HDL CORE When cutting/pasting, multiple error pop-ups appear for the same notification! h" N+ e, k5 W( E
2037572 CONCEPT_HDL CORE Warning (SPCOCD-578): Soft VOLTAGE property found is misleading and should be auto resolved when closing CM6 C. a+ N3 C7 L% V; G( l. p! [
2037578 CONCEPT_HDL CORE VOLTAGE property gets deleted after copying it from a non-synchronized source* f/ B: n& u/ P4 m6 S1 e! }
2046958 CONCEPT_HDL CORE Moving block pins from symbol right to left places pin names outside the symbol
' k4 r3 c J/ l. U2032480 CONSTRAINT_MGR CONCEPT_HDL Incorrect matchgroups created when working with multiple level nested hierarchical blocks
4 Q+ v- P6 ^( z- o9 @# ~# F* X2045274 CONSTRAINT_MGR CONCEPT_HDL Running SKILL script or navigating pages in the hierarchy viewer crashes schematic editor2 Z" @5 F! G- G1 r. S
2046765 SIP_LAYOUT DIE_ABSTRACT_ SiP Layout 'dump libraries' crashes when exporting library/ a/ N( e7 M4 u0 p4 C6 _/ z7 U9 B! z
2067970 SIP_LAYOUT DIE_ABSTRACT_ SiP Layout cannot dump libraries, viewlog is empty8 Z; r5 g" x. ?+ B/ s2 O2 n
1981749 SYSTEM_CAPTURE ARCHIVER System Capture: Archiving a design from the Tcl command window results in error$ ^+ o* A% v+ V* I
1968437 SYSTEM_CAPTURE ASSIGN_SIGNAL Net name pasted in lower-case though UPPERCASE INPUT is enabled
$ J9 ^' U6 b) s1983063 SYSTEM_CAPTURE AUTOSHAPES Auto Shapes are being shown as part of components* o0 b: `' ^: T+ j
1968463 SYSTEM_CAPTURE CANVAS_EDIT System Capture should not allow illegal characters to be entered for net names
# d7 M" b; }6 r d4 {2006593 SYSTEM_CAPTURE CANVAS_EDIT Asterisk in a search string is not treated as a wildcard character
" g5 _7 K& K5 C( O4 q1721863 SYSTEM_CAPTURE CONNECTIVITY_ Net Names move to random locations when the components are moved around the canvas
; p1 N/ h/ t; q1960130 SYSTEM_CAPTURE CONNECTIVITY_ Disconnected nets when using the mirror option5 |3 z6 s( ^6 G2 `
1985029 SYSTEM_CAPTURE EDIT_OPERATIO Net aliases do not drag with circuit, they appear to move after the circuit is dropped! E) z/ \3 V" Y' I" B4 I( W) Z
1895142 SYSTEM_CAPTURE EXPORT_PCB System Capture reports incorrect unsaved changes when closed after running export physical' z1 j" d1 w( t/ u6 I
1628596 SYSTEM_CAPTURE FIND_REPLACE Alias issue in Find: Results do not show the resolved physical net names7 U; v7 Y4 l/ [4 s/ _9 x
1988297 SYSTEM_CAPTURE FIND_REPLACE Edit > Find and Replace does not replace a net with an existing net on the canvas
$ a( H2 i- n# ^; q* i1843885 SYSTEM_CAPTURE FORMAT_OBJECT Renaming a net causes it to lose custom color assignment* _9 J, Q+ A! d6 O
1969308 SYSTEM_CAPTURE FORMAT_OBJECT System Capture: Clicking arrows to increase/decrease font size does not work correctly when clicked fast
# i7 h' o4 F# i9 d; P7 g2 x1990060 SYSTEM_CAPTURE FORMAT_OBJECT Bold, italics, and underline formats not visually shown on all selected objects concurrently
+ B. f. M W" I$ C! v1993208 SYSTEM_CAPTURE FORMAT_OBJECT Setting font prior to placing text does not work, pop-up does not work, and bucket results in scrolling page
. i+ U S& S+ X( o* }8 q1981775 SYSTEM_CAPTURE IMPORT_PCB Import Physical takes a long time on some designs to launch the UI
, d, a1 ~. f4 M. ~0 J. U: x1982320 SYSTEM_CAPTURE IMPORT_PCB In the B2F flow none of the *view files are created* y- K+ l3 A! p7 m- Z5 G# ]
2010996 SYSTEM_CAPTURE INSERT_PICTUR Image in title block is at a wrong location in design: correctly placed in library1 c' q% A q3 N* r2 `
1967614 SYSTEM_CAPTURE MISCELLANEOUS Dragging a circuit with net aliases does not move the net aliases with it
, q P6 A. ^- k+ p" Y1980999 SYSTEM_CAPTURE NEW_PROJECT System Capture stops working with message regarding Part Manager initialization for a design based on DE-HDL7 F h7 ~3 h$ U, J/ x% q
1973437 SYSTEM_CAPTURE OPEN_CLOSE_PR Opening a design crashes System Capture: m4 x1 g# k! o4 y9 a6 N
1986566 SYSTEM_CAPTURE OPEN_CLOSE_PR System Captures stops responding on opening project, cleaning project displays project already open message) s. t' W @, u
1993093 SYSTEM_CAPTURE OPEN_CLOSE_PR Add option to override the lock file similar to Allegro PCB Editor
+ ^6 p/ v7 x' A) w; Z8 h2042360 SYSTEM_CAPTURE OPEN_CLOSE_PR System Capture will not open nor gives error message when previous lock file present inside the logic folder
' f: i" J, l; f" L4 P1992247 SYSTEM_CAPTURE PART_MANAGER Part Manager displays message for undo and redo stack even after specifying not to show message4 R ~7 Y+ v$ A4 ~: y1 D
2048000 SYSTEM_CAPTURE PERFORMANCE Performance issue when instantiating and moving a component! y! y: P! `' S/ A8 V# X) F
1892120 SYSTEM_CAPTURE PROPERTY_EDIT Some parts missing reference designators and some have two properties, RefDes and REFDES/ \: A0 ~) Z: x
1970009 SYSTEM_CAPTURE PROPERTY_EDIT System Capture: Right-clicking RefDes with conflict in 'Edit Properties' shows the Hyperlink option+ d0 W$ n# ^8 \8 J
2042707 SYSTEM_CAPTURE VARIANT_MANAG variant.lst file under 'physical' folder not updated when closing Variant Editor
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发表于 2019-4-6 21:51
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