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装完还是显示052
- Q; x! O0 a/ @# j. q" x" {- g0 B; Y: tFixed CCRs: SPB 17.2 HF053: L3 v. @4 E, `$ G
03-01-2019, h) A9 j8 J/ o( g4 f
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+ b S1 }) j8 ^: T4 d& LCCRID Product ProductLevel2 Title
+ Y" Y4 }# s7 V/ ^, F) h3 Y1 R5 z( n========================================================================================================================================================
8 v1 |, J" j0 j3 U2035766 ADW DSN_MIGRATION EDM release 17.2-2016: design migration UI is cut off on right
& M2 P3 z5 o3 V" Q$ V. @2044872 ADW PART_BROWSER Component Browser: Only one PTF file read for multiple PTF files under Part Table all referenced in master.tag% q- Y* i6 C: ^
2025147 ADW TDO-SHAREPOIN Design Management stops responding when a board file is deleted and then checked in with the same name' V) I+ W- }" S& ~
2025201 ADW TDO-SHAREPOIN Getting error message (SPDWSD-20) when logging in to team design
) C% g$ I( j" Q' ~5 r5 L2052046 ADW TDO-SHAREPOIN Joining projects is downloading 0-byte files due to SSL error7 ]* t z1 L! c( g
2056694 ADW TDO-SHAREPOIN Design Management stops responding on checking in an object with the same name as a previously deleted object
" S+ i: n1 y2 I' K I0 T2047512 ALLEGRO_EDITOR 3D_CANVAS Mechanical components do not move when bending in 3D Viewer
- [# o7 c& K$ S2 F/ M2048086 ALLEGRO_EDITOR 3D_CANVAS Wirebonds are not linked to diepad when component is embedded body down$ p& A3 x/ H$ u4 s4 V" |' B2 I
2051277 ALLEGRO_EDITOR 3D_CANVAS 3D View Vias are Offset from Board in Z direction
F% `" m' {' N5 }2 L- c) `1 O% E0 c7 e2054327 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation
m. ~" y- D6 [# U& `; z' N' W2056547 ALLEGRO_EDITOR 3D_CANVAS 3D model not shown for component with STEP file assigned9 O! g- ^0 w6 F2 {+ ~
2044980 ALLEGRO_EDITOR ARTWORK 'Import - Artwork': PCB Editor stops responding and no artworks are loaded+ }7 b7 F6 R3 ]/ B& m& T3 Y H
2061203 ALLEGRO_EDITOR CROSS_SECTION Importing cross-section from single stackup to multiple stackup adding additional layers to the primary zone
7 H! @7 l h U, f/ J! h1826533 ALLEGRO_EDITOR DATABASE Dyn_Thermal_Con_Type not behaving as defined in Symbol Editor after placing on PCB file.
5 X3 [ D& Q! @/ y) i, T& K. g1857282 ALLEGRO_EDITOR DATABASE PCB Editor slow when Manhattan and Path length tooltip enabled in datatip customization
- Z( [8 n; J2 y' P0 z- I5 u2052767 ALLEGRO_EDITOR DATABASE Allegro PCB Editor crashes on editing padstack
- p. G' z) C) U. `9 s1825692 ALLEGRO_EDITOR DRAFTING Dimension line text moved by Update Symbols
% x. Z, d6 S* O1874814 ALLEGRO_EDITOR DRAFTING 'Connect Lines' does not merge overlapping lines8 w3 G, G% s' X2 {+ b+ ]
1874935 ALLEGRO_EDITOR DRAFTING Angular dimension text has extra spaces added before the degree symbol.
% C( x' ^! T( c) B1882597 ALLEGRO_EDITOR DRAFTING 'Trim Segment' should allow trimming for all intersecting segment types h* W; ?1 e1 I% j& H1 a6 d
2052315 ALLEGRO_EDITOR DRC_CONSTR DRC (pad-shape) incorrect when both pad and drill are offset from pad origin.
1 Y& x# p/ R* @2 A) t2040603 ALLEGRO_EDITOR EDIT_SHAPE Shape is not updating correctly after the 'move' command
' x: V2 s/ T# G, i$ U. q2050177 ALLEGRO_EDITOR INTERACTIV Letters need to remain aligned and uniform after performing Boolean ANDNOT operation+ r3 S1 u( W: b% v i" @8 y
2052586 ALLEGRO_EDITOR IPC IPC356 showing shorts and disconnects for chip-on-board design& D2 V# f0 z4 l/ Q3 w
2044350 ALLEGRO_EDITOR MANUFACT Cross Section table showing multiple decimal digits for the Tolerance column: P B" \$ Q$ ~/ V; S+ S
2051150 ALLEGRO_EDITOR NC Counterbore/Countersink holes not being shown in the NC legend table.+ J L6 ], a* D% I8 y
2058199 ALLEGRO_EDITOR NC 'Manufacture - NC - Drill Legend' does not populate the CounterBore/CounterSink row values in the Drill Chart table$ [& j& U9 y) M
2061809 ALLEGRO_EDITOR NC Counter bore NC Legend does not show any data/ I2 R9 n' n7 F
2063477 ALLEGRO_EDITOR NC Counter bore NC Legend does not show its value( ~5 }2 N5 G1 k$ W9 c& }2 M) S
2033849 ALLEGRO_EDITOR PLACEMENT PCB Editor stops responding when removing a plane that the Place Replicate command added
8 o/ \+ W5 R$ m2 C4 k/ d; ~7 ^2037509 ALLEGRO_EDITOR PLACEMENT Move or Rotate or Mirror of a module/group makes PCB Editor to crash with no .SAV file created
- `" P C7 a1 D. | M2047480 ALLEGRO_EDITOR SCHEM_FTB Importing netlist using Capture-CM flow in PCB Editor is crashing netrev% ~# ?# {7 U% h8 P
2046276 ALLEGRO_EDITOR SHAPE Add notch is not snapping to the grid point5 R2 F& {' _0 {5 d3 B5 j
2047572 ALLEGRO_EDITOR SHAPE Voiding elements on static shape do not void adjacent layer keep-outs and PCB Editor stops responding
2 W) [5 ^* c* L- F2048483 ALLEGRO_EDITOR SHAPE Shapes not getting updated post backdrill update; Y9 t) G" o* J) N% k- _& a" d
2050120 ALLEGRO_EDITOR SHAPE Dynamic fill is flooding over other etch shapes within a symbol.
$ X) g( `& S; c# C% c2 J0 [2058017 ALLEGRO_EDITOR SHAPE Shape not voiding correctly when fillets are present1 O' v+ m# p- A5 }2 X4 y
2010569 ALLEGRO_EDITOR SKILL Using SKILL to add 'nil' to a DRC object following a 'println' statement crashes PCB Editor in hotfix 048.8 O, M/ B( B/ s! H/ j
2055055 ALLEGRO_EDITOR SKILL Using SKILL to add a 'nil' property value to a String causes Allegro PCB Editor to crash
6 z9 L( {) t+ ^8 P' ^1961689 ALLEGRO_EDITOR SYMBOL Pin Numbers are moved from center with Pin Rotation when adding pins to Footprint" [2 `( B" N: Q& j1 B
2034949 ALLEGRO_EDITOR SYMBOL Angular dimension from DRA not created in PCB: E6 n, t5 l& }; p' [: l. l
2046242 ALLEGRO_EDITOR UI_GENERAL Searching User Preference Summary results in crash
. r4 v' {9 A" s% h1 a2053496 ALLEGRO_EDITOR UI_GENERAL Confirmation dialog box is behind canvas Q. i* x- F; {2 G" D% e+ J2 T
2063423 ALLEGRO_EDITOR UI_GENERAL Blocking dialog popped up by axlUIPrompt() goes behind the canvas and is hidden& o+ F; M' d4 j6 a/ ]: `) q: }
1886781 ALLEGRO_VIEWER OTHER Opening Color192 in Allegro Free Viewer causes it to crash9 K, X, }% g0 w* ~, k+ s; n) u9 y
1699433 APD EDIT_ETCH Field solver runs when not expected
; Z: ^9 [! N! Q( c( a2 `$ I4 m1937159 APD EDIT_ETCH Routing clines takes long time% E8 ?' v, z2 I* Y4 u
2050863 APD SHAPE Taper voiding process is different in Within the region/Out of Region( t) q/ b9 J& H
2047391 CAPTURE PART_EDITOR Pin type cannot be changed in hotfix 051
3 X* u5 F& m' b1 ?2049161 CAP_EDIF IMPORT Fatal error 'cannot determine grid' when converting third-party design to Capture
4 N/ \% N) E. t5 I- v# X2053578 CONCEPT_HDL CONSTRAINT_MG Values specified for custom properties are not preserved! ?8 O0 O g4 m& Y8 ` j
2047583 CONCEPT_HDL COPY_PROJECT Design Entry HDL crashing when trying to open page 52 of copied project9 K! r# l- P+ C$ u3 N6 V
2036239 CONCEPT_HDL CORE When cutting/pasting, multiple error pop-ups appear for the same notification' `! p8 {0 B; l3 g6 ]$ U: e$ K$ r/ v
2037572 CONCEPT_HDL CORE Warning (SPCOCD-578): Soft VOLTAGE property found is misleading and should be auto resolved when closing CM
) _" b" ^8 K; K" W2037578 CONCEPT_HDL CORE VOLTAGE property gets deleted after copying it from a non-synchronized source% m% g0 k2 {- u6 j9 Y
2046958 CONCEPT_HDL CORE Moving block pins from symbol right to left places pin names outside the symbol3 ~* ]& `" p7 L+ i/ H
2032480 CONSTRAINT_MGR CONCEPT_HDL Incorrect matchgroups created when working with multiple level nested hierarchical blocks3 I$ N. L1 ?+ Z$ Z2 M5 z/ R
2045274 CONSTRAINT_MGR CONCEPT_HDL Running SKILL script or navigating pages in the hierarchy viewer crashes schematic editor
) N X" W' z! Q- r7 [ \7 {2046765 SIP_LAYOUT DIE_ABSTRACT_ SiP Layout 'dump libraries' crashes when exporting library; P/ B- G5 h' m7 R3 ^
2067970 SIP_LAYOUT DIE_ABSTRACT_ SiP Layout cannot dump libraries, viewlog is empty
: O+ ^ a9 X2 p. d+ I- u1981749 SYSTEM_CAPTURE ARCHIVER System Capture: Archiving a design from the Tcl command window results in error* c2 R" n9 A. E3 y
1968437 SYSTEM_CAPTURE ASSIGN_SIGNAL Net name pasted in lower-case though UPPERCASE INPUT is enabled
- c' c: |( P9 F, ^) R1983063 SYSTEM_CAPTURE AUTOSHAPES Auto Shapes are being shown as part of components
/ W7 _1 W: ]6 D* o7 @# y# C) I: n9 W1968463 SYSTEM_CAPTURE CANVAS_EDIT System Capture should not allow illegal characters to be entered for net names
* H3 P* x+ n/ G$ D' a3 {: k2006593 SYSTEM_CAPTURE CANVAS_EDIT Asterisk in a search string is not treated as a wildcard character, Q* O, D' v6 o- r( K$ j
1721863 SYSTEM_CAPTURE CONNECTIVITY_ Net Names move to random locations when the components are moved around the canvas" _2 @7 i' c% I: ^/ [- N3 R7 ]
1960130 SYSTEM_CAPTURE CONNECTIVITY_ Disconnected nets when using the mirror option5 H; C/ x( u. V, i( t8 ?1 @% l
1985029 SYSTEM_CAPTURE EDIT_OPERATIO Net aliases do not drag with circuit, they appear to move after the circuit is dropped
( C5 L( P* K& D" E5 }4 G1895142 SYSTEM_CAPTURE EXPORT_PCB System Capture reports incorrect unsaved changes when closed after running export physical
% J e+ w$ E4 w% H3 p6 w; g( T1628596 SYSTEM_CAPTURE FIND_REPLACE Alias issue in Find: Results do not show the resolved physical net names
5 C' n7 I# f0 F1988297 SYSTEM_CAPTURE FIND_REPLACE Edit > Find and Replace does not replace a net with an existing net on the canvas! d- U5 \$ ^+ L7 P `
1843885 SYSTEM_CAPTURE FORMAT_OBJECT Renaming a net causes it to lose custom color assignment
$ f. A5 c) E# @9 A" y6 R1969308 SYSTEM_CAPTURE FORMAT_OBJECT System Capture: Clicking arrows to increase/decrease font size does not work correctly when clicked fast
3 G: b4 u+ q; |1990060 SYSTEM_CAPTURE FORMAT_OBJECT Bold, italics, and underline formats not visually shown on all selected objects concurrently2 q) v, J- X8 A E
1993208 SYSTEM_CAPTURE FORMAT_OBJECT Setting font prior to placing text does not work, pop-up does not work, and bucket results in scrolling page3 a5 H, W9 A8 ]$ k6 v8 k
1981775 SYSTEM_CAPTURE IMPORT_PCB Import Physical takes a long time on some designs to launch the UI I5 U& Z. N$ Q6 n1 a
1982320 SYSTEM_CAPTURE IMPORT_PCB In the B2F flow none of the *view files are created+ z7 a; t! c0 U* p$ c
2010996 SYSTEM_CAPTURE INSERT_PICTUR Image in title block is at a wrong location in design: correctly placed in library5 F. G5 S6 p' W6 R( I# N T
1967614 SYSTEM_CAPTURE MISCELLANEOUS Dragging a circuit with net aliases does not move the net aliases with it' C& D% N* j$ N$ Z. p' x7 n" ?0 s1 X7 I
1980999 SYSTEM_CAPTURE NEW_PROJECT System Capture stops working with message regarding Part Manager initialization for a design based on DE-HDL
4 N b+ M! Q) [6 D3 T) f- f1973437 SYSTEM_CAPTURE OPEN_CLOSE_PR Opening a design crashes System Capture! j, c8 m; ~) C7 o
1986566 SYSTEM_CAPTURE OPEN_CLOSE_PR System Captures stops responding on opening project, cleaning project displays project already open message
! d, j' b3 S7 u7 ]; b2 z1993093 SYSTEM_CAPTURE OPEN_CLOSE_PR Add option to override the lock file similar to Allegro PCB Editor. h$ t8 z7 w: b! h0 M; A y
2042360 SYSTEM_CAPTURE OPEN_CLOSE_PR System Capture will not open nor gives error message when previous lock file present inside the logic folder! T8 j1 d! M d W7 w
1992247 SYSTEM_CAPTURE PART_MANAGER Part Manager displays message for undo and redo stack even after specifying not to show message: M8 M5 U# _0 b7 E
2048000 SYSTEM_CAPTURE PERFORMANCE Performance issue when instantiating and moving a component$ _. f0 `7 q3 m
1892120 SYSTEM_CAPTURE PROPERTY_EDIT Some parts missing reference designators and some have two properties, RefDes and REFDES
& }& e. [5 F- e! y& r; [" L1970009 SYSTEM_CAPTURE PROPERTY_EDIT System Capture: Right-clicking RefDes with conflict in 'Edit Properties' shows the Hyperlink option: w' i) r5 S2 P' v6 m
2042707 SYSTEM_CAPTURE VARIANT_MANAG variant.lst file under 'physical' folder not updated when closing Variant Editor* s9 @: |2 [" R8 i7 Y$ O5 ^' }: K
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发表于 2019-4-8 19:46
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