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装完还是显示052
# e ]% T' h0 }% w2 c$ HFixed CCRs: SPB 17.2 HF0535 ?8 Q' ?! O! |0 K7 `
03-01-20192 ?. V/ @. i8 h0 i) X
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CCRID Product ProductLevel2 Title2 i' i: Y7 S6 x# @* P/ l
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& g: x# L6 |; d8 H, ?! ?# ~5 _2035766 ADW DSN_MIGRATION EDM release 17.2-2016: design migration UI is cut off on right
_0 \! }( v% ?" r$ K ]2 K/ T z$ Q! c2044872 ADW PART_BROWSER Component Browser: Only one PTF file read for multiple PTF files under Part Table all referenced in master.tag3 K+ F2 r$ ?$ c5 O
2025147 ADW TDO-SHAREPOIN Design Management stops responding when a board file is deleted and then checked in with the same name- b. Q1 z7 D' P& p
2025201 ADW TDO-SHAREPOIN Getting error message (SPDWSD-20) when logging in to team design3 ]& M1 D( B/ R1 O
2052046 ADW TDO-SHAREPOIN Joining projects is downloading 0-byte files due to SSL error
0 C/ E2 q3 Y. h$ v2056694 ADW TDO-SHAREPOIN Design Management stops responding on checking in an object with the same name as a previously deleted object
6 W& g3 y v6 Y% b$ Z2047512 ALLEGRO_EDITOR 3D_CANVAS Mechanical components do not move when bending in 3D Viewer$ k4 a( j6 q& P7 |
2048086 ALLEGRO_EDITOR 3D_CANVAS Wirebonds are not linked to diepad when component is embedded body down
; V2 c. v; u9 Z, \& |2051277 ALLEGRO_EDITOR 3D_CANVAS 3D View Vias are Offset from Board in Z direction0 n" M" B2 v* W5 y+ ^
2054327 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation9 w z! \( B- M" G9 U, {# [
2056547 ALLEGRO_EDITOR 3D_CANVAS 3D model not shown for component with STEP file assigned+ P4 g2 r: F4 K( O$ n
2044980 ALLEGRO_EDITOR ARTWORK 'Import - Artwork': PCB Editor stops responding and no artworks are loaded( p, H8 c7 a X& s( E3 i: R: i
2061203 ALLEGRO_EDITOR CROSS_SECTION Importing cross-section from single stackup to multiple stackup adding additional layers to the primary zone
$ V" M/ n( g( v/ _, j1826533 ALLEGRO_EDITOR DATABASE Dyn_Thermal_Con_Type not behaving as defined in Symbol Editor after placing on PCB file. s2 [+ _# I- N, c ]' C) Y
1857282 ALLEGRO_EDITOR DATABASE PCB Editor slow when Manhattan and Path length tooltip enabled in datatip customization
0 k7 Z# m% t6 l. o0 N% X0 {2052767 ALLEGRO_EDITOR DATABASE Allegro PCB Editor crashes on editing padstack* `! ^6 q# d! j! f: V. k2 g- k" Z; M
1825692 ALLEGRO_EDITOR DRAFTING Dimension line text moved by Update Symbols; O! d1 S# |. N/ m% l
1874814 ALLEGRO_EDITOR DRAFTING 'Connect Lines' does not merge overlapping lines
. p& j$ s" L/ w b1874935 ALLEGRO_EDITOR DRAFTING Angular dimension text has extra spaces added before the degree symbol.
" P8 z: T7 Y! M; C1882597 ALLEGRO_EDITOR DRAFTING 'Trim Segment' should allow trimming for all intersecting segment types
$ v# o! L* A( b1 E x3 m" F2052315 ALLEGRO_EDITOR DRC_CONSTR DRC (pad-shape) incorrect when both pad and drill are offset from pad origin./ k' y# _7 k5 ~) R+ w7 l- J8 T
2040603 ALLEGRO_EDITOR EDIT_SHAPE Shape is not updating correctly after the 'move' command
$ U, C; r5 r2 F' w' E3 }2050177 ALLEGRO_EDITOR INTERACTIV Letters need to remain aligned and uniform after performing Boolean ANDNOT operation
% R( w; S, _ \1 ?: @2052586 ALLEGRO_EDITOR IPC IPC356 showing shorts and disconnects for chip-on-board design/ q9 M% h7 ]' o
2044350 ALLEGRO_EDITOR MANUFACT Cross Section table showing multiple decimal digits for the Tolerance column
* a* i1 _6 g1 N# Q2051150 ALLEGRO_EDITOR NC Counterbore/Countersink holes not being shown in the NC legend table.# k2 I) H0 Q5 w
2058199 ALLEGRO_EDITOR NC 'Manufacture - NC - Drill Legend' does not populate the CounterBore/CounterSink row values in the Drill Chart table
3 j; y( Q& r( I: F) w2061809 ALLEGRO_EDITOR NC Counter bore NC Legend does not show any data
" f( D! R4 M5 G& o$ M8 o2063477 ALLEGRO_EDITOR NC Counter bore NC Legend does not show its value; K. Z5 ^" E i5 ^, N- p
2033849 ALLEGRO_EDITOR PLACEMENT PCB Editor stops responding when removing a plane that the Place Replicate command added
! Z9 d$ L5 j _& `4 c2037509 ALLEGRO_EDITOR PLACEMENT Move or Rotate or Mirror of a module/group makes PCB Editor to crash with no .SAV file created$ y0 [0 C' G) x' z2 I; h% V" _* O
2047480 ALLEGRO_EDITOR SCHEM_FTB Importing netlist using Capture-CM flow in PCB Editor is crashing netrev4 L3 U4 _4 S Y! {
2046276 ALLEGRO_EDITOR SHAPE Add notch is not snapping to the grid point: O6 S1 x# W# y' Y" H% k
2047572 ALLEGRO_EDITOR SHAPE Voiding elements on static shape do not void adjacent layer keep-outs and PCB Editor stops responding
. m0 o8 m }# C3 S2048483 ALLEGRO_EDITOR SHAPE Shapes not getting updated post backdrill update
6 ~) B" _8 w! E5 D2050120 ALLEGRO_EDITOR SHAPE Dynamic fill is flooding over other etch shapes within a symbol.
* N7 R# N$ p+ @* r ^) ~0 u: K2058017 ALLEGRO_EDITOR SHAPE Shape not voiding correctly when fillets are present
1 G* w9 q4 @9 ~# D- S; H7 L$ Y1 w2010569 ALLEGRO_EDITOR SKILL Using SKILL to add 'nil' to a DRC object following a 'println' statement crashes PCB Editor in hotfix 048.+ q3 b+ c* d0 _* I
2055055 ALLEGRO_EDITOR SKILL Using SKILL to add a 'nil' property value to a String causes Allegro PCB Editor to crash! x3 T! [) z _! H+ D: S2 A% ~
1961689 ALLEGRO_EDITOR SYMBOL Pin Numbers are moved from center with Pin Rotation when adding pins to Footprint
' }( @! \# W$ ]9 w! d2034949 ALLEGRO_EDITOR SYMBOL Angular dimension from DRA not created in PCB3 T6 t+ W( c( O4 D
2046242 ALLEGRO_EDITOR UI_GENERAL Searching User Preference Summary results in crash# G7 f& m& @* D# Y/ N* l
2053496 ALLEGRO_EDITOR UI_GENERAL Confirmation dialog box is behind canvas
6 b: Q, M% Q6 h7 a6 [, \4 u2063423 ALLEGRO_EDITOR UI_GENERAL Blocking dialog popped up by axlUIPrompt() goes behind the canvas and is hidden
6 l) Y, t, k- L7 F% d' p) b2 O1 S0 O1886781 ALLEGRO_VIEWER OTHER Opening Color192 in Allegro Free Viewer causes it to crash7 k R7 F" Z' g1 Z, `( i/ v5 E
1699433 APD EDIT_ETCH Field solver runs when not expected# v4 h0 J0 c; k, c- M- y- l
1937159 APD EDIT_ETCH Routing clines takes long time( ^0 Y/ H7 t- g
2050863 APD SHAPE Taper voiding process is different in Within the region/Out of Region
/ n# t/ h7 i2 _* j9 z, v/ o2047391 CAPTURE PART_EDITOR Pin type cannot be changed in hotfix 051
. J' W- V- Q. g" j. b2049161 CAP_EDIF IMPORT Fatal error 'cannot determine grid' when converting third-party design to Capture; F3 h7 k7 C! H# v L) m9 a) `4 }+ y0 @
2053578 CONCEPT_HDL CONSTRAINT_MG Values specified for custom properties are not preserved
: p# G5 z: L0 ?, F2 X% Y2 a) {) p2047583 CONCEPT_HDL COPY_PROJECT Design Entry HDL crashing when trying to open page 52 of copied project- b1 A' Z7 U3 k0 J, F9 @) o
2036239 CONCEPT_HDL CORE When cutting/pasting, multiple error pop-ups appear for the same notification# ^# G$ `& @. r' l
2037572 CONCEPT_HDL CORE Warning (SPCOCD-578): Soft VOLTAGE property found is misleading and should be auto resolved when closing CM
v! X( p# N! [# r2037578 CONCEPT_HDL CORE VOLTAGE property gets deleted after copying it from a non-synchronized source
% v% o+ m* u! k9 ~# `: l8 P# P6 W# ?2046958 CONCEPT_HDL CORE Moving block pins from symbol right to left places pin names outside the symbol$ |5 ^+ s4 H. v+ W. {
2032480 CONSTRAINT_MGR CONCEPT_HDL Incorrect matchgroups created when working with multiple level nested hierarchical blocks
) ^* }1 s7 L. ? K$ s$ n2045274 CONSTRAINT_MGR CONCEPT_HDL Running SKILL script or navigating pages in the hierarchy viewer crashes schematic editor9 p8 k. W- F: ]- ~1 J3 a, z0 c1 L }
2046765 SIP_LAYOUT DIE_ABSTRACT_ SiP Layout 'dump libraries' crashes when exporting library
# Q! }. t# E) H( s2067970 SIP_LAYOUT DIE_ABSTRACT_ SiP Layout cannot dump libraries, viewlog is empty
( y6 d4 r+ P1 {: E2 X$ ^: @: T$ ^1981749 SYSTEM_CAPTURE ARCHIVER System Capture: Archiving a design from the Tcl command window results in error3 {6 f5 C9 k+ {& k2 p7 L
1968437 SYSTEM_CAPTURE ASSIGN_SIGNAL Net name pasted in lower-case though UPPERCASE INPUT is enabled/ l( z( A. `5 G+ J+ D
1983063 SYSTEM_CAPTURE AUTOSHAPES Auto Shapes are being shown as part of components
( @) Z: t! Z- t. R2 Q4 T: s1968463 SYSTEM_CAPTURE CANVAS_EDIT System Capture should not allow illegal characters to be entered for net names
/ l; C; _7 X5 u) S( F* K2006593 SYSTEM_CAPTURE CANVAS_EDIT Asterisk in a search string is not treated as a wildcard character
) B( O N x9 i$ g! l2 ]1721863 SYSTEM_CAPTURE CONNECTIVITY_ Net Names move to random locations when the components are moved around the canvas
- d6 x: D5 n- Z$ E) Z( X1960130 SYSTEM_CAPTURE CONNECTIVITY_ Disconnected nets when using the mirror option$ f; z5 c; r- _* {% s. w
1985029 SYSTEM_CAPTURE EDIT_OPERATIO Net aliases do not drag with circuit, they appear to move after the circuit is dropped
! n2 P" @( n* @1 D2 U2 E4 V7 N, c1895142 SYSTEM_CAPTURE EXPORT_PCB System Capture reports incorrect unsaved changes when closed after running export physical4 t3 h! C: O5 d$ n% t Q" `2 Y+ S
1628596 SYSTEM_CAPTURE FIND_REPLACE Alias issue in Find: Results do not show the resolved physical net names
+ M9 E8 z$ e& a( K1988297 SYSTEM_CAPTURE FIND_REPLACE Edit > Find and Replace does not replace a net with an existing net on the canvas M& Y* A6 I5 Z2 z
1843885 SYSTEM_CAPTURE FORMAT_OBJECT Renaming a net causes it to lose custom color assignment0 _5 |1 K$ Z7 J; o. h2 j
1969308 SYSTEM_CAPTURE FORMAT_OBJECT System Capture: Clicking arrows to increase/decrease font size does not work correctly when clicked fast
/ Q5 F6 u3 `& c1990060 SYSTEM_CAPTURE FORMAT_OBJECT Bold, italics, and underline formats not visually shown on all selected objects concurrently
1 M) q6 {+ I6 H& E8 u7 k1993208 SYSTEM_CAPTURE FORMAT_OBJECT Setting font prior to placing text does not work, pop-up does not work, and bucket results in scrolling page
0 Y" @6 n. d* j1981775 SYSTEM_CAPTURE IMPORT_PCB Import Physical takes a long time on some designs to launch the UI
5 P# B- H9 c2 g, \" O5 h1982320 SYSTEM_CAPTURE IMPORT_PCB In the B2F flow none of the *view files are created$ K& w4 k0 t$ }2 `4 k$ a
2010996 SYSTEM_CAPTURE INSERT_PICTUR Image in title block is at a wrong location in design: correctly placed in library
9 W" Q. \9 g: T2 d3 r9 J: e1967614 SYSTEM_CAPTURE MISCELLANEOUS Dragging a circuit with net aliases does not move the net aliases with it+ Y/ t% x, Z) d
1980999 SYSTEM_CAPTURE NEW_PROJECT System Capture stops working with message regarding Part Manager initialization for a design based on DE-HDL
0 \5 V( ]3 Q$ D! R2 O( E' x1973437 SYSTEM_CAPTURE OPEN_CLOSE_PR Opening a design crashes System Capture* p2 x+ }/ s% m/ ~6 i$ H
1986566 SYSTEM_CAPTURE OPEN_CLOSE_PR System Captures stops responding on opening project, cleaning project displays project already open message' H2 J$ F; ~" Y5 }# R
1993093 SYSTEM_CAPTURE OPEN_CLOSE_PR Add option to override the lock file similar to Allegro PCB Editor" z2 `3 A k+ i+ u
2042360 SYSTEM_CAPTURE OPEN_CLOSE_PR System Capture will not open nor gives error message when previous lock file present inside the logic folder
5 I) h. K# i6 W5 r1992247 SYSTEM_CAPTURE PART_MANAGER Part Manager displays message for undo and redo stack even after specifying not to show message3 y/ r3 J8 k: ]+ _, R* U
2048000 SYSTEM_CAPTURE PERFORMANCE Performance issue when instantiating and moving a component
1 R' q6 E5 D% `* p" `1892120 SYSTEM_CAPTURE PROPERTY_EDIT Some parts missing reference designators and some have two properties, RefDes and REFDES- t7 r& }3 x" p- ]" ?
1970009 SYSTEM_CAPTURE PROPERTY_EDIT System Capture: Right-clicking RefDes with conflict in 'Edit Properties' shows the Hyperlink option
/ c: W; ~; d" \' C! j+ P X2042707 SYSTEM_CAPTURE VARIANT_MANAG variant.lst file under 'physical' folder not updated when closing Variant Editor! H7 {* u" K8 |6 T% L3 A K9 b
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发表于 2019-4-8 19:46
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