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装完还是显示052
9 s, U, A, G& }/ D c) ]Fixed CCRs: SPB 17.2 HF053* P8 I( _0 q4 ]* d; b! }
03-01-2019: C; ^0 {! {) H" m
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CCRID Product ProductLevel2 Title
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1 H; W& t: Q. V |7 l7 q2035766 ADW DSN_MIGRATION EDM release 17.2-2016: design migration UI is cut off on right2 f+ w& G" w$ L0 `
2044872 ADW PART_BROWSER Component Browser: Only one PTF file read for multiple PTF files under Part Table all referenced in master.tag& p/ P4 l0 a$ P/ n
2025147 ADW TDO-SHAREPOIN Design Management stops responding when a board file is deleted and then checked in with the same name3 G$ N" c5 L; R* p) Y7 A2 s
2025201 ADW TDO-SHAREPOIN Getting error message (SPDWSD-20) when logging in to team design
0 ?6 i9 x. K' }: F5 f2052046 ADW TDO-SHAREPOIN Joining projects is downloading 0-byte files due to SSL error0 G) R. H8 Q& a5 b* e% L; u" y% T
2056694 ADW TDO-SHAREPOIN Design Management stops responding on checking in an object with the same name as a previously deleted object- ~% `% v& d. K& j% b
2047512 ALLEGRO_EDITOR 3D_CANVAS Mechanical components do not move when bending in 3D Viewer: `7 p2 X& e1 Q7 p Z; X' z
2048086 ALLEGRO_EDITOR 3D_CANVAS Wirebonds are not linked to diepad when component is embedded body down
' c; h6 ]! a9 o/ [: x2051277 ALLEGRO_EDITOR 3D_CANVAS 3D View Vias are Offset from Board in Z direction
, ?7 k9 n% Z) z8 {) k' o2054327 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation1 O( m+ q! ~. e! a; ]- I% p
2056547 ALLEGRO_EDITOR 3D_CANVAS 3D model not shown for component with STEP file assigned: e$ ]/ u! @1 ~0 w4 m7 o
2044980 ALLEGRO_EDITOR ARTWORK 'Import - Artwork': PCB Editor stops responding and no artworks are loaded; ~2 U. ^2 C) {, s y8 r
2061203 ALLEGRO_EDITOR CROSS_SECTION Importing cross-section from single stackup to multiple stackup adding additional layers to the primary zone# Z+ D6 w; S% H9 y U
1826533 ALLEGRO_EDITOR DATABASE Dyn_Thermal_Con_Type not behaving as defined in Symbol Editor after placing on PCB file.! V+ f- U# Q$ ~' s. ]% e9 L
1857282 ALLEGRO_EDITOR DATABASE PCB Editor slow when Manhattan and Path length tooltip enabled in datatip customization
3 v& P `# {) y# Z2052767 ALLEGRO_EDITOR DATABASE Allegro PCB Editor crashes on editing padstack; E }. _9 ^# Z8 x. D. C
1825692 ALLEGRO_EDITOR DRAFTING Dimension line text moved by Update Symbols
0 T: M9 Y3 O, P" c X& X* U: J1874814 ALLEGRO_EDITOR DRAFTING 'Connect Lines' does not merge overlapping lines) D) a9 V3 y: R. \
1874935 ALLEGRO_EDITOR DRAFTING Angular dimension text has extra spaces added before the degree symbol.0 [8 S6 {+ E: X+ p
1882597 ALLEGRO_EDITOR DRAFTING 'Trim Segment' should allow trimming for all intersecting segment types7 f! g' R; e* U. J$ q
2052315 ALLEGRO_EDITOR DRC_CONSTR DRC (pad-shape) incorrect when both pad and drill are offset from pad origin.2 c% O: N0 w" C1 H& a" L
2040603 ALLEGRO_EDITOR EDIT_SHAPE Shape is not updating correctly after the 'move' command, U# H- X6 J9 i7 S0 v G$ R
2050177 ALLEGRO_EDITOR INTERACTIV Letters need to remain aligned and uniform after performing Boolean ANDNOT operation
0 R5 J! C& W% d7 [3 y) e2052586 ALLEGRO_EDITOR IPC IPC356 showing shorts and disconnects for chip-on-board design$ q! t( I( p& T I" A5 q
2044350 ALLEGRO_EDITOR MANUFACT Cross Section table showing multiple decimal digits for the Tolerance column
! n5 o9 E9 z; p/ o2051150 ALLEGRO_EDITOR NC Counterbore/Countersink holes not being shown in the NC legend table.% a6 H2 _- g/ |: N. Q7 n7 Y
2058199 ALLEGRO_EDITOR NC 'Manufacture - NC - Drill Legend' does not populate the CounterBore/CounterSink row values in the Drill Chart table
2 D4 ^' u8 r7 M. m2061809 ALLEGRO_EDITOR NC Counter bore NC Legend does not show any data
8 @0 K, e; j7 ?% v, z$ {- F2063477 ALLEGRO_EDITOR NC Counter bore NC Legend does not show its value( C5 z4 T( M0 p% a/ ]- w$ i$ D
2033849 ALLEGRO_EDITOR PLACEMENT PCB Editor stops responding when removing a plane that the Place Replicate command added
5 E% ?7 ]5 ?, X8 r ?! V1 ?( P, m! l0 W2037509 ALLEGRO_EDITOR PLACEMENT Move or Rotate or Mirror of a module/group makes PCB Editor to crash with no .SAV file created
! q |, R1 V2 d" N$ d' t( r2047480 ALLEGRO_EDITOR SCHEM_FTB Importing netlist using Capture-CM flow in PCB Editor is crashing netrev
$ S, y- M2 W; Q- v$ \# R1 h2046276 ALLEGRO_EDITOR SHAPE Add notch is not snapping to the grid point( F4 n. F0 ^; \8 l4 @- V4 I9 T
2047572 ALLEGRO_EDITOR SHAPE Voiding elements on static shape do not void adjacent layer keep-outs and PCB Editor stops responding! O' d" W4 X6 ? H1 q
2048483 ALLEGRO_EDITOR SHAPE Shapes not getting updated post backdrill update
1 Q* I/ P0 v4 w! I2050120 ALLEGRO_EDITOR SHAPE Dynamic fill is flooding over other etch shapes within a symbol.7 d6 U5 B: E7 x1 c) q
2058017 ALLEGRO_EDITOR SHAPE Shape not voiding correctly when fillets are present
9 [, d8 \9 Z/ O2010569 ALLEGRO_EDITOR SKILL Using SKILL to add 'nil' to a DRC object following a 'println' statement crashes PCB Editor in hotfix 048.4 ^4 X8 c: a6 j9 \+ O3 ]
2055055 ALLEGRO_EDITOR SKILL Using SKILL to add a 'nil' property value to a String causes Allegro PCB Editor to crash
$ L) R' p- J& e" q1961689 ALLEGRO_EDITOR SYMBOL Pin Numbers are moved from center with Pin Rotation when adding pins to Footprint1 E& R# C2 q, n, \+ N# D$ C/ a
2034949 ALLEGRO_EDITOR SYMBOL Angular dimension from DRA not created in PCB& v% v1 I. Y8 p7 P4 D1 U
2046242 ALLEGRO_EDITOR UI_GENERAL Searching User Preference Summary results in crash- `" W G; M& Z6 G$ z+ Y E4 f
2053496 ALLEGRO_EDITOR UI_GENERAL Confirmation dialog box is behind canvas" O, {* n, i. j: ^/ D: J
2063423 ALLEGRO_EDITOR UI_GENERAL Blocking dialog popped up by axlUIPrompt() goes behind the canvas and is hidden
& \1 s' g6 S1 F) N# O1886781 ALLEGRO_VIEWER OTHER Opening Color192 in Allegro Free Viewer causes it to crash7 U# s/ U( N0 o+ F
1699433 APD EDIT_ETCH Field solver runs when not expected% Q- d* X7 }- t
1937159 APD EDIT_ETCH Routing clines takes long time
+ F8 F- ~3 j: }& x2 V! [8 J/ X9 T2050863 APD SHAPE Taper voiding process is different in Within the region/Out of Region
: C6 l7 J) ^8 M2 i# i2047391 CAPTURE PART_EDITOR Pin type cannot be changed in hotfix 0517 K. e& p. B- Y+ O2 H2 x0 F. ~
2049161 CAP_EDIF IMPORT Fatal error 'cannot determine grid' when converting third-party design to Capture+ z5 V! r& y- x8 J- u3 i1 s2 o0 K
2053578 CONCEPT_HDL CONSTRAINT_MG Values specified for custom properties are not preserved# r- q$ L6 T1 D& B+ ~( [
2047583 CONCEPT_HDL COPY_PROJECT Design Entry HDL crashing when trying to open page 52 of copied project
' l5 x) F1 I3 D4 U( K2036239 CONCEPT_HDL CORE When cutting/pasting, multiple error pop-ups appear for the same notification, j6 ]4 H+ ^6 b! a. @2 f1 b
2037572 CONCEPT_HDL CORE Warning (SPCOCD-578): Soft VOLTAGE property found is misleading and should be auto resolved when closing CM
0 y- n* q" A) u, _: k; a2037578 CONCEPT_HDL CORE VOLTAGE property gets deleted after copying it from a non-synchronized source: J1 u+ T( ~: j) n
2046958 CONCEPT_HDL CORE Moving block pins from symbol right to left places pin names outside the symbol6 X2 O/ u: O* c" o
2032480 CONSTRAINT_MGR CONCEPT_HDL Incorrect matchgroups created when working with multiple level nested hierarchical blocks
. D4 J6 D6 `, q2045274 CONSTRAINT_MGR CONCEPT_HDL Running SKILL script or navigating pages in the hierarchy viewer crashes schematic editor6 q T& y6 h* b4 F U8 U, d
2046765 SIP_LAYOUT DIE_ABSTRACT_ SiP Layout 'dump libraries' crashes when exporting library7 U8 S# X R. g8 H* c) g
2067970 SIP_LAYOUT DIE_ABSTRACT_ SiP Layout cannot dump libraries, viewlog is empty" K% K0 g- h }4 }$ W x1 m f! e
1981749 SYSTEM_CAPTURE ARCHIVER System Capture: Archiving a design from the Tcl command window results in error
! u) Q5 ?3 D% y1 p, q1968437 SYSTEM_CAPTURE ASSIGN_SIGNAL Net name pasted in lower-case though UPPERCASE INPUT is enabled S1 y4 {5 Y( x& n9 H
1983063 SYSTEM_CAPTURE AUTOSHAPES Auto Shapes are being shown as part of components1 M$ m5 H- U2 g$ W) k
1968463 SYSTEM_CAPTURE CANVAS_EDIT System Capture should not allow illegal characters to be entered for net names
6 |& p6 y' w0 z4 \( y: P/ \2006593 SYSTEM_CAPTURE CANVAS_EDIT Asterisk in a search string is not treated as a wildcard character
/ e% z) r ~% I% r0 W: e# f7 }4 \0 T9 d1721863 SYSTEM_CAPTURE CONNECTIVITY_ Net Names move to random locations when the components are moved around the canvas
* x4 f) G+ c: \5 \: C1960130 SYSTEM_CAPTURE CONNECTIVITY_ Disconnected nets when using the mirror option$ y) e) l4 W' ^+ p# |$ e. x' z
1985029 SYSTEM_CAPTURE EDIT_OPERATIO Net aliases do not drag with circuit, they appear to move after the circuit is dropped) f/ e% N8 z8 T$ [
1895142 SYSTEM_CAPTURE EXPORT_PCB System Capture reports incorrect unsaved changes when closed after running export physical
+ g* ~# D+ u1 y& z7 _1628596 SYSTEM_CAPTURE FIND_REPLACE Alias issue in Find: Results do not show the resolved physical net names9 O4 [2 o- O. {/ d
1988297 SYSTEM_CAPTURE FIND_REPLACE Edit > Find and Replace does not replace a net with an existing net on the canvas3 x! x% }. z; K. `+ k4 L
1843885 SYSTEM_CAPTURE FORMAT_OBJECT Renaming a net causes it to lose custom color assignment ?; S9 l1 o; ^8 P V0 L& p
1969308 SYSTEM_CAPTURE FORMAT_OBJECT System Capture: Clicking arrows to increase/decrease font size does not work correctly when clicked fast; C7 D# l; `' X+ \# m( r5 u) |
1990060 SYSTEM_CAPTURE FORMAT_OBJECT Bold, italics, and underline formats not visually shown on all selected objects concurrently, \: b/ N0 B6 b" {9 A4 z" o
1993208 SYSTEM_CAPTURE FORMAT_OBJECT Setting font prior to placing text does not work, pop-up does not work, and bucket results in scrolling page
, o- E, [! R$ F6 w1981775 SYSTEM_CAPTURE IMPORT_PCB Import Physical takes a long time on some designs to launch the UI( N- W! I, @( z+ I5 u
1982320 SYSTEM_CAPTURE IMPORT_PCB In the B2F flow none of the *view files are created& B0 o8 D) n) Z5 `7 [# T
2010996 SYSTEM_CAPTURE INSERT_PICTUR Image in title block is at a wrong location in design: correctly placed in library
! q/ Q( Z( [; R$ Z! E1967614 SYSTEM_CAPTURE MISCELLANEOUS Dragging a circuit with net aliases does not move the net aliases with it. \( v, s% \( p% r2 I0 ~- a) E- Y
1980999 SYSTEM_CAPTURE NEW_PROJECT System Capture stops working with message regarding Part Manager initialization for a design based on DE-HDL
5 O2 w* |7 C$ H+ Z1973437 SYSTEM_CAPTURE OPEN_CLOSE_PR Opening a design crashes System Capture* o% b# Q$ w R2 ]# F. c; E! H
1986566 SYSTEM_CAPTURE OPEN_CLOSE_PR System Captures stops responding on opening project, cleaning project displays project already open message
2 e* l# D1 T& r R' U P; C& ~1993093 SYSTEM_CAPTURE OPEN_CLOSE_PR Add option to override the lock file similar to Allegro PCB Editor
: i' J6 k" H, i- I) c2 i' |, U2042360 SYSTEM_CAPTURE OPEN_CLOSE_PR System Capture will not open nor gives error message when previous lock file present inside the logic folder
3 g( q) m( u( z2 u+ E9 ~1992247 SYSTEM_CAPTURE PART_MANAGER Part Manager displays message for undo and redo stack even after specifying not to show message
# X8 J1 G9 W& s6 D1 ~. d4 p2048000 SYSTEM_CAPTURE PERFORMANCE Performance issue when instantiating and moving a component( l2 j( h* q+ C) o4 a- ^: j
1892120 SYSTEM_CAPTURE PROPERTY_EDIT Some parts missing reference designators and some have two properties, RefDes and REFDES$ {; k& ^" R" ?; k: A
1970009 SYSTEM_CAPTURE PROPERTY_EDIT System Capture: Right-clicking RefDes with conflict in 'Edit Properties' shows the Hyperlink option
6 Z7 D) m" O5 } ^6 b- b2042707 SYSTEM_CAPTURE VARIANT_MANAG variant.lst file under 'physical' folder not updated when closing Variant Editor
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发表于 2019-4-6 21:51
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