新手请教！！！

cuilei83

******************************************************************************** . {, r0 H0 b5 @' A' Q0 W. ?* B* * Netlisting the design * * g- T& _5 Q) z; Y7 t  N********************************************************************************   g3 P, j9 R( B  Z; X4 e4 u& c- fDesign Name: . h: w3 G2 S9 P7 i% y" bC:\wenjian1\yanli2.dsn Netlist Directory: C:\wenjian1\allegro ; d8 r$ ^7 P9 s! y$ y$ M. O. Z' ^Configuration File: C:\cadence\SPB_15.2\tools\capture\allegro.cfg - _! x% U: T1 d# G  i3 U' n 0 u  [1 @8 v. @( ^; |Spawning... "C:\Cadence\SPB_15.2\tools\capture\pstswp.exe" -pst -d "C:\wenjian1\yanli2.dsn" -n "C:\wenjian1\allegro" -c "C:\Cadence\SPB_15.2\tools\capture\allegro.cfg" -v 3 -j "PCB Footprint" . u9 J& o; ^* A& t#1 Warning [ALG0016] Part Name "CAP_0_CPCYL1/D.300/LS.200/.034_10UF" is renamed to "CAP_0_CPCYL1/D.300/LS.200/.034_". ' M! q- T' s/ a) M$ B9 h#2 Warning [ALG0016] Part Name "CAP NP_0_RAD/.200X.100/LS.100/.031_30P" is renamed to "CAP NP_0_RAD/.200X.100/LS.100/.". #3 Warning [ALG0016] Part Name "CAP NP_1_RAD/.200X.100/LS.100/.031_30P" is renamed to "CAP NP_1_RAD/.200X.100/LS.100/.". . x. t+ ^8 q+ D8 z#4 Warning [ALG0016] Part Name "4 HEADER_0_SIP/TM/L.400/4_4 HEADER" is renamed to "4 HEADER_0_SIP/TM/L.400/4_4 HEA". #5 Warning [ALG0016] Part Name "8 HEADER_0_SIP/TM/L.800/8_8 HEADER" is renamed to "8 HEADER_0_SIP/TM/L.800/8_8 HEA". #6 Warning [ALG0016] Part Name "SW PUSHBUTTON_0_RAD/.400X.200/LS.300/.034_RESET" is renamed to "SW PUSHBUTTON_0_RAD/.400X.200/L". #7 Warning [ALG0016] Part Name "8051_DIP.100/40/W.600/L2.050_8051" is renamed to "8051_DIP.100/40/W.600/L2.050_80". 3 Y" Y; b) Y4 M#8 Warning [ALG0016] Part Name "74LS373_DIP.100/20/W.300/L1.075_74LS373" is renamed to "74LS373_DIP.100/20/W.300/L1.075". / N9 N2 i) S0 _; T#9 Warning [ALG0016] Part Name "27512_DIP.100/28/W.600 0 [' T" ]7 n, x/L1.400_27512" is renamed to "27512_DIP.100/28/W.600/L1.400_2". ! ^; E. q  l+ q$ T- c% l#10 Warning [ALG0016] Part Name "CRYSTAL_0_RAD/.400X.150/LS.300/.034_12M" is renamed to "CRYSTAL_0_RAD/.400X.150/LS.300/". Scanning netlist files ... ) `7 H& o, x* c8 q2 h; f2 `Loading... C:\wenjian1\allegro/pstchip.dat Loading... C:\wenjian1\allegro/pstchip.dat & M* h- `2 S5 c( x7 P) U' dLoading... C:\wenjian1\allegro/pstxprt.dat ' h" ]3 Y% t( X( M2 l3 V! cLoading... C:\wenjian1\allegro/pstxnet.dat 9 \$ ?& p' f1 d9 b/ Q8 hpackaging the design view... Exiting... "C:\Cadence\SPB_15.2\tools\capture\pstswp.exe" -pst -d "C:\wenjian1\yanli2.dsn" -n "C:\wenjian1\allegro" -c "C:\Cadence\SPB_15.2\tools\capture\allegro.cfg" -v 3 -j "PCB Footprint" 1 Z8 Z1 ?( b( `: O + I4 w" s5 @0 @ *** Done *** : J9 T6 u% a" j# c ******************************************************************************** & B# W% w2 [9 a4 A9 S* 1 P/ S& N6 B, ^) `5 V- U$ a* Updating Allegro Board * ' x' s5 d/ K1 t9 H! l******************************************************************************** # @( M7 l7 R- S; d6 F9 WNetlist Directory: C:\wenjian1\allegro 2 x6 n7 l' m; nInput Allegro Board: C:\wenjian1\allegro\yanli2.brd . j' a& E# @; D: C) MOutput Allegro Board: # \0 m, k6 @: `, q1 IC:\wenjian1\allegro\yanli2.brd Spawning... netrev.exe -5 -y 1 -n -i "C:\wenjian1\allegro" "C:\wenjian1\allegro\yanli2.brd" "C:\wenjian1\allegro\yanli2.brd" 7 ?1 z" g8 S! W, B4 yReading File : C:/wenjian1/allegro/pstchip.dat               (00:00:00.00) Reading File : C:/wenjian1/allegro/pstxprt.dat               (00:00:00.00) ) b9 ^6 D! O9 |" ^! R3 F% gReading File : C:/wenjian1/allegro/pstxnet.dat               (00:00:00.00) 2 G# S" f7 o  Q/ J& J5 ~Starting to process component instances " K& H) R5 j+ @$ c6 }- f" x0 `% l netrev run on Aug 29 17:10:17 2008    DESIGN NAME : 'YANLI2' 2 j) {) I4 U) u+ ~1 ]# K   PACKAGING ON Apr  6 2004 19:58:38 12 errors detected 9 }: L8 k+ a0 {6 l" F" TNo oversight detected No warning detected & d; I2 g0 ]7 z2 h  g * _) C5 f; _0 ?1 T8 a/ Xcpu time      0:00:12 , G1 `6 [% Z1 C! z4 h5 u  Ielapsed time  0:00:00 , w, p. M! I+ p: z' C   k% V" L" H/ U9 C$ J) V; J Exiting... netrev.exe -5 -y 1 -n -i "C:\wenjian1\allegro" "C:\wenjian1\allegro\yanli2.brd" "C:\wenjian1\allegro\yanli2.brd" - e2 {3 ?1 y* ?Cadence Design Systems, Inc. netrev 15.2 Fri Aug 29 17:10:17 2008 6 `, C# v/ g# l2 \+ O: {+ H9 K(C) Copyright 2002 Cadence Design Systems, Inc. / Q7 w" Z2 D3 {) l" { - W; ~' U" \9 t0 a$ C------ Directives ------ RIPUP_ETCH FALSE; RIPUP_SYMBOLS ALWAYS; MISSING SYMBOL AS ERROR FALSE; * @' [5 B' Y: g9 V1 h  cSCHEMATIC_DIRECTORY 'C:\wenjian1\allegro'; BOARD_DIRECTORY ''; ( O  v) \2 q% L0 V) GOLD_BOARD_NAME 'yanli2.brd'; ' u' l; F4 ?% [8 t) XNEW_BOARD_NAME 'yanli2.brd'; 8 |8 c4 r$ \* {' s CmdLine: netrev.exe -5 -y 1 -n -i C:\wenjian1\allegro C:\wenjian1\allegro\yanli2.brd C:\wenjian1\allegro\yanli2.brd 4 t/ c( |( X$ c: Q5 _! D7 B------ Preparing to read pst files ------ + n+ i4 {. m$ U! p6 ^6 [ Starting to read C:/wenjian1/allegro/pstchip.dat " {$ E2 e& k. U& L7 o3 N   Finished reading C:/wenjian1/allegro/pstchip.dat (00:00:00.00) ) c3 w* Z  Z( |0 ?2 J! {! xStarting to read C:/wenjian1/allegro/pstxprt.dat    Finished reading C:/wenjian1/allegro/pstxprt.dat (00:00:00.00) 4 @$ y: [* E; M4 c" iStarting to read C:/wenjian1/allegro/pstxnet.dat 8 E- D* r. X3 ~" n4 R' X   Finished reading C:/wenjian1/allegro/pstxnet.dat (00:00:00.00) : U5 o8 F- u: f1 D0 [" h6 |------ Oversights/Warnings/Errors ------ 8 b6 s/ O8 f1 ]  I3 H7 q6 \ #1   ERROR(302) Device library error detected. * d5 o) V3 C& l! R' Q" T$ A. Q( O8 JProblems with device 'CRYSTAL_0_RAD/.400X.150/LS.300/'. JEDEC_TYPE property 'RAD/.400X.150/LS.300/.034' is illegal: 'Package name is not legal.'. 3 E6 t0 z1 ^+ y* a  {. L! j Device 'CRYSTAL_0_RAD/.400X.150/LS.300/' has library errors. Unable to transfer to Allegro. 8 z8 |* F5 e* E7 z5 o, w4 U: z0 i1 t#2   ERROR(302) Device library error detected. : v/ y& ?! O/ L8 w: H# B 1 u" C1 \5 m9 N/ Q) \Problems with device '27512_DIP.100/28/W.600/L1.400_2'. JEDEC_TYPE property 'DIP.100/28/W.600/L1.400' is illegal: 'Package name is not legal.'. + _( b+ q0 C4 P, M  t Device '27512_DIP.100/28/W.600/L1.400_2' has library errors. Unable to transfer to Allegro. * ?" r! Q* @  S: Z! c* q; R#3   ERROR(302) Device library error detected. ; g" M. X& w  @. n7 x Problems with device '74LS373_DIP.100/20/W.300/L1.075'. JEDEC_TYPE property 'DIP.100/20/W.300/L1.075' is illegal: 'Package name is not legal.'. 0 c  g) {) ]/ Q, H% A: aDevice '74LS373_DIP.100/20/W.300/L1.075' has library errors. Unable to transfer to Allegro. # E% Y; e$ S' G#4   ERROR(302) Device library error detected. Problems with device '8051_DIP.100/40/W.600/L2.050_80'. JEDEC_TYPE property 'DIP.100/40/W.600/L2.050' is illegal: 'Package name is not legal.'. # r. d4 f4 D' A2 Y+ N( p) f- z) cDevice '8051_DIP.100/40/W.600/L2.050_80' has library errors. Unable to transfer to Allegro. 4 k5 q/ W/ Q! Q& @3 C( a" P . Y. z1 k$ K2 F/ [8 l+ w#5   ERROR(302) Device library error detected. , I% [4 n6 [% v6 hProblems with device 'SW PUSHBUTTON_0_RAD/.400X.200/L'. JEDEC_TYPE property 'RAD/.400x.200/LS.300/.034' is illegal: 'Package name is not legal.'. 3 D1 |# e, \: JDevice 'SW PUSHBUTTON_0_RAD/.400X.200/L' has library errors. Unable to transfer to Allegro. $ X9 U, _) `* T$ ~1 \" |#6   ERROR(302) Device library error detected. ' d- Z4 v% }4 q Problems with device 'R_0_AX/.400X.100/.034_10K'. JEDEC_TYPE property 'AX/.400X.100/.034' is illegal: 'Package name is not legal.'. + C9 K5 E/ {, Y# }: k! p8 i$ D$ k. T 2 T2 D8 Y, k9 S) ZDevice 'R_0_AX/.400X.100/.034_10K' has library errors. Unable to transfer to Allegro. # h6 y+ m  Z% Q: F+ N! M #7   ERROR(302) Device library error detected. ( j3 M; E+ k9 OProblems with device '8 HEADER_0_SIP/TM/L.800/8_8 HEA'. JEDEC_TYPE property 'SIP/TM/L.800/8' is illegal: 'Package name is not legal.'. Device '8 HEADER_0_SIP/TM/L.800/8_8 HEA' has library errors. Unable to transfer to Allegro. + \* k! B& t* t2 d% U4 {#8   ERROR(302) Device library error detected. # _8 c" y4 e! l0 OProblems with device '4 HEADER_0_SIP/TM/L.400/4_4 HEA'. JEDEC_TYPE property 'SIP/TM/L.400/4' is illegal: 'Package name is not legal.'. # u+ i" c% b6 n* d 8 n/ k* z+ I# k( ^! mDevice '4 HEADER_0_SIP/TM/L.400/4_4 HEA' has library errors. Unable to transfer to Allegro. 1 {* ]1 S3 g# P, L9 G# X #9   ERROR(302) Device library error detected. Problems with device 'CAP NP_1_RAD/.200X.100/LS.100/.'. JEDEC_TYPE property 'RAD/.200X.100/LS.100/.031' is illegal: 'Package name is not legal.'. " a' {  X. m% A0 g + L! w) i& W+ O; gDevice 'CAP NP_1_RAD/.200X.100/LS.100/.' has library errors. Unable to transfer to Allegro. + B# G9 U6 U) {# Y3 U' v: J2 d#10  ERROR(302) Device library error detected. Problems with device 'CAP NP_0_RAD/.200X.100/LS.100/.'. JEDEC_TYPE property 'RAD/.200X.100/LS.100/.031' is illegal: 'Package name is not legal.'. Device 'CAP NP_0_RAD/.200X.100/LS.100/.' has library errors. Unable to transfer to Allegro. 8 A0 x0 f! q3 X! k6 j; t   b6 z  y0 t* O; j3 H& v( c, }#11  ERROR(302) Device library error detected. 6 C. d: ~3 z8 q$ G  w; `$ l ) N: Z$ b  S$ }2 dProblems with device 'CAP_0_CPCYL1/D.300/LS.200/.034_'. JEDEC_TYPE property 'CPCYL1/D.300/LS.200/.034' is illegal: 'Package name is not legal.'. * p8 ]$ J& w- \. `  R' Q " [+ v  ~7 c6 _; ^5 b1 t9 X% {Device 'CAP_0_CPCYL1/D.300/LS.200/.034_' has library errors. Unable to transfer to Allegro. ------ Summary Statistics ------ ! e" s% q, @' z % J( ~5 ~5 I( n6 g, M' l( D3 l/ {#12  ERROR(102) Run stopped because errors were detectedへ 0 {# l7 r7 K- s$ |/ Z/ s) m9 l4 y5 S netrev run on Aug 29 17:10:17 2008    DESIGN NAME : 'YANLI2'    PACKAGING ON Apr  6 2004 19:58:38 ! ]6 `# \$ J9 w* F* P! H    COMPILE 'logic' 1 T/ Z5 ]' V5 ^6 S) f/ G+ G0 S   CHECK_PIN_NAMES OFF   u2 j4 V+ l+ V- z1 F   CROSS_REFERENCE OFF    FEEDBACK OFF    INCREMENTAL OFF    INTERFACE_TYPE PHYSICAL    MAX_ERRORS 500 4 [' H  r, ~6 x/ Y3 ]0 J  o1 m7 }6 T   MERGE_MINIMUM 5 . F' x9 ]. F1 Z& q   NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|'    NET_NAME_LENGTH 24    OVERSIGHTS ON ! w3 S, Z; K0 e) A% }) S& I1 v   REPLACE_CHECK OFF ! w( N! E) m* j1 A) W2 `% P1 a   SINGLE_NODE_NETS ON    SPLIT_MINIMUM 0 4 i  Z$ v- k, Q8 s" Z0 h7 n( d/ Z   SUPPRESS   20 ! u1 g2 @0 q2 `   WARNINGS ON 6 D. Y: i, U' E. i: y! ^12 errors detected No oversight detected No warning detected 6 B" A/ o0 x  T6 B. Mcpu time      0:00:12 " H2 Q# c7 ]& A/ ^  yelapsed time  0:00:00 ) {9 q8 l5 U$ U7 t& y* N ! h7 ]' f' ?; s$ {- N*** Done *** ! I7 I9 S* O& o4 u1 H- C) M( E9 s 0 s+ @6 V: `9 B******************************************************************************** 9 P: m5 y9 A7 N. H3 R1 [* * Spawing Allegro 6 o' s' s  g* o2 a1 {; e+ y5 A* ******************************************************************************** Spawing "C:\Cadence\SPB_15.2\tools\pcb\bin\allegro.exe" -mpssession Administrator "C:\wenjian1\allegro\yanli2.brd" + `8 V- Q( Y6 l8 a 4 y7 I5 }" J* R- `/ w7 {2 y$ s *** Done *** * k$ [+ ^  F) ~# _" o怎么回事 7 f! _" _- @6 | % J; L, Q) J6 b4 v2 M- t( O

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numbdemon

原帖由 cuilei83 于 2008-8-29 18:17 发表
; G9 D7 {; S8 A4 u+ h% m********************************************************************************
*
* Netlisting the design
*
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! w( S" C  B4 `Desi ...

, I# O; S# B) v+ s什么问题？

玛瑙河畔

这是drc后的结果吗？