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换了nandflash后和加焊DDR后有两种状态,但是板子都没有启动成功,串口有打印。
% `: _( J. B; @1 _以下是状态1的log:
! b% X9 l$ _. a |SoC preloader 1.0.0.r1422.lzma (Wed Nov 13 14:32:57 CST 2013)
8 Z# E o- I& f9 dII: Stack @ 0x9fc1fd18 (parameter 736B)
7 d7 a+ A0 C+ ?1 E. h+ l- d; UII: Console... OK
- S: p0 U2 I+ E4 ?, q; OSetting DTR* r" N+ x/ @9 O9 ~4 \% G
II: DRAM is set by software calibration... PASSED
. r& I2 o1 C9 U H6 \ S5 b8 v" A$ D+ S3 ?0 p7 z. v
DDRKODL(0xb800021c):0x00000410
* n; F$ C4 M% o7 |; p7 [MCR (0xb8001000):0x22041de0, 0x21220000, 0x54433830, 0x0404030f( _/ m S. ]% H0 |; t8 q* N% ]5 K
DTR2(0xb8001010):0x0630d000% k6 t2 }% w, R! o! n
PHY Registers(0xb8001500):& A; t5 U% o0 L2 |
0xb8001500:0x80000010, 0x0000007f, 0xa1a00000, 0xfdffffff
/ C9 _+ N9 m/ v& C* N* h0xb8001510:0x00140a00, 0x00180c00, 0x00140a00, 0x00180c00# u' i$ C. Q7 e ^% E o. c, e% a
0xb8001520:0x001a0d00, 0x00140a00, 0x00160b00, 0x00120900- d0 q' V( d$ s* ~* G
0xb8001530:0x001c0e00, 0x001e0f00, 0x001c0e00, 0x001e0f00
! U7 W( D6 e# Y9 L' ?0 }/ ]- V" x& I" O0xb8001540:0x001e0f00, 0x001a0d00, 0x001c0e00, 0x001a0d00
# T! `9 @) }+ g1 ?2 ~" B0xb8001550:0x00100800, 0x00140a00, 0x00100800, 0x00140a00. ] o9 u1 J8 W4 G9 L, V
0xb8001560:0x00160b00, 0x00120900, 0x00140a00, 0x001008005 Y; M* D8 ^4 I% [ Q. @2 l9 E' S+ L
0xb8001570:0x001a0d00, 0x001a0d00, 0x00180c00, 0x001c0e00
' h( _* C) L/ f9 S+ N: G0xb8001580:0x001c0e00, 0x00180c00, 0x001a0d00, 0x00180c00
* B6 \+ T* l+ |! e0xb8001590:0x00000000, 0x5110dbd9, 0xa9a95656, 0x5352b5b53 z0 b3 q2 [- q: x5 F# ^
0xb80015a0:0x4145dcdc, 0x00000000, 0x00000000, 0x00000000
3 g( V/ b" l6 Q3 ~( q1 y% MII: PLL is set by SW... OK5 \4 D0 X1 b/ T3 M7 ~: b
II: Flash... OK0 ^: j- m/ q w f+ Z: U& ^7 u
II: Stack @ 0x801ffff80 O. e7 b9 q. V; `2 T& C8 A Z
II: Starting U-Boot...
) q/ f, L( x) [/ R/ V* OII: Inflating U-Boot (0x80000040 -> 0x87c00000)... # f% C( @: j5 y! R" E
EE: decompress failed: 1- c1 \: v- i2 G8 _/ l3 ~9 ~
以下是状态2板了log:
$ ]* D& m8 O6 p6 a+ ]+ T5 sSoC preloader 1.0.0.r1422.lzma (Wed Nov 13 14:32:57 CST 2013)
! M! t) d- {" ]: XII: Stack @ 0x9fc1fd18 (parameter 736B)6 L$ M6 {0 f. y
II: Console... OK
, l" W" H3 F4 T( j! c! t, i8 ^Setting DTR0 D) ]7 H! N; U" K
II: DRAM is set by software calibration... PASSED2 [% d7 h; W# u% {/ H0 h
" H8 Q' r/ C) u6 I
DDRKODL(0xb800021c):0x00000410
1 {- E. o/ h% Y q% P1 m& ^+ FMCR (0xb8001000):0x22041de0, 0x21220000, 0x54433830, 0x0404030f
6 z5 ?! y7 u+ ~) X6 fDTR2(0xb8001010):0x0630d000( O, w$ _# D9 \
PHY Registers(0xb8001500):: o0 h# K( m5 s$ d2 _ {* r
0xb8001500:0x80000010, 0x0000007f, 0xa1a00000, 0xffffffff4 L4 O' A ~3 N. H# w
0xb8001510:0x00120900, 0x00140a00, 0x00120900, 0x00160b00- k# L9 V4 t$ e3 |5 {) [( Q
0xb8001520:0x00140a00, 0x00120900, 0x00140a00, 0x00100800( ~& q2 }% V0 }
0xb8001530:0x00180c00, 0x001a0d00, 0x00180c00, 0x001a0d00; h% s A2 Y7 B4 g
0xb8001540:0x001a0d00, 0x00180c00, 0x001a0d00, 0x00180c00
: g9 `; m* W; w. Q7 [; J4 \0xb8001550:0x00120900, 0x00160b00, 0x00120900, 0x00140a00
, ]( ~4 R- b. N6 g) N* T4 o0xb8001560:0x00140a00, 0x00140a00, 0x00120900, 0x00100800
; V9 d. g& m2 d" w7 |3 ^" D0xb8001570:0x001c0e00, 0x001c0e00, 0x00180c00, 0x001c0e005 e# B$ C" h, j- b" o& U+ p
0xb8001580:0x001a0d00, 0x00180c00, 0x001a0d00, 0x00180c00( a, l' `$ _" H0 W. S
0xb8001590:0x00000000, 0x5adad2d2, 0x24207574, 0x5a5adada
# O, _- i- x3 ^0xb80015a0:0x8d0da7a5, 0x00000000, 0x00000000, 0x000000002 X% t1 T v% [; I; U
II: PLL is set by SW... OK
- W+ Y& \8 M& {! e" t1 RII: Flash... OK
6 O3 h E U' O! Z) v- UII: Stack @ 0x801ffff8/ U% e# _' _$ @0 v" n; @5 f
II: Starting U-Boot...! M" Y( @! M8 }+ c
II: Inflating U-Boot (0x80000040 -> 0x87c00000)... OK$ `0 h2 L* U( \4 d
II: Starting U-Boot...
2 k% q R+ y" M8 c; r" i* B8 _1 L& X1 `1 z5 }$ w
# A* L' B. k4 P4 i2 j3 uU-Boot 2011.12.NA (Nov 13 2013 - 14:33:03)# |* h/ ]# ?( j
% P* o t& z4 Y% m J
Board: LUNA6 |& ^; f) W* n
CPU: RLX5281 600.00 MHz, DSP: RLX5181 500.00 MHz, , DDR3 300MHz, LX:200.00 MHz
! S$ ?% q5 m" t, k9 tDRAM: 128 MB4 K& l3 w! `% P( \
enter nand_init
( N i) I( n$ c6 M& c* ^& Q' _5 ]board_nand_init()
' D+ p+ L3 i5 z; J) A1 d/ S/ Tparameters at 0x00001212
. v' [6 I, r7 G1 M! a: ?parameters.read at 0x9fc00550
) B: X6 }, Y5 e- Wparameters.write at 0x9fc03308
4 R/ x0 m F& k- V) ]1 r- Sparameters.bbt at 0x9fc1feac4 {8 T- O- A7 S( E9 S; J
uboot- read nand flash info from SRAM2 y$ C2 ?/ _& e5 F3 }
flash_info list* k9 ]5 {. U8 A! u! V3 M
flash_info.num_block : 1024- z! B: s" o8 `, _6 h. X
flash_info.num_page_per_block : 64# e* r" l# s6 B7 n4 [; D) \
flash_info.page_per_chunk : 1
, K, K2 u4 h3 M! k+ Iflash_info.bbi_dma_offset : 2000+ m$ q! I+ S) \8 Q0 F
flash_info.bbi_raw_offset : 20486 p4 T' l! i& w& X$ i/ T
flash_info.bbi_swap_offset : 23
' S8 `$ v* L/ Y: H9 `) iflash_info.page_size : 20486 e t, M) f5 @& e% I6 K+ A$ Z
chunk size : 2048
8 n- O! m0 o9 ?* eflash_info.addr_cycles : 4
" ^1 l% M! G& Y1 a0 o1 Kpblr_start_block : 1
/ i; r ?$ V" b1 E, C. C& snum_pblr_block : 3
8 t- c% y6 g+ W" V7 }8 pparameters.curr_ver is a
3 G; g. ~; J" {1 [" A1 I' Wparameters.plr_num_chunk is 29+ e s8 M, }# W* \0 Q" B
parameters.blr_num_chunk is 456 u0 q+ x3 v) h5 k( C
parameters.end_pblr_block is 4
$ s/ N) v5 i b/ P6 artk_nand_read_id id_chain is 9580f192+ V( b! E( J3 x, z y
nand: Manufacture ID=0x92, Chip ID=0xf1, 3thID=0x80, 4thID=0x95, 5thID=0x40, 6thID=0xc0
0 {+ e' }' k* {0 M/ Ythis->pagemask is 65535 a( J( F, y- o% O1 s5 r; I
this->chip_shift is 278 G5 a1 T% X8 T4 P& A
parameters.bbt_valid is 1
' T9 i9 P/ p: k( }) t7 Ocreate_logical_skip_bbt( @* g' L) S- l% L1 ]
last skip_block 1024, A: @/ j) U B# G ^7 S1 H8 _
nand.c nand_init_chip mtd size is 877bfeac, E m9 {* f7 T7 u% H' ~1 y9 ~2 {
128 MiB
) J i# t' u, Y |2 ?Loading 131072B env. variables from offset 0xc0000
' C" I8 p9 N# g8 wUnknown command 'sf' - try 'help'* F3 B4 C$ V% ^# m2 ~! i
Net: LUNA GMAC ' n0 y7 E9 m! [% ^# p, h2 U! @
Warning: eth device name has a space!# ~& E* A/ H7 A* `) C" J/ X
* k9 q5 O" s/ P% |/ |0 \Hit space key to stop autoboot: 0 + d: \4 R7 V6 c U
" W8 w5 s7 q0 Z8 v8 m
4 V+ [$ f# }" u1 Q
ACTIVE IMAGE 0 (tryactive=2 sw_commit=0)
; X; A% U9 Y7 i1 T+ b2 t& o$ @; d b4 F8 @( F+ j( X6 E( V% K P$ B
reset pcie0
7 A V- V) U [+ o% G) creset pcie10 b$ b1 ?7 U6 G
! @: @: N( j: w4 u! P
NAND read: device 0 offset 0x100000, size 0x380000
" J( g; m/ p7 d W* z7 i 3670016 bytes read: OK
+ s+ q7 V. d* H' ?1 ?; q## Booting kernel from Legacy Image at 82000000 ...
9 M# x @" a p" Y6 W& b Image Name: Linux-2.6.30
. B; P E, a* { Created: 2013-11-14 2:56:37 UTC
0 i+ q. [" Z* X4 n7 w Image Type: MIPS Linux Kernel Image (lzma compressed)+ Y. `& h! ]& g; f" _
Data Size: 1791872 Bytes = 1.7 MB+ a# r3 }( y2 n4 q- U
Load Address: 80000000
, l: c5 I2 C5 U& s9 O' h* T1 U Entry Point: 80000000
; g" Y+ u/ v: A! a% H# H5 M m Verifying Checksum ... Bad Data CRC
, N/ A6 m0 A2 k+ W) wERROR: can't get kernel image!
9 }# x; l& T7 f4 ^5VT-2510# - L1 m. F3 R8 k. A+ i
请问大家这是什么问题呢? |
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