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我的还是不行呢,好多的帖子都试过了,一直出现
- f* s( B0 M! i* j( yTranslating E:/SPB16.3/Allegro/temp/project/S713OBX_SUBFPC/11.asc.3 l" Z! a& M! ~
Using translator version @(#)$CDS: pads_in.exe v16-3-85D 11/3/2009 Copyr 2009 CADENCE DESIGN SYSTEMS.' k: Y0 a5 X$ X) i8 Z5 i' J+ c
Reading PADS ASCII file header.
4 T! Y5 W c0 [- y3 D. w, T- a4 d! A Version = PowerPCB4.0
' c/ V2 B/ F& p; \" \; \2 X Route Layers = 2
, z' h/ h, m# y9 V H Units = METRIC1 F# w6 }1 n4 R( |6 U* c
Hatch mode = Vertical / Horizontal
$ _3 X7 f9 z) J* |& P. C) O; j% v) X Hatch grid = 0.100000, angle = 0.000000, anti-pad spacing = 0.000008
$ r/ j, P( P( lInitializing new database.
4 K! ]) Y0 ]4 E, k$ K Creating layers.
. @3 D5 j! @- T1 DReading PADS ASCII file body.
+ f' J; i, F& O# d8 A *MISC*
1 x/ K2 x& n6 E) c7 ]$ d" o *MISC*3 Z( Q0 ]. N/ X& x1 `
Information: CSet 1_5_6 renamed to DEFAULT$ Z* D: P. y2 K f
3 m5 L2 O1 A9 ^4 H7 KWarning: Allegro doesn't support default electrical CSets.
# w4 |1 f. L2 {9 n *MISC*
) T. ^& {: q& Q1 U' @& B6 ^- ?" [ *MISC*
" h0 m+ C- Y z4 Q! Z *MISC*
4 @. ^/ W: }( V+ V# N6 e8 yLZ帮忙看一下什么问题呢? |
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