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本帖最后由 stupid 于 2013-4-30 23:17 编辑 / o+ A8 V% U7 ^# X, x! f1 e
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某一天，一个叫马克的人发起了帖子，采用了滚动刷屏的方法，4个帖子，一个内容：招人
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首帖Date: Mon, 7 Jan 2013 17:36:56 +0000
( ?) Z% G$ Z. E2 N2贴 Date: Fri, 15 Feb 2013 00:22:29 +0000+ D: u/ q- n9 W6 U7 H
3贴 Date: Thu, 14 Mar 2013 04:49:58 +0000+ @* D1 F# Z7 k
4贴Date: Thu, 25 Apr 2013 18:37:34 +0000
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My Team is looking for a Senior Staff Engineer(Backplane Architect)/Principle ' A; r5 n7 ]3 } B7 [3 v
Engineer;
% `% T! G1 O& {! dResponsibilities/Description;# c% j( o& a/ V
Responsible for providing the backplane architecture and 10G+ High Speed SI3 l. O4 G9 k e8 E
solutions for Next Generation telecommunications equipment in the router,
6 o- i; s: o( V& I: dswitch and transmission product lines to meet system design requirements.
4 G5 X; n: q# }# l& b* w$ N2 _Experience in co-designing of ASIC, Package, PCB and System interconnects
|' x: |1 L8 ydesired. including:
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- Design and analysis of multi-gigabit serial links for Backplane and6 I0 j8 w3 `9 Y% q# V3 {6 U; E6 q- F
chip-to-chip interfaces meeting CEI, XFI, XLAUI, SFI, 10Gbase-KR, PCIe, and5 D& ~5 d$ U/ F0 f7 N
other standards.% S- \ J# C; w5 D) K( k
- Familiar with ASIC, Hardware, interconnect teams to evaluate design( o/ ~2 N) z+ Y, V" X( E3 X, N
tradeoffs and optimize design performance / risk / cost /manufacturability.
( D9 V% o# P- W6 V, w5 Q I- To evaluate package designs, characterization of SerDes, and design# G* \+ S9 h7 C3 f
experiments to do the same.
" B: C0 J1 q( P' g- Modeling of electromagnetic 3-D structures.
8 N# U1 |0 g; y+ j- Modeling and analyzing power delivery networks (PDN).( d6 N4 x, P0 s }! n
- Familiar with memory technologies such as DDR2/DDR3 is preferred.
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Qualifications/Requirements:
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, ]* d# K3 r% ~( P2 u- Performing physical measurements to collect data for design$ M0 y5 I+ o/ g v- p$ D# L
validation and simulation correlations.8 R3 t' y+ h+ ?2 b, I# r3 E
- Knowledgeable in using most major SI/PI tools: HFSS, CST, HSPICE,& M) {& H7 O& j+ s+ o4 E
Sigrity Tools, StatEye, ADS, Matlab, Cadence Allegro and APD, HSPICE, and- y+ z& f% t h8 Y* A/ @/ D
other tools.! m2 z, t, N5 b2 v2 t
- Experience in correlating simulation results with lab measurements' z' w3 K% W+ J5 {3 q
using oscilloscopes, TDRs, VNAs, BertScope is a plus. Must be self- L; F: W& \ h* W$ [% ]0 A
motivated with strong communication and teamwork skills.
& [+ j* M. c! i9 z6 R- The working experience in Core router or Edge router similar product
7 x- k# |9 Q$ E) g) M/ Q in large telecomm infrastructure company.8 r% O+ c. g# z9 y6 t, j: z9 p9 H
A MSEE, or a PhD is preferred, with 10years of experience.8 B& x6 \" O9 Q! }
0 x( l% r. I3 u# sSome portion of time will be spent in Shenzhen working with the HQ SI team.
2 g2 X; k$ R5 Z/ T8 [Travel will be about 30-60% to China.+ U7 S9 O& g7 |9 e' m4 q9 S' l" J- S
' ]+ T8 K3 t+ X% u7 vPlease contact mark.apton@xxxxxxxxxx Z, E+ k/ [8 I, u8 A
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插个广告，有符合以上条件，又愿意在深圳工作的人速速联系我 dbm@chinafastprint.com |
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发表于 2013-4-26 22:19
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发表于 2013-4-30 23:10