Cadence_Concept_HDL&Allegro原理图与PCB设计

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x136644177

请问别人电脑上打包过来的原理图无法出网表是什么情况，提示error:keword'file_type' not found on line 1 in the partta~ ble file,or the character':' is missing from the beginning of the key proper~

zhongyiwaiting

顶一个!!!

osakau

很老的东西。

hnhjw

这个真的要好好学习了！

david.dan

好东西，非常感谢！！！

lgl2466

klend

顶一个，个人觉得没必要用HDL，用ORCAD就足够了。

daisy_ldh

顶一个！

cxt668

可以参考参考

hualu2951

很好的东东  感谢楼主

denniszeng

顶一个
$ a$ A7 R: P: I# T& `* C7 N' G

tangmaojian@yea

( [& ?) O4 ?9 K! c& A这个真的要好好学习了！

xiaoronglong

LZ，allegro Design Entry HDL转成allegro Design Entry CIS怎么弄？

XYX365

xiaoronglong 发表于 2014-9-10 15:17
LZ，allegro Design Entry HDL转成allegro Design Entry CIS怎么弄？

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