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我建了一个电容 为什么 不能放到原理图中呢?

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1#
发表于 2013-1-4 19:52 | 只看该作者 |只看大图 回帖奖励 |倒序浏览 |阅读模式

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为什么那个C0402-RF 不能放到原理图中?  我刚刚单独建了一个元件就不让放到原理图中 点击那个图标才能放入原理图中呢?; C/ K& M, U* i
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实在不熟悉这个软件

124.jpg (176.49 KB, 下载次数: 16)

124.jpg

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2#
发表于 2013-1-4 20:40 | 只看该作者
建工程时加入了你的库后,View→DXDataBook里找到相应元件加入

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3#
 楼主| 发表于 2013-1-4 20:56 | 只看该作者
dali618 发表于 2013-1-4 20:40
5 m+ l  D) X! w3 p- S3 }- ^建工程时加入了你的库后,View→DXDataBook里找到相应元件加入
1 o' |! Y, F( \3 j4 u
感谢已经添加进去了。但是没有 REF  我希望自动添加一个REF  找一个使用的REF添加上去 。例如没有C1没有使用 自动添加一个C1。这个没有REF。: K' y+ O; [) r. @3 e- P5 k
* q% M0 s0 z% V2 ~$ A. p% S  P
这个继续怎么办呢?

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589.jpg

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4#
发表于 2013-1-4 21:00 | 只看该作者
package操作后就有了

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5#
 楼主| 发表于 2013-1-4 22:13 | 只看该作者
本帖最后由 wanruyi 于 2013-1-4 22:40 编辑 - b9 M- ]5 A8 M& C9 D7 u; x+ c

; J4 W3 n& q6 Y. ?+ o" R  nEE   
, G, v2 h8 k8 Q' D8 |" M. @% S2 i  I, Y6 |: B  S1 M
WG  我有本的WG的书籍 对着  书操作  结果这个EE7.9.4  和书上的差异太大。+ a- g2 r/ q& {
5 ]2 A1 d0 G" N7 C0 L0 X
学习进度缓慢。  这个软件难学。没有十足的信心  还是不碰为好。& x% D% \! C* j& ]  `
9 ?/ {/ s" h& t6 M/ Y* N8 Z; W# f/ Q
打包 出现如下问题:5 k6 I$ [, b" Z7 z4 H

! ?; {# n8 n* P& p- r不知道哪里卡住。  能不能解释一下 这个新版本的打包命令。
( [* r& i# I5 t+ f4 {
8 B8 X2 P- L; r( W3 g网络表也生成不了。
+ C7 H/ J, x1 C: L1 [2 {! o6 x. N6 `9 \
The Central Library is at "C:\Users\WANRUYI\Desktop\Center_Lib\Center_Lib.lmc".
0 v. _) _+ y1 Q9 t* V& e. O! [6 r* X! z: \9 K/ ?; e' ~* a
Unable to determine the Disable Repackage status.$ b- f) X7 J& Z9 q7 u+ d$ J/ C
!Repackaging will be allowed!
0 Y" z7 q& r  p
: T. `" z) d4 ?/ i: b0 m9 f7 H0 g( ZThe PDBs listed in the project file will be searched to satisfy the parts
6 t: L& r+ ~/ L% ]7 Wrequirements of the iCDB only for parts not already found in the
; H0 m9 T3 G7 U" E/ @; D) t  LTarget PDB.. X( z6 @: b; P1 N7 B$ {0 U1 O

& h/ p5 c; a' y1 P) w, w$ Y* BThe AllowAlphaRefDes status indicates that reference
9 b1 I' A) U1 n0 m% w, `designators containing all alpha characters should be deleted% q) w2 V5 T& i, N5 e
and the relevant symbols repackaged.
: a  j6 s6 ^" }8 F7 I& c, o) z# P( S: l5 S& f4 K7 ^$ P
All existing reference designators and frozen properties will be ignored
9 S) ?! v0 X* d. {! Y9 s  tduring packaging except for those on symbols within Reusable Blocks.
# e! b7 n% I" c0 x% ]. L8 FOnly the Room and Cluster symbol properties will be read for the purpose3 \: ?. O1 N5 Y5 P0 m& g  J
of user designated packaging. Use with the -y option if back annotation. T; \% L3 P; d8 X. `1 a3 w! b& r
to the Common DataBase is not desired.
* @- I* D; b1 X
6 P5 g5 w) k, i+ `2 X* QThe cross mapping of symbol pin names to Part Number pin' k1 V9 y) D5 i% Y6 G" s
numbers will be checked for packaged symbols and mapped correctly2 H. C% l! d* |8 t& t
for unpackaged symbols.' K; B, E) V' ~
4 n. j  n8 Q' \/ Z8 i, C" _
Properties that have been checked off in the Property Definition Editor0 T; o1 k  o) G# Y6 |# n8 i
found at Library Manager/Common Properties will be checked for value
- \3 m, `4 o( |' ^differences between the PartsDB and the non-null properties on symbols.
7 i' I, U) l" c2 F8 XThose properties checked off (other than Part Number)
) Y6 R! Z& o1 m0 U4 h4 mwill not be transferred from the PartsDB to symbols.
& |  ~# D$ P" X$ B7 N. }The following properties were checked off in the Property Definition Editor:* w6 r5 Z' t3 Y
"Pkg Group"% h  w. G0 A$ v$ |+ R
"EPFIXEDWIDTH"2 y0 a: E1 P- i9 L
"EPFIXEDLENGTH"5 f  |8 \" e5 `$ t& x  Z1 J& O
"Term"3 S# B% K" G0 n/ v
"SIM_MODEL"0 b5 S3 `+ l- `8 R6 ^
"SIM_MODEL_FILE"9 D* S/ t: y4 S, N  Z2 M
"Array Component"
7 a+ B5 O$ T0 w: ]"ICX_PART_MODEL"9 b$ a& |  ~! \, n! U. r& l' Q; Z
"Use Verilog"9 H/ V: |! q1 [$ H) F
"Order"
  H( k/ `) I% V/ p"Parametric"7 F- q( n' B. m' M
"Value2"4 ]7 ]- ^& R- {
"Tech"
3 z' _$ `1 v; G/ T' p"IBIS"
& w, g3 N! F$ ]8 f, z"VHDL Model"7 w# r) K: y$ v* D9 x1 O
"Verilog Model"
- [1 W5 i+ n5 [. o3 ?" u"Tolerance"' q6 `  l. e  f% w! \  g
"Value"5 ]! T8 j" I0 j8 A0 `  v0 E1 N! x

( b3 N( e2 U. l8 `; |# g6 I" kChecking for errors in the ICDB...
' M  e3 t3 i3 t; f' A# ~
2 ?% a4 [! {  _. L9 x# p& bNo errors found. Proceeding with packaging...
0 j0 H7 Z; d* I+ t1 r1 A
9 }( o  t3 R7 r# Y& }1 L
% V% D' A$ c0 z* Q! y$ y0 F
& D& ?) @: x* N4 k% i* k  A8 t( J* j
ERROR: Block page1, Page 1, Symbol $1I34:3 T' _' z  r$ t* e& |, `
No part data./ T: X  S7 r3 C6 y
No Part Number, Part Name, nor Part Label has been entered.( c" l$ O$ N* c0 }
Please enter some data to enable packaging.
! g& r! M! k: l" o  e
, a2 T* l; U$ \  e/ S/ s* a$ ?8 k: h3 a, c+ n6 g6 g* O
ERROR: Block page1, Page 1, Symbol $1I36:( e: z! q- }+ g9 _
No part data.
: F" @  V9 ~' n+ RNo Part Number, Part Name, nor Part Label has been entered.% P( m0 p7 u# k/ U, D9 f& T
Please enter some data to enable packaging.
8 V/ j$ Z9 q1 ^& G9 _
6 }' p+ o" ?( H. W& P9 ?2 O4 \7 j9 v# N7 [, c# A
ERROR: Block page1, Page 1, Symbol $1I37:
6 S8 k+ H, e) X6 U4 D& HNo part data.0 N6 ^' ~9 s/ d; g" c7 Z( a
No Part Number, Part Name, nor Part Label has been entered.0 X7 Q0 @# h3 Y
Please enter some data to enable packaging.! G" y$ S3 z. K3 K% q
5 S0 y" X3 J9 ]0 `

: i. E" e& Y# t, ^: k ERROR: Block page1, Page 1, Symbol $1I38:4 j: E7 c6 k# }' X
No part data.
: d, u/ u5 e( |# l- O6 K2 vNo Part Number, Part Name, nor Part Label has been entered.7 S$ F: S+ B0 N
Please enter some data to enable packaging.
3 C% K6 r9 H& h# c) ^3 b- R+ X
3 n4 r7 z! c  O' a
  G5 p$ H/ H% p ERROR: Block page1, Page 1, Symbol $1I39:
- j% f) X8 l( V3 N  S4 P4 `No part data.0 h4 f: x: ~' Y  x) _7 o, S/ `
No Part Number, Part Name, nor Part Label has been entered.
# c; s, P; Z2 C' fPlease enter some data to enable packaging.
' u6 Z7 s, m9 |1 A0 q1 R
6 `3 t- {  k6 F; i& J  C0 k4 G- dErrors encountered while reading the Common Data Base.
  ?/ I- l) Y4 t6 s0 l) w0 u) G6 q- G" E3 n, k# E
1 h2 C. ~! A/ ?- t
Testing of Packaging is being terminated with 5 errors and 0 warnings.
$ m3 P# n1 q% E+ A$ {$ K4 F: @Design has NOT been packaged.3 A# q# `  G! n2 Q: t) {4 b

6 o! Q1 A# g) w+ @  P2 _7 @: [There have been 5 errors.
& }% e$ T' ~3 ]# ~: m8 A& X
( G) G$ {% x% e" @' bCopied from Log File: Integration\PartPkg.log
; }% Y+ J, r  ^+ r8 {
/ n( b/ P1 S2 z. P3 d
; I" s. P% Q7 m6 `9 j5 f-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=) A: N9 e* T2 h# L' I

# H  v5 b$ O( Y# x: eFinished C:\MentorGraphics\7.9.4EE\SDD_HOME\wv\win32\bin\packagerui.exe
7 t$ R6 B! T: m& @- |6 O! q. FStarted C:\MentorGraphics\7.9.4EE\SDD_HOME\wv\win32\bin\packagerui.exe C:\Users\WANRUYI\Desktop\wg2\wg2\wg2.prj /d Board1 /nobrowse /config "C:\WDIR"6 W) n" \* j- N2 ~/ p

$ z6 w) |( q2 U6 D# R6 G* nPackager Version: 020806.00  x/ N8 I0 Y' K( V/ u& O9 F+ m

& }: J/ u! x) m& d1 iCommandline is: "C:\MentorGraphics\7.9.4EE\SDD_HOME\wg\win32\bin\package.exe -jC:\Users\WANRUYI\Desktop\wg2\wg2\wg2.prj -nBoard1 -i -a -NoFill -Add"
: T# l0 j% M6 L5 j
5 T1 m& ]: w2 A! }/ xThe Common Database is at "C:\Users\WANRUYI\Desktop\wg2\wg2\database".
# W6 `' z! p' L9 Q" w, F
+ K2 ?# ]0 M- M3 WThe Root of this design is "page1".
, T  A2 p- k1 z2 A7 l3 |/ l4 K3 Y- u
) O6 I# \+ f% C' a6 R1 v4 FThe Front End Snapshot of this design is "DxD".  A( D8 h' g1 ?9 v

1 R; r6 p, f9 X1 [) mThe Central Library is at "C:\Users\WANRUYI\Desktop\Center_Lib\Center_Lib.lmc".
1 i' j/ u3 W6 {1 i! L
  M6 S; l- k5 M/ oUnable to determine the Disable Repackage status.
7 a& s- C/ |8 o  s' A!Repackaging will be allowed!
4 L8 Y4 L' e/ w# m/ `* E1 r1 r' M" h
! f' H+ \/ w% Y$ E/ l) ]The PDBs listed in the project file will be searched to satisfy the parts- w! G4 g, q. a  u) B
requirements of the iCDB only for parts not already found in the
) D- S- f7 s. X2 wTarget PDB.2 p! W* m6 P: A8 B: ~, E+ O3 P) @
+ a2 M  i9 Y: a( `/ Q9 S+ W# C9 A( b) l9 o
The AllowAlphaRefDes status indicates that reference# e6 y* H0 t/ a: N* J% T6 X7 y
designators containing all alpha characters should be respected.4 Q. p' I+ J" Q6 C! w6 g

8 Y) T* a, ~% ?; o' n8 K! u' K2 y2 IAll existing reference designators and frozen properties will be ignored
) n/ |% f# \+ T+ h" Hduring packaging except for those on symbols within Reusable Blocks.
  q" |# g4 z7 ]. E" b3 c+ [: u6 l% kOnly the Room and Cluster symbol properties will be read for the purpose
0 z) j# M. p( M0 x2 [of user designated packaging. Use with the -y option if back annotation
+ T6 Y8 u  Q% Vto the Common DataBase is not desired.% w& r* Y" c5 Q
/ o& Z5 _, [" `# M# _
The cross mapping of symbol pin names to Part Number pin
% M- B, X# S' T. K7 T" l: n* f: Y+ Mnumbers will be checked for packaged symbols and mapped correctly& r7 i3 R1 P5 I# A1 t" w
for unpackaged symbols.$ i8 @7 Q* m1 |5 ~
5 L  I. `% E3 ?
Properties that have been checked off in the Property Definition Editor
  Q3 }8 ~: i  B0 f9 a- xfound at Library Manager/Common Properties will be checked for value
5 @* p; p5 @) K9 h% y. J8 C+ Ndifferences between the PartsDB and the non-null properties on symbols.
% k2 r) n7 R7 r/ N4 PThose properties checked off (other than Part Number). H; t  ^+ J3 z! A: [/ S
will not be transferred from the PartsDB to symbols.
4 U* S1 n: C2 a1 `; e5 h- A- EThe following properties were checked off in the Property Definition Editor:
- a  A% U9 ^" Z. r" j+ J% D2 a"Pkg Group"
6 l5 M; g( {, b8 i( s: C"EPFIXEDWIDTH"
, v4 K5 G* f$ S. V"EPFIXEDLENGTH"% ^( [. e$ m% B7 u( Q+ U
"Term"
9 A( {7 s, o7 v1 N; }( ~, l"SIM_MODEL"0 J6 `' @7 |9 a
"SIM_MODEL_FILE"7 I7 R( F2 D1 u$ s- X8 H
"Array Component"
& i: i4 m5 @( N, {: ]" c9 O"ICX_PART_MODEL"
  K0 k5 |7 m) c( g"Use Verilog"
' E/ f7 W7 Y; g$ w0 H% Z3 H"Order"
7 {' D8 S' h3 ?- D1 E"Parametric"
- d7 ~7 |: O, X/ Q7 d5 v"Value2"4 V% f* ^4 b6 |. L, t, N* \& Y
"Tech", I8 `+ ?5 F& {. a% B  o/ W1 M2 X
"IBIS"
# \- t) E4 n% U3 d- h  h$ c"VHDL Model") t$ Y% Y+ b5 U$ a  A; D. M+ ^
"Verilog Model"; a6 `( k) x' Q, K6 S) b) k  A
"Tolerance"# L4 G% P6 S8 n' y9 O/ E3 g
"Value"1 d8 J; C5 ]0 c* A% i
  Y! H+ V" o; B2 @  ]/ N
2 h5 F! A+ r3 m% u
Testing of Packaging is being terminated with 6 errors and 0 warnings.3 s" g; u! u7 B& ^+ }, ^
Design has NOT been packaged./ g8 J" G$ N3 `+ ]
' B" w$ [; Z) a* O( m9 V  m
Writing to Log File: Integration\PartPkg.log
% i7 w2 d" H- j5 d8 D& ]" F! n
4 ^9 ^6 b* h" x! O$ {8 J9 cThere have been 6 errors.
4 Z" c& r- X9 p$ T" {1 f. N" Y. {
# P- p/ t* u3 I! r///////////////////////////////////////////////////////////: Q2 C$ L( K  x0 E- N
///////////////////////////////////////////////////////////
$ h% u* ]5 j! I# q$ h# P///// The Log File will now be copied to this window. /////
" h3 P. ?6 p* Z& I  x  \4 J- C5 i& }///// Therefore the data above will also appear below /////7 o3 }6 `7 _4 r9 u+ M5 b
///// with more specific error and warning messages. /////' @. l. k8 i$ T4 i3 l9 I5 p
///////////////////////////////////////////////////////////
1 \: x0 X) Y' R, |+ Z, w///////////////////////////////////////////////////////////0 M$ R) I2 {6 y8 Z  M5 a0 G

7 h5 s% ~# U/ E; B1 f
( L" m! M8 J  s8 s: UPackager
. f% l& o0 P! p4 q8 ?) Q4 H--------
$ k9 C/ b2 f  l- L7 `, q
  u$ Y7 r8 c# j( L, e10:26 PM Friday, January 04, 2013
1 C( ^4 @* T  K8 y1 OJob Name: C:\Users\WANRUYI\Desktop\wg2\wg2\wg2.prj
% J7 W# ^0 q: \5 w4 S& ~
) R2 X2 y& G: `' `) f0 `% Q* u
# S+ y& J) a5 Z1 f0 Y1 q5 ]' aPackager Version: 020806.00
% B3 _: y, X; v9 ?" _5 q$ A# h* Q7 |
Commandline is: "C:\MentorGraphics\7.9.4EE\SDD_HOME\wg\win32\bin\package.exe -jC:\Users\WANRUYI\Desktop\wg2\wg2\wg2.prj -nBoard1 -i -a -NoFill -Add"; h% t  ?! V2 U9 n( y' z* C
$ p9 T7 N- d: z0 J/ B
The Common Database is at "C:\Users\WANRUYI\Desktop\wg2\wg2\database".1 a5 F( h' r( a6 o" q% e# R
7 L: D6 F, I4 V" w% u" F
The Root of this design is "page1".- A# h1 L' j+ A2 j4 p& [
% ]* v* d5 w0 A1 J" }
The Front End Snapshot of this design is "DxD".7 x' E& w5 u+ E" D0 L- @; s
+ f9 ~3 r* o! E- f% r
The Central Library is at "C:\Users\WANRUYI\Desktop\Center_Lib\Center_Lib.lmc".: m7 R; X+ L) Q* D2 C

7 x, Q* b" n( ?7 nUnable to determine the Disable Repackage status.
5 r. J  }) {5 B. j5 R!Repackaging will be allowed!
( j3 T% C9 a# I, _* u" F
* F: v( L. h% N! T% {The PDBs listed in the project file will be searched to satisfy the parts( J2 \# x$ U; A! `  V3 ?" e, `
requirements of the iCDB only for parts not already found in the
( R/ j: U$ L' yTarget PDB.% M" S. V! z- e/ E9 @% u
$ z, M/ Y2 V" U- @- Q0 E
The AllowAlphaRefDes status indicates that reference
. k" ]2 Y. W8 Qdesignators containing all alpha characters should be respected.4 B6 ^- H4 u. m: f
1 T( x0 I1 L* N1 t6 t, s! |& S
All existing reference designators and frozen properties will be ignored9 Y' h1 g6 J9 U) m. V
during packaging except for those on symbols within Reusable Blocks.2 Q, n7 O! v. ^3 H3 \0 ^7 o' a
Only the Room and Cluster symbol properties will be read for the purpose, h$ U; N3 C, z- K
of user designated packaging. Use with the -y option if back annotation
8 N8 ]2 L. B& G/ ato the Common DataBase is not desired.3 x$ E9 c" P* U4 v/ O+ f: e

9 D/ V4 ]9 ~! c4 N8 W6 y) s9 dThe cross mapping of symbol pin names to Part Number pin5 z9 {) l. T: F. T. D, t/ J. A1 g3 {
numbers will be checked for packaged symbols and mapped correctly& _3 R1 e0 \2 Z+ z2 c" S5 `
for unpackaged symbols.
7 k- ~. ]& o& j- X5 a7 `+ X+ r! p
Properties that have been checked off in the Property Definition Editor, C, k8 g0 n  w7 n  K) \
found at Library Manager/Common Properties will be checked for value
* I; c9 n; N$ j5 @1 A6 K% J; S3 J/ |differences between the PartsDB and the non-null properties on symbols.
1 J% j9 W2 u6 f0 A2 M- R) z/ D* ^Those properties checked off (other than Part Number)
$ S0 R1 I# E" Q" s% g+ ywill not be transferred from the PartsDB to symbols.
8 |: `0 {4 ]) s/ JThe following properties were checked off in the Property Definition Editor:$ ?& k" M- R: D. e6 g" P% Q% p/ E: Y
"Pkg Group"2 e; Z  l" S+ S5 a
"EPFIXEDWIDTH"
7 k. @- Y: Q. y6 _. M"EPFIXEDLENGTH"8 }0 `0 f; }0 n, j; u" f
"Term"- t6 h/ k5 P* W' p% _4 F/ ?% n
"SIM_MODEL"
4 g: T  ]! o4 Q( U"SIM_MODEL_FILE"
) ]' |' P5 Z" Y"Array Component"; F$ l5 \( z7 @  F# K9 d  ~
"ICX_PART_MODEL"9 B0 E- o, q' U/ |. l/ |; [
"Use Verilog"
! L+ ]) T5 L7 I8 f( u" U* P"Order"
3 E' R/ r% `. v' U"Parametric"
7 y/ }& X$ K2 l/ C! F" c"Value2"
! N. b  P0 j. }"Tech"0 F5 r" g$ x* I: s
"IBIS"6 s* c9 n, u. a! q. G
"VHDL Model"% n; ]9 p4 I2 }" R. H( v( Z
"Verilog Model"1 r1 {8 N% T. I
"Tolerance"  T- N3 O4 T# Z" a# `9 d7 m
"Value"0 Y9 h, V$ q6 b7 Z0 O, {" w

/ R7 S/ G& u1 ]Checking for errors in the ICDB...
0 u; J- C6 L! j+ t* R; F1 m3 _  M* S2 Q( J; \7 T" q; O" C8 l0 ]
No errors found. Proceeding with packaging...+ Y+ G9 ?3 W: y8 {- r9 A5 u

) ?* j7 v; x, a0 A- J/ b( p* w9 w6 j" E* Z* S2 ?- z
& o4 R) M3 ?3 \" i

, @( l, a; z0 Q5 G2 A1 ~2 d% L6 F+ W: [ ERROR: Block page1, Page 1, Symbol $1I34:# x$ U2 y. k9 V! }0 ]
No part data.2 m& ?7 V6 S; Z7 `3 U2 X  j
No Part Number, Part Name, nor Part Label has been entered.8 J. Z3 C7 e% e' K4 c
Please enter some data to enable packaging.
" V( F$ `1 i8 l1 S4 ?' q- Y. J; }6 F2 y
7 S9 v  k6 [0 ]/ p7 O1 `
ERROR: Block page1, Page 1, Symbol $1I36:# Y3 k0 a# ?6 x
No part data.
- Z# [, ~1 c: FNo Part Number, Part Name, nor Part Label has been entered.
+ I3 l7 f1 g4 j9 c+ t/ ^Please enter some data to enable packaging.5 J8 W+ ?1 @6 v0 _% _& q
: l8 o4 ?  X7 r9 C4 Z
* m9 s+ E: K% N6 n7 `/ T
ERROR: Block page1, Page 1, Symbol $1I37:$ ~$ L( S! p0 y( ?: ~; v& V5 n
No part data.
; I5 C1 V! Q8 q: `2 h7 z* R& ENo Part Number, Part Name, nor Part Label has been entered.& k' z/ }4 A4 ]1 j2 B; R
Please enter some data to enable packaging.
* f0 x9 H6 \3 Q- G: _3 b, R* z  ?/ g: V: _8 l( f: Y! M
5 A& j$ @. V" }. Q. M
ERROR: Block page1, Page 1, Symbol $1I38:
# Y# Z7 h$ H& i2 P' X: JNo part data.
0 U. A* O1 [8 w; x) G5 c# Q  U  x/ q' cNo Part Number, Part Name, nor Part Label has been entered.
$ x& k8 o+ y: O$ |, z) LPlease enter some data to enable packaging.5 V" Q& F; l, B* I1 H

' O3 V% y8 s9 {' D
; r( ~7 e: o. l( y/ j  \7 ?! g ERROR: Block page1, Page 1, Symbol $1I39:
9 \1 p1 l1 B! YNo part data.( P% Z' g4 _6 I# G2 \- `
No Part Number, Part Name, nor Part Label has been entered.
( g5 b1 V! _+ {) S/ o4 L+ |Please enter some data to enable packaging.5 A% Q6 X' _3 A5 I7 L, O( _" L+ P

  `) }( l# r+ o* J) ^
/ m8 h7 r, l# l; {5 L. e- H ERROR: Block page1, Page 1, Symbol $1I42:
; Q; ^0 A3 ~' }, N+ C$ ]/ |No part data.
: ^( Z$ |) Z9 \1 n6 u6 Q+ s/ GNo Part Number, Part Name, nor Part Label has been entered.
  s+ J. P% r! P! P0 `9 BPlease enter some data to enable packaging.9 T) X% t0 W: S3 X* Z" @

) E+ B! t, ~, g: `

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4587.jpg

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6#
发表于 2013-1-5 02:21 | 只看该作者
本帖最后由 li_suny 于 2013-1-5 02:22 编辑
+ Q2 B0 f8 t. i: G4 Y
  Q& H8 |8 V* j0 y, W1 r7 E+ {Mentor的工具比较讲究流程,习惯了就很好学习了。
/ w9 E4 V! Y: C9 i! V" J我推荐的那本书你可以参考一下“中心库的建立及管理”、“原理图输入”等相关基础章节。- n& i1 G$ R6 [& Z
https://www.eda365.com/thread-77797-1-1.html

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7#
发表于 2013-6-2 15:56 | 只看该作者
wanruyi 发表于 2013-1-4 22:13 , i' Y) {! M; i  u
EE   
1 P- n3 k8 B7 n  ^% i% o" x( f
: j* S9 K7 L0 pWG  我有本的WG的书籍 对着  书操作  结果这个EE7.9.4  和书上的差异太大。
, T4 u! b8 `) Z7 E1 S. I; [! _
楼主的问题解决没有,我也遇到同样的问题

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8#
发表于 2013-6-2 18:32 | 只看该作者
wanruyi的问题是向库中加入新器件的操作有误,我看到的5#的系统提示是:没有Part Number、Part Name、Part Label等项,我看还缺Reference Designator项。
  {! O- a+ N9 i) r  t0 Y5 Y1 z9 ~
可以参考6#的书,或者这里
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