错误如下 - Q8 ~9 h" x+ v1 D8 d9 OERRORack:679 - Unable to obey design constraints (LOC=CLB_R38C1.S0) which4 h% ?: z. O; a9 f A
require the combination of the following symbols into a single SLICE% z6 P6 R5 ^+ ^* Y m
component:" P. l2 i. C) r, ]
FLOP symbol "Chain[37].uChain/Node[0].uNode0/uFdce" (Output Signal =4 @2 p/ C8 r8 }4 y7 O6 _
Chain[37].uChain/wOutA0<0>) & V/ j# H' p0 W" }% g& } h5 ]7 Z FLOP symbol "Chain[37].uChain/Node[0].uNode1/uFdce" (Output Signal = 5 @0 m9 C& p9 c. r Chain[37].uChain/wOutA1<0>) : q( B$ R! F. Y$ q6 B The set/reset signal Reset_IBUF_1 of register * B( V/ M0 R. h/ V5 j Chain[37].uChain/Node[0].uNode1/uFdce doesn't match the existing usage of the : V' y4 S# Q2 G# ?. b6 _ SR MUX. The signal Reset_IBUF_2 already uses SR. Please correct the design 1 p& {' P& ^* ^' m1 V. f8 W constraints accordingly.6 G V9 l. T% q# o* Y/ `; L
请大侠帮忙
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发表于 2012-6-8 17:35
ack:679 - Unable to obey design constraints (LOC=CLB_R38C1.S0) which4 h% ?: z. O; a9 f A
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支持！
反对！