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pads9.0原理图同步PCB时出现问题，这是为什么？# Q4 u$ p* { S4 S
PCB Net List Errors Report - 051.sch - Sun Jan 01 11:42:41 2012
( A" z0 r" @$ q4 YDesign to Library Part Consistency Check6 b8 m( P7 }( F2 ^
No Library consistency checking errors.
$ l. M; h2 o5 i1 ]" \: TSingle/Zero Pin Net Warnings; Q8 d* c, u9 u5 I) Z
No single or zero pin nets.5 d4 @6 ]# q+ \2 i: J
Schematic Connectivity Errors
% V# H9 b) G% C( PPower or Ground Symbols used with wrong Net Name" L$ F3 P) R+ X: ^- W
GND7 s' X$ x& S, k: \' N+ c: ?
Sheet 1 X8300 Y9000 - Power Symbol used for net: +5V0 O r5 ~% d7 A
Sheet 1 X6500 Y9700 - Power Symbol used for net: +5V, B6 r% i) x; t; R8 S1 s% P
Sheet 1 X15200 Y12300 - Power Symbol used for net: +5V
- y1 S; _! H' q3 l. Z) H; ZSheet 1 X9500 Y8600 - Power Symbol used for net: +5V
7 J* z, q7 R0 x( g0 c7 DSheet 1 X7100 Y9000 - Power Symbol used for net: +5V
. }. H* M0 ], B1 G$ e. W L) W4 fSheet 1 X4600 Y9200 - Power Symbol used for net: +5V0 L- r# `$ P+ ^2 [% N
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发表于 2022-10-12 09:49
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