XCZU7EVFFVC1156的原理设计参考

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$ Y( Z- w+ I* DXilinx高性能FPGA处理音视频编解码，非常好用
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该芯片采用FPGA+SOC架构，支持Quad-core Arm® Cortex®-A53 MPCore™ up to 1.5GHz；L1 Cache 32KB I / D per core, L2 Cache 1MB, on-chip Memory 256KB；Dual-core Arm Cortex-R5F MPCore™ up to 600MHz；x16: DDR4 w/o ECC; x32/x64: DDR4, LPDDR4, DDR3, DDR3L, LPDDR3 w/ ECC；NAND, 2x Quad-SPI；PCIe® Gen2 x4, 2x USB3.0, SATA 3.1, DisplayPort, 4x Tri-mode Gigabit Ethernet；2xUSB 2.0, 2x SD/SDIO, 2x UART, 2x CAN 2.0B, 2x I2C, 2x SPI, 4x 32b GPIO；Full / Low / PL / Battery Power Domains；RSA, AES, and SHA；10-bit, 1MSPS – Temperature and Voltage Monitor