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# T% U+ g# U' O( X7 V 02:24 PM Tuesday, July 05, 2022( l: D8 c" P8 P; Y% @
Job Name: F:\Mentor\Mentor_Project\2022_6_28\PCM2\Project\Project\PCB\Board1.pcb8 `- ~: @ y! r
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Version: 01.01.00* K' ]5 |2 F6 ]9 F B
' ?6 N1 C' V- H# Z# { A new Target PDB will be created from the Central Library to satisfy the parts
. [' b; V) P; f9 r2 {$ O' I5 s requirements of the iCDB.
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# a& k: L+ P* V2 Z4 |: Q6 ^ The schematic source is a Common Data Base.
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0 N: ?5 B3 u {% R, r; n% ?7 I The AllowAlphaRefDes status indicates that reference
& U! H& t' m4 j, q; h+ d3 ^ designators containing all alpha characters should be deleted: ]; d9 {' z8 ?% F
and the relevant symbols repackaged.# r* i7 C. w: D8 m3 q
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Common Data Base has been read
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# k& S2 h$ W' k! v5 M Target PDB Name: Work\Layout_Temp\PartsDB.pdb
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% h- h" y; g* _7 q5 {* C* B- f7 G Number of Part Numbers: 11: x4 r- ~1 {; N7 O
Part Numb: AOC3860 -> Vend Part: AOC3860
) M0 D( p5 c# \+ \ Part Numb: C0201 -> Vend Part: C0201
: U4 O$ G5 Y$ Y; R( P9 s7 W Part Numb: ESDBVL5V0AE1 -> Vend Part: ESDBVL5V0AE1
. M5 A/ q1 J) B( B5 ~8 I6 n Part Numb: ID0201 -> Vend Part: ID0201 ; i" G) f1 g! Q4 h0 b2 f
Part Numb: MM3860AL5ZRE -> Vend Part: MM3860AL5ZRE
5 \! J4 [- g& B4 V* t# R. ? Part Numb: Ni6 -> Vend Part: Ni6 7 m' F0 R1 [1 P& y; z
Part Numb: NTCG103JF103F -> Vend Part: NTCG103JF103F : I- o* B0 P. V0 P
Part Numb: pad_P3 -> Vend Part: pad_P3 . ^2 o. A9 L: A3 a* R# E
Part Numb: RS0805 -> Vend Part: RS0805
2 \: K r' u/ y" I5 ~" r Part Numb: R0201 -> Vend Part: R0201 $ R" E! _! S3 k6 K3 c- f) u
Part Numb: TP -> Vend Part: TP : n: _6 B2 k+ `6 L; G
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Number of Part Names: 04 B& l0 q4 |! X1 Z% Z
0 W: i9 r. o1 j7 D U# G1 k) u Number of Part Labels: 0
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$ J3 V3 L I& U; A! ?1 { Checking for value differences between symbol properties and PartsDB properties
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/ Z9 P4 d" }' b& K Checking the validity of the packaging of prepackaged schematic
R/ E: }. z- f/ ]- H symbols. Only the first error in symbols having the same
; x& ~2 C% Y9 w Reference Designator will be reported.5 h1 F7 h! W7 i3 Q9 |2 Q3 U
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The packaging of all prepackaged schematic symbols is consistent/ {" d6 G; F: x: V
with the Parts DataBase data for the cross mapping of
+ ~, X' T& G1 K, @# o4 M symbol pin names to Part Number pin numbers.
- [8 d# r. r* L% p2 u Symbols that were not prepackaged will now be packaged correctly.8 \1 a4 D1 r; H# e. Z1 b
- z5 g( o" {1 v5 j I/ E No errors in Existing Schematic Packaging.9 H% t* q: H6 @$ J: _2 f1 M# v
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ERROR: Unable to copy padstack VIA0.55 from padstack database F:\Mentor\Mentor_Project\2022_6_28\PCM2\PCMLIB\PCMLIB\Layout\PadstackDB.psk
! |. u4 k/ K: r8 {% r/ w to padstack database F:\Mentor\Mentor_Project\2022_6_28\PCM2\Project\Project\PCB\Work\Layout_Temp\PadstackDB.psk because the padstack types do not match.
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P2 H7 f3 i' `7 Y' y ERROR: Unable to create local Cell Library.
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# O. X+ M: e2 e W3 } DataBase Load is being terminated with 2 errors and 0 warnings.
/ p: Y$ Q4 `0 o7 h4 [& e; Z Logic Data has NOT been Compiled.
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