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本帖最后由 flyingc381 于 2011-10-30 13:30 编辑 ! Y( l' A6 i9 {5 l: m/ A% B
: R3 L) l, @: R) b* p! I1 e没有问题，，是009，，我已安装，，只不过只解决了两个bug* h3 t5 r$ ^7 z9 q
DATE: 10-26-2011 HOTFIX VERSION: 009
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CCRID PRODUCT PRODUCTLEVEL2 TITLE1 x5 p# K; J& p. `- J. r
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945788 CONCEPT_HDL CORE Some component properties on the parts are incorrectly changed after Import Sheet
$ G1 \, F3 m6 V8 \945789 ADW LRM Some component instances are not updated by LRM even though cache ptf is updated from reference
$ X* l& C h: l% t) ^; r- jDATE: 10-21-2011 HOTFIX VERSION: 008
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9 X1 b1 r/ q7 ~2 K4 HCCRID PRODUCT PRODUCTLEVEL2 TITLE
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0 e, j/ p5 L7 W" P906827 ALLEGRO_EDITOR DATABASE Logic > Parts logic does not work correctly.
/ u; k# x# k0 l9 L923346 CONCEPT_HDL CORE Not able to move the reference designators inside hierarchal blocks after uprev to 16.5
" e2 G! t8 y% _926347 ADW COMPONENT_BROWSE Usability- Libflow Part check in comment should end up in Comments attribute for UCB/Designer to see it
, p8 f# W% Q- Z3 x, e+ t+ L" Y0 f% e7 n929348 F2B BOM Warning 007: Invalid output file path name4 T, D; U' V5 Y0 n& Y S( D$ B$ a# l
929777 CONCEPT_HDL OTHER Component Revision Manager gives internal error
. E5 @9 I _2 p: X930783 CONCEPT_HDL CORE Painting with groups with default colors. \5 {3 ^9 W; L7 n/ {2 Y
936748 ALLEGRO_EDITOR INTERACTIV "Unplace Component" menu inconsistent between General Edit and Placement Edit Mode.6 ]) K3 m5 L% G. }, K$ ^% b3 M0 u
938143 ALLEGRO_EDITOR CREATE_SYM Why is this Extra Property 'ECSET_MAPPING_ERROR7 b/ v: N3 c# U0 r* ^
938281 SIP_RF OTHER export_chips creating bad data when symbol is split and contains V- V+ pins# S* ?3 Q7 m7 @* E) v1 j8 y
938812 ALLEGRO_EDITOR SYMBOL Cannot create a BSM with this DRA, errors out but does not state a reason.
- r% ^' U8 X3 H5 m939075 CAPTURE TCL_INTERFACE Texts are getting garbled in command window. i4 L4 `& t0 C2 O& ~2 O T
939193 F2B PACKAGERXL ERROR(SPCODD-439): Connectivity server is unable to load the design.% `( `; o6 o+ {
939199 CONCEPT_HDL DOC "Retain electrical constraint on net" mismatch between schematic (YES) and design (NO)! F2 {6 e$ Y0 S& F& H: a3 p2 L' q
939346 ALLEGRO_EDITOR SHAPE Shape disappears when updating with variable shape_rki_autoclip set." U J3 t, \9 t! R: T
939901 CONCEPT_HDL INFRA NET_SPACING_TYPE shows ??on lower hierarchy level nets after Upreving to 16.5 version.+ ?4 h) |2 o( x! m5 d
939918 PSPICE PROBE Print > Preview for output file causes Pspice crash. ]- y" h. w3 {3 P; q6 f/ g
940217 CONCEPT_HDL COMP_BROWSER UCB reports 'No Symbol found for the part'. I3 F" O: p6 S' b2 A
940835 CONCEPT_HDL INFRA Desing package different after uprev to 16.5 where comp instance propeties are lost lost S0 B! B1 W6 G
941125 ALLEGRO_EDITOR DATABASE Performance advisor doesn't skip non plated slot padstacks
% O# r# t/ F. a. E8 h941876 SIG_INTEGRITY OTHER Illegal model name cause pxl fail in 16.3. _ a/ b7 k4 B+ l
942210 SCM OTHER Is the Project File argument is being correctly passed?9 ^7 V" u, I }" I
942274 CAPTURE PROJECT_MANAGER Crash on renaming a Design Cache part in Project Manage after doing replace cache7 N- @2 U7 r& ?& U
942839 ALLEGRO_EDITOR GRAPHICS Graphics Issue- Pads are not visible- W/ N3 ]9 V. M) x" Z" w1 [
943055 ALLEGRO_EDITOR SKILL axlDBCreatePropDictEntry causes application to crash
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发表于 2011-10-30 10:29
发表于 2011-10-30 13:29
