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偶也跟一贴！% _9 m7 A. t- x. p8 l
以下内容来自《high speed digital system design》。
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) ~5 r n, q; G3 XA via is a small hole drilled through a PCB that is used to make connections between various* S1 e, W, E3 \2 @" O1 i% W
layers of the PCB or to connect components to traces. It consists of the barrel, the pad, and5 u- C. e; n8 C' Y* ` O
the antipad. The barrel is a conductive material that fills the hole to allow an electrical" h" y0 T+ B; V& ^
connection between layers, the pad is used to connect the barrel to the component or trace,4 T% c2 s" t3 h* F" f4 G
and the antipad is a clearance hole between the pad and the metal on a layer to which no
: V. ?& }9 i9 s, M" p. ?: I( ?connection is required. The most common type of via is called a through-hole via because it
$ V1 g3 B2 ]" I3 ^5 {* D8 ?is made by drilling a hole through the board, filling it with solder, and making connections on5 c3 I- E- J- y; i; }
appropriate layers via the pad. Other, less common types of vias, used primarily in multichip& ~* g U$ S! v
modules (MCMs) and advanced PCBs, are blind, buried, and micro-vias. Figure 5.1 depicts
8 I- u* L# [! s. _5 m% q/ {a typical through-hole via and its equivalent circuit. Notice that the pads used to connect the
: e, T2 h& S9 V# @/ F8 ctraces on layers 1 and 2 make contact with the barrel and that there is no connection on% |+ @, h2 ?+ b% x) w
layer 3. Blind and buried vias have a slightly different construction. Since through-hole vias
2 c" ?# B3 V9 `6 ?% aare by far the most common used in industry, they are the focus of this discussion.- ]+ i) x j: c3 S6 m
0 l$ V8 }) M# X9 c& T+ I4 K$ P1 YNotice that the via model is simply a pi network. The capacitors represent the via pad
8 |: j" n, M: s% J" a+ }capacitance on layers 1 and 2. The series inductance represents the barrel. Since the via8 D8 [ g* M8 ?* Z
structures are so small, they can be modeled as lumped elements. This assumption, of
q) W; @+ q- q2 N, [5 Ecourse, will break down when the delay of the via is larger than one-tenth of the edge rate.2 k/ A+ c- l9 J7 ~ o* R
The main effect that via capacitance has on a signal is that it will slow down the signal edge
# k4 |+ ^+ u8 Frate, especially after several transitions. The amount that the signal edge rate will be slowed
2 y/ ~: K# \$ G9 A- w' Gcan be estimated by examining the degradation of a signal transmitted through a capacitive- d( S. I5 N R7 z# i; ~# {, s: |
load, as shown later in this chapter in equation (5.21). Furthermore, if several consecutive
; L: `' [8 a. b. U- q- K u. Svias are placed in close proximity to one another, it will lower the effective characteristic4 O1 D* [0 r; R* |( m+ ^. ^
impedance, as explained in Section 5.3.3. The approximate value of the pad capacitance is
# z8 V$ \0 Q0 R[Johnson and Graham, 1993]
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5 [3 ^! V2 I! h& b0 ?* h[ 本帖最后由 killerljj 于 2007-11-21 20:51 编辑 ] |
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发表于 2007-9-11 14:20
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支持！
反对！
发表于 2008-1-17 21:53
发表于 2007-9-15 15:34
俺也顶一下,因为焊盘描述的太形象啦!