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编写DSP程序时,由于代码较长,超过片内RAM空间,所以改为烧写flash
8 |* G/ U1 S, C- l) V1 w 开始烧写代码,运行程序,结果均正常;然后在此基础上添加一段代码(代码内容类似,没有错误),结果运行程序后,程序跳入非法中断 interrupt void ILLEGAL_ISR(void),不知为何。仅仅是添加一段代码,结果出现非法中断,百思不得其解,请高手指点一下。多谢多谢。% p J* Z% n, O- u. V/ F
程序中cmd文件如下:
( H: I" x0 X1 U: p8 rMEMORY. S' ]% h" V& [! ~0 m1 w4 J
{9 e/ o" C) ^; A o- b8 ]
PAGE 0: /* Program Memory */
2 b' A& b$ j3 | /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */. b( c' T( ~6 v0 u! P
+ l$ D/ w E0 h& p2 _( w. F1 ~
ZONE0 : origin = 0x004000, length = 0x001000 /* XINTF zone 0 */# d3 t1 X! U% P
RAML0 : origin = 0x008000, length = 0x005000 /* on-chip RAM block L0 */
- B: x. ~! Z# W3 `( ?4 i /*RAML1 : origin = 0x009000, length = 0x001000*/ /* on-chip RAM block L1 */
3 h# E/ ]; m2 e- J2 R: @. p /*RAML2 : origin = 0x00A000, length = 0x001000*/ /* on-chip RAM block L2 */! l8 [ @( f/ G0 m$ r
/*RAML3 : origin = 0x00B000, length = 0x001000*/ /* on-chip RAM block L3 */8 ^; B" d! r1 p" u3 @! ~; `# o6 w! {
ZONE6 : origin = 0x0100000, length = 0x100000 /* XINTF zone 6 */7 s3 s1 u5 y- _' t' a5 }
ZONE7A : origin = 0x0200000, length = 0x00FC00 /* XINTF zone 7 - program space */6 n9 t+ s+ s7 L( l3 c
FLASHH : origin = 0x300000, length = 0x008000 /* on-chip FLASH */' ]' |" ~" l: L/ h/ m$ ]# u& F' A
/*FLASHG : origin = 0x308000, length = 0x008000*/ /* on-chip FLASH */
- o* l" h% u9 |1 O, ]9 ]+ U /*FLASHF : origin = 0x310000, length = 0x008000*/ /* on-chip FLASH */
9 X! n3 V3 ?0 B$ s; S* | /*FLASHE : origin = 0x318000, length = 0x008000*/ /* on-chip FLASH */
% h' O* |" Q8 B7 V /*FLASHD : origin = 0x320000, length = 0x008000*/ /* on-chip FLASH */
; D* J! b) e- N" C /*FLASHC : origin = 0x328000, length = 0x008000*/ /* on-chip FLASH */
, ?. Y. Y# v6 U$ } FLASHA : origin = 0x308000, length = 0x012000 /* on-chip FLASH */1 ^6 K4 S- r/ _
CSM_RSVD : origin = 0x33fF80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */% n9 [' n' ?5 Y* {
BEGIN : origin = 0x33FFF6, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */
x0 R9 U4 n( b& p# y6 V5 F CSM_PWL : origin = 0x33FFF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */, W! P* C4 f. ?' E( ~
OTP : origin = 0x380400, length = 0x000400 /* on-chip OTP */
5 ]$ K3 ^% ]: |- m. D- N: o' n ADC_CAL : origin = 0x380080, length = 0x000009 /* ADC_cal function in Reserved memory */
6 z; s3 K+ J" K( {* ]. `% `: t; {5 o. i
IQTABLES : origin = 0x3FE000, length = 0x000b50 /* IQ Math Tables in Boot ROM */# h) e0 F+ T% F k
IQTABLES2 : origin = 0x3FEB50, length = 0x00008c /* IQ Math Tables in Boot ROM */
) n- m- V) {& R4 } FPUTABLES : origin = 0x3FEBDC, length = 0x0006A0 /* FPU Tables in Boot ROM */0 K8 C( {2 ?3 x" |' f P/ A
ROM : origin = 0x3FF27C, length = 0x000D44 /* Boot ROM */
3 j7 ^* u d# n% ? k RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */
( R" ~8 S4 {' V% S1 F0 ^ VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */
3 A, S; D6 ^7 [! w+ @ L0 O; z/ d* ^8 |& ^" |$ O
PAGE 1 : /* Data Memory */
$ ]8 d' M2 Z# i2 ?' t# ^. S /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */) V3 w& ]; Q- a% W, B# f3 [ Z
/* Registers remain on PAGE1 */
' a v( w- G4 N9 J5 j: h: i5 ]0 D4 Q
BOOT_RSVD : origin = 0x000000, length = 0x000050 /* Part of M0, BOOT rom will use this for stack */
' {) V+ n1 w6 G! P. `) E' {; j RAMM0 : origin = 0x000050, length = 0x0003B0 /* on-chip RAM block M0 */
* m$ g; i; d$ n7 p1 Z# `$ s9 h RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
- G: x: f( \0 O' o8 Q: L3 g$ g/ f /*RAML4 : origin = 0x00C000, length = 0x001000*/ /* on-chip RAM block L1 */) o$ g* n" |8 d' |8 E4 r
RAML5 : origin = 0x00D000, length = 0x001000 /* on-chip RAM block L1 */
# J1 j: C& m4 `$ s; O) X' S RAML6 : origin = 0x00E000, length = 0x001000 /* on-chip RAM block L1 */
$ P, c5 w( u, ^ RAML7 : origin = 0x00F000, length = 0x001000 /* on-chip RAM block L1 *// q R3 ?' A1 C ]6 N2 [! Z
ZONE7B : origin = 0x20FC00, length = 0x000400 /* XINTF zone 7 - data space */" `5 ~' ]( k8 K# N
ZONE7A : origin = 0x210000, length = 0x010000
/ T+ Q6 ?7 d3 I /*FLASHB : origin = 0x330000, length = 0x008000*/ /* on-chip FLASH */
) a, w/ u. ]% r/ z6 `; N}) B' x: ]9 b7 j" L ~8 H; [
4 }6 x+ ?6 `$ X9 F* w" x
/* Allocate sections to memory blocks.! ]5 q. L# r4 a1 g& h5 Q \6 l! t4 [1 K
Note:, G: X' P3 X0 Y9 {
codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code7 m, H' T$ b9 K' P, i5 {
execution when booting to flash
6 E0 {% B) w2 Z! a* i ramfuncs user defined section to store functions that will be copied from Flash into RAM1 q$ i; C: {) G0 Y2 a
*/5 h l/ j$ Y+ b5 T' n D
$ }3 g5 o! G, R! q* HSECTIONS6 k8 R# |( I, N$ P% d* r
{
( z- m5 `+ |( g- B( B
; z0 b( S6 E, o. M( F. j /* Allocate program areas: */
5 V2 h+ i( U* d+ p5 D; k .cinit : > FLASHA PAGE = 0
; ^# v0 k' Y* ]8 q .pinit : > FLASHA, PAGE = 0
- s% N/ h4 T! Z( C( X/ k. [3 @ .text : > FLASHA PAGE = 0
6 r( [" }, p! ^1 `* f; t codestart : > BEGIN PAGE = 0
0 U0 o& T* O; \# L& [2 O' ], ]% D ramfuncs : LOAD = FLASHA,
6 U6 a3 |' |9 ~! M9 b$ J RUN = RAML0,
# ~( F/ g- l2 m# ]+ ` LOAD_START(_RamfuncsLoadStart),
+ s# ]' A0 g8 }- B5 g: |0 F LOAD_END(_RamfuncsLoadEnd),# ^& [; f: |( x/ C8 u
RUN_START(_RamfuncsRunStart),( I) \$ [' t4 D! r; `1 C
PAGE = 0
. Q$ v' i1 D! V& i; p6 R2 K4 C: ^ V/ l
csmpasswds : > CSM_PWL PAGE = 01 o2 L R6 L2 H# C) i8 x/ N
csm_rsvd : > CSM_RSVD PAGE = 0 R/ b7 g9 p" b5 y1 V2 s' a
9 F8 A% f! r, r' }! |& x /* Allocate uninitalized data sections: */
. x: c% { G% z! z' E* U# M .stack : > RAMM1 PAGE = 1
3 T) p: K# y _' d& d% t .ebss : > RAML5 PAGE = 19 M" W6 \2 R. o4 D/ e/ M% _, e
.esysmem : > RAMM1 PAGE = 1
$ k) L% c5 V' y
- H# r1 |9 D6 }3 H- P /* Initalized sections go in Flash */" a. m1 C$ ^+ t9 J# K) G
/* For SDFlash to program these, they must be allocated to page 0 */
4 V; B/ L* c, a% B; x0 `# q .econst : > FLASHA PAGE = 07 m: K7 W9 X, p7 g& d" c
.switch : > FLASHA PAGE = 0 $ j5 e# Y( ?& \; b& j1 h( d
" g4 h0 m+ H' g/ X- V2 c5 |
/* Allocate IQ math areas: */3 B" r+ |1 T7 W
IQmath : > FLASHA PAGE = 0 /* Math Code */
1 r k4 `" i5 v; |! N G9 Q+ m IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD
/ p8 G! G6 }" ~ IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD3 }: i7 ~2 I' `+ q% y6 v
FPUmathTables : > FPUTABLES, PAGE = 0, TYPE = NOLOAD1 I- `( { ^! Z' I
* O& I: ]/ ~) L8 h /* Allocate DMA-accessible RAM sections: */7 k) x6 L" g* i1 N
DMARAML4 : > RAML5, PAGE = 1
* I: j. W1 ?& _$ M* D4 R0 U) c DMARAML5 : > RAML5, PAGE = 1, D8 I/ `$ i& \% U' l, T9 J, w
DMARAML6 : > RAML6, PAGE = 1
+ V7 K7 K; X. E- x' g9 m DMARAML7 : > RAML7, PAGE = 1
& w0 [0 _% s! t" _ `' ~# c( P9 ?# X- ?7 Z5 r: b6 U( B9 B( R
/* Allocate 0x400 of XINTF Zone 7 to storing data */* W% X; M4 l. t8 q D
data : > ZONE7A, PAGE = 1+ }3 k) ?$ V# |
ZONE7DATA : > ZONE7B, PAGE = 10 \: I5 K" x# K8 u
" n2 T& m5 b. t, K* P3 o
/* .reset is a standard section used by the compiler. It contains the */! \# G; i8 m. {7 T& J& J
/* the address of the start of _c_int00 for C Code. /*$ m$ h5 l+ z7 b
/* When using the boot ROM this section and the CPU vector */# O1 ~0 k5 \. s" _& U+ `7 o9 ?- L* B
/* table is not needed. Thus the default type is set here to */
) }5 f. y4 O9 v6 G /* DSECT */( l4 l. l) B4 F1 d7 X
.reset : > RESET, PAGE = 0, TYPE = DSECT
) ?6 \# y, L2 k5 [3 V% a$ L vectors : > VECTORS PAGE = 0, TYPE = DSECT
5 D* m7 I3 J8 Q `" K" N
) r) N' K6 ]- Z' Q( G' @" L1 o /* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
5 l+ m: ` Y+ r' y .adc_cal : load = ADC_CAL, PAGE = 0, TYPE = NOLOAD
& `* v* F; s$ P5 p+ ~; Z! O1 N7 e _. ~+ T
}' ^. `( E8 }9 J
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