True-Hspice Device模型参考手册

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Table of Contents
Audience ............................................................................................. iii
0 g& ~# A! f6 cRelated Documents ............................................................................. iii
6 m: X! y5 A; R7 q5 `( R" [Conventions ........................................................................................ iv
Obtaining Customer Support .............................................................. vi
Other Sources of Information ............................................................ vii
8 E& K7 W4 B& `& C/ Z  QRevision History ............................................................................... viii
Chapter 1 - Overview of Models ..................................................................... 1-1
Using Models to Define Netlist Elements .............................................. 1-2
Supported Models for Specific Simulators ....................................... 1-2
  I. o5 H7 Z4 `# `: h; _Selecting Models .............................................................................. 1-3
! F$ P, {- E7 [3 T9 m: KExample ............................................................................................ 1-3
4 N  B1 D4 @0 P+ B/ x. n: M) t  H, v1 U3 AChapter 2 - Using Passive Device Models....................................................... 2-1
' @9 L4 q. `6 V: h. |- a4 Z& y/ PResistor Device Model and Equations .................................................... 2-2
Wire RC Model ................................................................................. 2-2
Resistor Model Equations ................................................................. 2-5
$ g0 F6 O3 P  ^0 y' s! b, f7 cCapacitor Device Model and Equations ............................................... 2-10
Capacitance Model ......................................................................... 2-10
Capacitor Device Equations ........................................................... 2-11
Inductor Device Model and Equations ................................................. 2-14
Inductor Core Models ..................................................................... 2-15
8 g& M( s& t/ L. h% Q6 t) Z# l  lMagnetic Core Element Outputs .................................................... 2-18
Inductor Device Equations ............................................................. 2-19
Jiles-Atherton Ferromagnetic Core Model ..................................... 2-21
Power Sources ....................................................................................... 2-30
1 {1 Z9 p" L9 sIndependent Sources ....................................................................... 2-30
Controlled Sources .......................................................................... 2-33
Chapter 3 - Using Diodes ................................................................................. 3-1
) c$ G9 {5 A$ e. M4 g+ wDiode Types ............................................................................................ 3-2
) B& D2 M1 o4 B2 I8 O* uUsing Diode Model Statements .............................................................. 3-3
8 N4 j' ?) X! E) h) aSetting Control Options .................................................................... 3-3
Specifying Junction Diode Models ......................................................... 3-5
Using the Junction Model Statement ................................................ 3-6
Using Junction Model Parameters .................................................... 3-7
Geometric Scaling for Diode Models ............................................. 3-13
/ t$ i' h  f/ [  m# x) n: n0 YDefining Diode Models ................................................................... 3-15
Determining Temperature Effects on Junction Diodes ................... 3-18
/ p' d/ L0 j, u, i6 lUsing Junction Diode Equations ........................................................... 3-21
/ Q5 L* t# @$ q" Z0 sUsing Junction DC Equations ......................................................... 3-22
% V/ M# r7 i* J$ zUsing Diode Capacitance Equations ............................................... 3-25
Using Noise Equations .................................................................... 3-27
, [) t6 u' v4 E! J3 ?% aTemperature Compensation Equations ........................................... 3-28
$ a; p1 t7 @; Q' N) TUsing the Junction Cap Model .............................................................. 3-32
Setting Juncap Model Parameters ................................................... 3-33
" a7 T, [& E+ U# y' s* i9 d2 {' vTheory ............................................................................................. 3-33
JUNCAP Model Equations ............................................................. 3-38
Using the Fowler-Nordheim Diode ...................................................... 3-46
Converting National Semiconductor Models ........................................ 3-48
1 b: g, t0 i- ]6 n4 G$ ?Chapter 4 - Using BJT Models ........................................................................ 4-1
Using BJT Models .................................................................................. 4-2
) h' I2 U" ?8 r' ~* U/ v3 z0 x, qSelecting Models ............................................................................... 4-2
6 @% o/ z2 x( ?9 i, O4 |BJT Model Statement ............................................................................. 4-4
Using BJT Basic Model Parameters ................................................. 4-5
4 N( H0 z7 s6 j- VHandling BJT Model Temperature Effects ..................................... 4-15
# }* @6 i0 N+ n: d- Y; EBJT Device Equivalent Circuits ............................................................ 4-21
" {7 s4 P& ~2 ?' cScaling ............................................................................................. 4-21
Understanding the BJT Current Convention ................................... 4-21
Using BJT Equivalent Circuits ....................................................... 4-22
# ^2 q( [! }: VBJT Model Equations (NPN and PNP) ................................................. 4-30
6 g+ ?2 |6 s: E3 C" X6 Z% z8 n7 ^Understanding Transistor Geometry in Substrate Diodes .............. 4-30
Using DC Model Equations ............................................................ 4-32
Using Substrate Current Equations ................................................. 4-33
Using Base Charge Equations ......................................................... 4-34
8 l! J- }0 y1 n' [+ zUsing Variable Base Resistance Equations .................................... 4-35
Using BJT Capacitance Equations ........................................................ 4-36
Using Base-Emitter Capacitance Equations ................................... 4-36
Determining Base Collector Capacitance ....................................... 4-38
/ C1 M( L+ s4 U! j$ T( ^/ iUsing Substrate Capacitance ........................................................... 4-40
Defining BJT Noise Equations ............................................................. 4-42
2 V. ]2 G3 f3 w  t5 d0 o+ `  l4 `BJT Temperature Compensation Equations ......................................... 4-44
" x" v% P: g% T( Q! I5 V) Q9 eUsing Energy Gap Temperature Equations .................................... 4-44
9 K& |  \/ p. R- C$ k" eSaturation and Beta Temperature Equations, TLEV=0 or 2 ........... 4-44
Using Saturation and Temperature Equations, TLEV=1 ................ 4-46
1 r" `* Q" _, K( V& sUsing Saturation Temperature Equations, TLEV=3 ....................... 4-47
! d2 r- u; l% d2 G0 bUsing Capacitance Temperature Equations .................................... 4-49
- H# j( t5 @- O! S$ _# j  sParasitic Resistor Temperature Equations ...................................... 4-51
Using BJT Level=2 Temperature Equations .................................. 4-52
% u2 j2 R4 n5 \7 e/ aBJT Quasi-Saturation Model ................................................................ 4-53
" d6 a: m" |/ U" H! bUsing Epitaxial Current Source Iepi ............................................... 4-55
Epitaxial Charge Storage Elements Ci and Cx ............................... 4-55
6 S9 r- \6 h$ xConverting National Semiconductor Models ........................................ 4-58
5 R( q& E% D% D, tVBIC Bipolar Transistor Model ........................................................... 4-60
Understanding the History of VBIC ............................................... 4-60
VBIC Parameters ............................................................................ 4-61
7 v8 B7 D) U8 T2 B: Q5 _Noise Analysis ................................................................................ 4-62
' w' [7 [9 G! J- l7 ILevel 6 Philips Bipolar Model (MEXTRAM Level 503) ..................... 4-71
. r; E2 S* N* `+ E8 Y. wLevel 6 Element Syntax .................................................................. 4-71
8 D  `: q% Q* B4 v+ W( D0 X' YLevel 6 Model Parameters .............................................................. 4-72
Level 6 Philips Bipolar Model (MEXTRAM Level 504) ..................... 4-78
Notes ............................................................................................... 4-79
. n/ o' l4 T# j4 gLevel 6 Model Parameters (504) ..................................................... 4-80
6 O* n' i, |0 d  M  Z! ~7 dLevel 8 HiCUM Model ......................................................................... 4-94
* n9 _# u+ P8 j8 t. a; b) j% _What is the HiCUM Model? ........................................................... 4-94
HiCUM Model Advantages ............................................................ 4-94
4 \8 M& r, X7 }8 G7 GAvant! HiCUM Model vs. Public HiCUM Model .......................... 4-96
Model Implementation .................................................................... 4-96
Internal Transistors ......................................................................... 4-97
Level 9 VBIC99 Model ...................................................................... 4-110
Element Syntax of BJT Level 9 .................................................... 4-110
0 f* K! H2 U% c8 D/ EEffects of VBIC99 ........................................................................ 4-112
: q' s; C& X( c1 @: |/ AModel Implementation .................................................................. 4-112
Example ........................................................................................ 4-119
- S+ U+ r1 y% _  w8 OVBIC99 Notes for HSPICE Users ................................................ 4-123
Level 10 Phillips MODELLA Bipolar Model .................................... 4-124
5 }9 M9 p3 j. D* }" M5 u" y+ yModel Parameters ......................................................................... 4-124
; H3 |# i7 W% K) K5 i5 q: O4 XEquivalent Circuits ........................................................................ 4-129
DC Operating Point Output .......................................................... 4-131
Model Equations ........................................................................... 4-132
Temperature Dependence of the Parameters ................................ 4-142
Level 11 UCSD HBT Model .............................................................. 4-146
! A  p, b, M: i" nUsing the UCSD HBT Model ....................................................... 4-146
Description of Parameters ............................................................. 4-147
- Z0 p. ~) P& q/ hModel Equations ........................................................................... 4-152
0 z! ?. \) B) O4 s2 E; j- _7 G2 FEquivalent Circuit ......................................................................... 4-163
Example Avant! True-Hspice Model Statement ........................... 4-165
Chapter 5 - Using JFET and MESFET Models............................................. 5-1
4 t  B, W) r$ t7 [; r% M# ~. [Understanding JFETs .............................................................................. 5-2
Specifying a Model ................................................................................. 5-3
Understanding the Capacitor Model ....................................................... 5-5
Model Applications ........................................................................... 5-5
" Z+ ~' |- v3 t8 B* IControl Options ................................................................................. 5-6
JFET and MESFET Equivalent Circuits ................................................. 5-7
' n% n7 V0 u; D5 ?0 \1 ^, Y; d& M' f1 EScaling ............................................................................................... 5-7
Understanding JFET Current Convention ........................................ 5-7
6 v, ?7 \3 Z- t- R) v  ]JFET Equivalent Circuits .................................................................. 5-8
8 S! s* R  X. Z) v) Q8 D5 HJFET and MESFET Model Statements ................................................. 5-13
7 w, y" Q& H0 o9 I0 i- a$ oJFET and MESFET Model Parameters ........................................... 5-13
Gate Diode DC Parameters ............................................................. 5-15
8 M2 o" b' y7 m3 ZJFET and MESFET Capacitances ................................................... 5-25
Capacitance Comparison (CAPOP=1 and CAPOP=2) ................... 5-29
5 A3 v* m) a& \: p( Y! s3 AJFET and MESFET DC Equations ................................................. 5-31
JFET and MESFET Noise Models ....................................................... 5-35
: N: M' M' j5 X, O) {Noise Parameters ........................................................................... 5-35
Noise Equations .............................................................................. 5-35
Noise Summary Printout Definitions .............................................. 5-36
6 a6 P# X& o, s; C3 PJFET and MESFET Temperature Equations ........................................ 5-37
Temperature Compensation Equations ........................................... 5-40
7 o% X0 }1 {! j8 Z( f6 [。。。。。。。。。。。

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