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Table of Contents, B: u5 ]4 B2 P& C. \" D
Audience ............................................................................................. iii4 |0 n$ q8 e; h' U9 E. ~
Related Documents ............................................................................. iii
4 ?: q% N* l1 T0 JConventions ........................................................................................ iv
4 B/ R2 N- |5 ~( A0 K {! V4 {' X. YObtaining Customer Support .............................................................. vi
7 S4 c/ G( G% C' w: GOther Sources of Information ............................................................ vii" W; d6 G8 \& l+ {% o7 h' f
Revision History ............................................................................... viii, a' N% E/ r% }* q7 S! l
Chapter 1 - Overview of Models ..................................................................... 1-1
2 h( u9 O' W' B! Q) M/ wUsing Models to Define Netlist Elements .............................................. 1-2: p6 Q6 a# U$ S" P9 d; R& s
Supported Models for Specific Simulators ....................................... 1-2
2 s* J+ E3 C: {' o& w! _3 bSelecting Models .............................................................................. 1-3
5 _- F2 `1 w2 cExample ............................................................................................ 1-3
! E& h- F) w7 w7 ZChapter 2 - Using Passive Device Models....................................................... 2-1/ i% ?+ r4 W3 h7 x9 i. |" A
Resistor Device Model and Equations .................................................... 2-2& U& e& ?( m- S
Wire RC Model ................................................................................. 2-2
3 R0 w7 M4 S9 H9 h9 Q% IResistor Model Equations ................................................................. 2-5
, |6 B1 m9 `" u# jCapacitor Device Model and Equations ............................................... 2-10
{4 c+ t$ g$ o( f5 oCapacitance Model ......................................................................... 2-10
$ [4 v) I( l. T5 s7 {# X# v+ ]% QCapacitor Device Equations ........................................................... 2-118 q7 e7 Y* e3 K
Inductor Device Model and Equations ................................................. 2-14
1 L& X7 X+ h& y4 A" U- Y. dInductor Core Models ..................................................................... 2-15! \( K- N9 O' J) n w
Magnetic Core Element Outputs .................................................... 2-18
2 z* ^8 R" F7 V! j/ u2 T0 [! qInductor Device Equations ............................................................. 2-19
! Z5 w3 u: a8 O/ x/ gJiles-Atherton Ferromagnetic Core Model ..................................... 2-21
: W G8 M3 ^9 A5 F8 kPower Sources ....................................................................................... 2-30! H. q, J, Z9 t
Independent Sources ....................................................................... 2-30! u9 _' J! Q. Q: {6 m
Controlled Sources .......................................................................... 2-33
8 }+ O! i% M* \' K$ yChapter 3 - Using Diodes ................................................................................. 3-1
6 r: J5 s* D) W6 T( J1 FDiode Types ............................................................................................ 3-2% R4 E4 v) o$ x$ a. @( ]! [
Using Diode Model Statements .............................................................. 3-36 ` [: v0 o( b) Q
Setting Control Options .................................................................... 3-3+ w5 I& e$ w# ?
Specifying Junction Diode Models ......................................................... 3-5
' ?- e5 U7 r& b6 r; vUsing the Junction Model Statement ................................................ 3-6
5 n0 V; V& @. {$ D, k1 VUsing Junction Model Parameters .................................................... 3-7+ B4 s I& W9 d z4 o7 R$ s. E3 G0 O
Geometric Scaling for Diode Models ............................................. 3-13# L) q4 |8 K3 X2 K7 f
Defining Diode Models ................................................................... 3-15- |0 H) q* o: P4 Z0 T$ ?, l
Determining Temperature Effects on Junction Diodes ................... 3-18! p% k6 P3 U5 o4 z
Using Junction Diode Equations ........................................................... 3-217 H) w) }' F: F; T# E, y, O" ?
Using Junction DC Equations ......................................................... 3-22
0 D) q2 j6 v# Y# {' mUsing Diode Capacitance Equations ............................................... 3-25+ o. x. F9 J: g
Using Noise Equations .................................................................... 3-27
9 e& A v' [ O: z6 h hTemperature Compensation Equations ........................................... 3-28& @1 x, f; B. x8 G; G, H
Using the Junction Cap Model .............................................................. 3-32
- V9 v" M, Q7 }2 lSetting Juncap Model Parameters ................................................... 3-33
7 j9 q1 q/ } ?+ |% |' i S, u5 ETheory ............................................................................................. 3-339 J- }6 ]5 o: g+ D1 |, q
JUNCAP Model Equations ............................................................. 3-381 n- s. k1 o; ?
Using the Fowler-Nordheim Diode ...................................................... 3-46
+ }0 L+ h: A" x: F# v% i# OConverting National Semiconductor Models ........................................ 3-48
- q3 f7 E2 E' AChapter 4 - Using BJT Models ........................................................................ 4-1
# m4 d! ?5 W5 I3 Q) L9 d: [1 hUsing BJT Models .................................................................................. 4-28 v6 O8 t6 M# K" v. r/ z/ u* Z
Selecting Models ............................................................................... 4-2
, h: T9 g+ }: t# R2 p% ABJT Model Statement ............................................................................. 4-4" l5 M% y- z! M9 j# G( r, j
Using BJT Basic Model Parameters ................................................. 4-5
5 y9 W6 D7 y( }& H1 g, iHandling BJT Model Temperature Effects ..................................... 4-15
: F5 V! a$ Q3 D; ~; t! Y/ H- P. W: kBJT Device Equivalent Circuits ............................................................ 4-215 r3 k+ }' {' w
Scaling ............................................................................................. 4-21 r9 {# O* U/ y; V
Understanding the BJT Current Convention ................................... 4-214 W$ a$ V& c! P' o
Using BJT Equivalent Circuits ....................................................... 4-22" W9 Y9 G9 H- D v, m/ z
BJT Model Equations (NPN and PNP) ................................................. 4-30
7 t5 C: k; L4 K; w; C8 U: UUnderstanding Transistor Geometry in Substrate Diodes .............. 4-30
" a/ W5 M- s9 K# q P. q! K6 R1 yUsing DC Model Equations ............................................................ 4-32
" T$ p C4 L- @3 n* M2 ~8 YUsing Substrate Current Equations ................................................. 4-33
2 l1 z) s2 o- C l5 p5 t) \, kUsing Base Charge Equations ......................................................... 4-34. {& I4 k, }1 u2 @
Using Variable Base Resistance Equations .................................... 4-35$ @9 r3 ^! W' e* M6 H+ D) b
Using BJT Capacitance Equations ........................................................ 4-36
& U, O3 f# Q. R7 k) CUsing Base-Emitter Capacitance Equations ................................... 4-36) p; @9 F# L/ t; k0 y/ S- N+ j/ z
Determining Base Collector Capacitance ....................................... 4-382 ^1 U. L5 u2 p0 |
Using Substrate Capacitance ........................................................... 4-40
, J6 o7 o4 ?2 Y* U! x( v% d0 c" Q+ HDefining BJT Noise Equations ............................................................. 4-42; D) v1 L' q! B
BJT Temperature Compensation Equations ......................................... 4-44, w' s5 f7 A6 E4 m
Using Energy Gap Temperature Equations .................................... 4-449 l( `& g1 T7 R7 G
Saturation and Beta Temperature Equations, TLEV=0 or 2 ........... 4-44" _: n$ D7 v! r9 N
Using Saturation and Temperature Equations, TLEV=1 ................ 4-46 w0 ?6 g2 \1 B" v+ n6 p
Using Saturation Temperature Equations, TLEV=3 ....................... 4-47
5 l8 A+ ^; s+ J$ \Using Capacitance Temperature Equations .................................... 4-49/ \2 x* `8 P5 D* ` C: Y2 r
Parasitic Resistor Temperature Equations ...................................... 4-516 S+ N0 ]3 T, H& B! `
Using BJT Level=2 Temperature Equations .................................. 4-52
! M: \& s# N2 h- j: }3 r) iBJT Quasi-Saturation Model ................................................................ 4-53
% [$ N; b3 U" j6 x3 E c$ q4 XUsing Epitaxial Current Source Iepi ............................................... 4-55% g- x ~& B" m* I9 g+ ^
Epitaxial Charge Storage Elements Ci and Cx ............................... 4-55! I% {6 F: m- T. `! {
Converting National Semiconductor Models ........................................ 4-58
h9 _4 w* v3 p5 cVBIC Bipolar Transistor Model ........................................................... 4-60
8 K/ j2 B) g: z; [. \8 xUnderstanding the History of VBIC ............................................... 4-60. g) T" q9 m6 `2 n
VBIC Parameters ............................................................................ 4-61+ ^: d. e, ~# a
Noise Analysis ................................................................................ 4-62" G% @3 M" l" k4 j" S, j8 H
Level 6 Philips Bipolar Model (MEXTRAM Level 503) ..................... 4-71
+ \4 s" N* o; _Level 6 Element Syntax .................................................................. 4-71. z3 P% G( H9 Q
Level 6 Model Parameters .............................................................. 4-724 g) }3 K5 L2 N1 ?% C
Level 6 Philips Bipolar Model (MEXTRAM Level 504) ..................... 4-78
2 m( r0 R9 M& E" `Notes ............................................................................................... 4-79
+ S1 r; A4 H9 _' bLevel 6 Model Parameters (504) ..................................................... 4-80" Y6 [+ ]9 ?% r0 k
Level 8 HiCUM Model ......................................................................... 4-94$ y3 n) f8 v2 ?) h3 t6 ~
What is the HiCUM Model? ........................................................... 4-947 ^* ?2 O$ h+ W+ ]1 O. U- g7 A
HiCUM Model Advantages ............................................................ 4-94
. a+ ~* F& T$ d2 j" A2 j; }Avant! HiCUM Model vs. Public HiCUM Model .......................... 4-96
$ }2 n# W2 b* w6 G4 kModel Implementation .................................................................... 4-96
8 f& `7 T: B* {- w; f/ [3 dInternal Transistors ......................................................................... 4-97
" M" q( n7 ~ l9 XLevel 9 VBIC99 Model ...................................................................... 4-1107 H( E( D6 t( |) _! ~: `* r2 c
Element Syntax of BJT Level 9 .................................................... 4-1106 r7 }4 f0 H7 }* v" k' j
Effects of VBIC99 ........................................................................ 4-112& `: u# z6 g% E3 V
Model Implementation .................................................................. 4-112
! m" \7 ?2 u( k3 P7 p) eExample ........................................................................................ 4-119
% Q$ l0 H; K- G- h* l6 p" rVBIC99 Notes for HSPICE Users ................................................ 4-123
. c- P% L% `+ x* j x' m- k: x0 h) PLevel 10 Phillips MODELLA Bipolar Model .................................... 4-124
( m8 X) O+ k5 xModel Parameters ......................................................................... 4-124
' e* h9 |1 W4 Y- d5 x2 f! eEquivalent Circuits ........................................................................ 4-1292 L7 G5 Z3 G! j& X! O
DC Operating Point Output .......................................................... 4-131
, U0 K) z; \! J6 l2 {Model Equations ........................................................................... 4-132
# I4 ^8 A& w: t$ dTemperature Dependence of the Parameters ................................ 4-142, H: H4 D) P- B+ }# J1 r- ~0 J
Level 11 UCSD HBT Model .............................................................. 4-146: y: {! L8 a( u9 Q
Using the UCSD HBT Model ....................................................... 4-1462 p$ F& Z$ X7 [5 h, e4 A
Description of Parameters ............................................................. 4-1476 h1 I; m/ D- q* ^; D. c
Model Equations ........................................................................... 4-152
" I' I) n+ F1 R9 @+ yEquivalent Circuit ......................................................................... 4-163
9 _$ R/ Y6 q% {5 T. y, `) ZExample Avant! True-Hspice Model Statement ........................... 4-165; j& q) Z! n/ Y3 X$ K x8 T
Chapter 5 - Using JFET and MESFET Models............................................. 5-1
9 l: C3 F& `0 h* y' GUnderstanding JFETs .............................................................................. 5-2& D3 H9 y+ { \" C2 G
Specifying a Model ................................................................................. 5-3( l' M! g* O" f. }6 Y3 r
Understanding the Capacitor Model ....................................................... 5-5
. m! s6 u! C; L6 u8 z7 RModel Applications ........................................................................... 5-5! t: g" I% ?& b2 {' G l; Z, W
Control Options ................................................................................. 5-6: }. t M5 }! G1 M+ j# T
JFET and MESFET Equivalent Circuits ................................................. 5-7
4 ~3 F6 K3 X8 t; b/ n+ A( hScaling ............................................................................................... 5-7
4 h4 ?+ P3 v3 _1 N$ _8 L# h( jUnderstanding JFET Current Convention ........................................ 5-7
% |; Z1 C% ~# y3 b3 H: g$ T0 MJFET Equivalent Circuits .................................................................. 5-85 o6 K0 `8 x/ E. N/ L8 O( `
JFET and MESFET Model Statements ................................................. 5-13
$ x. C5 V5 t0 W6 ~: F7 |JFET and MESFET Model Parameters ........................................... 5-13" t6 H: C: h F
Gate Diode DC Parameters ............................................................. 5-15
1 E' D- f4 h( IJFET and MESFET Capacitances ................................................... 5-25
R+ _5 Y7 m3 X, D H, tCapacitance Comparison (CAPOP=1 and CAPOP=2) ................... 5-29
$ i: V* V! o# DJFET and MESFET DC Equations ................................................. 5-31
0 L4 {) n( @( p( V3 gJFET and MESFET Noise Models ....................................................... 5-35
; @- N+ ]! q1 ^- Y& _* a4 Z/ wNoise Parameters ........................................................................... 5-356 s5 M9 C( }1 V* d) y+ Y
Noise Equations .............................................................................. 5-358 F! M: a* }* X, S
Noise Summary Printout Definitions .............................................. 5-36
% B6 e9 W/ o+ uJFET and MESFET Temperature Equations ........................................ 5-37) y1 v: z6 l6 [) P! r! B* G
Temperature Compensation Equations ........................................... 5-40& ^! T, j4 c# T( G- Z$ D% R6 q
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1 B6 b% K: Y& ]# w' m! l/ [% i# `" D; N7 c# _( @/ n1 ]: v
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