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[Hspice仿真] True-Hspice Device模型参考手册

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发表于 2008-3-25 17:14 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式

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Table of Contents
4 y( [9 l* P) GAudience ............................................................................................. iii( r  v# G/ f. h6 j
Related Documents ............................................................................. iii# l+ R3 B# n7 S6 i7 E: F
Conventions ........................................................................................ iv
/ I9 _1 a- o/ o* X8 U- D" vObtaining Customer Support .............................................................. vi
2 u- X+ _' O9 c7 z5 X' d; O; J# hOther Sources of Information ............................................................ vii/ A, _) V+ P( ~: b9 d6 i
Revision History ............................................................................... viii+ H6 h  C' t; ?( L0 \8 L
Chapter 1 - Overview of Models ..................................................................... 1-1
) j6 {( @" Q9 I( i4 K! H3 QUsing Models to Define Netlist Elements .............................................. 1-2# n1 k" _  t3 x- |( `
Supported Models for Specific Simulators ....................................... 1-2/ G) ^0 `) J+ n, I
Selecting Models .............................................................................. 1-3
$ `& C7 J" T2 H: s9 O. l# i7 A) p) LExample ............................................................................................ 1-38 @# ?$ I' L: B; n# }
Chapter 2 - Using Passive Device Models....................................................... 2-1
* Z( M& L* i: [" A2 L2 L! p5 JResistor Device Model and Equations .................................................... 2-2/ r, f1 B  \0 O6 ~5 I* v6 L
Wire RC Model ................................................................................. 2-2
! J+ T. t- S& z; P' j- rResistor Model Equations ................................................................. 2-55 x; q* A+ T* N9 P+ o2 t1 M
Capacitor Device Model and Equations ............................................... 2-10) {$ Z+ x# ^% N  i+ O+ H
Capacitance Model ......................................................................... 2-10
9 W  i# R' t) E, d- q: ~: k( ACapacitor Device Equations ........................................................... 2-11- p" Y* Q1 n% n, p* Z% \1 z) O
Inductor Device Model and Equations ................................................. 2-14/ E: Y# f8 j9 |, k( e- l6 F
Inductor Core Models ..................................................................... 2-15
; ]9 \& B8 L+ A4 UMagnetic Core Element Outputs .................................................... 2-187 w$ Y0 r7 [+ D9 e! N
Inductor Device Equations ............................................................. 2-19
" f8 ~, p  ~9 H4 L8 f7 f( IJiles-Atherton Ferromagnetic Core Model ..................................... 2-218 T3 p1 U& }: Q+ Q
Power Sources ....................................................................................... 2-30
6 f7 e) P1 j% G( D$ ], OIndependent Sources ....................................................................... 2-30( T7 Q+ `& @9 k5 Y5 P
Controlled Sources .......................................................................... 2-33
2 t2 V3 q' ~0 g9 r2 y4 Y% gChapter 3 - Using Diodes ................................................................................. 3-1
: a/ ^. Q; f+ q1 }: Q1 ]; b( DDiode Types ............................................................................................ 3-2& E. I( w7 }# m
Using Diode Model Statements .............................................................. 3-3
5 c0 U5 }9 W$ T4 @/ iSetting Control Options .................................................................... 3-3
; Z4 w6 L. T. J3 {Specifying Junction Diode Models ......................................................... 3-5! i/ ?; \* j/ m" Y; B1 X+ Y
Using the Junction Model Statement ................................................ 3-6
% l! J- _- F8 A+ Z3 sUsing Junction Model Parameters .................................................... 3-7
' E2 P$ P! B5 j; v0 P5 m3 L7 m7 dGeometric Scaling for Diode Models ............................................. 3-13
* D2 ^6 w- E2 tDefining Diode Models ................................................................... 3-15' e  l; M+ k, r2 d
Determining Temperature Effects on Junction Diodes ................... 3-18
& }+ \3 }2 {  L/ ~( v5 t$ [Using Junction Diode Equations ........................................................... 3-21  f, q& u5 n0 U7 Z3 g* b; q) l) y2 s
Using Junction DC Equations ......................................................... 3-224 w; H) k4 Y- E4 J: K5 l+ N( k
Using Diode Capacitance Equations ............................................... 3-25% m8 h1 b; [: k: H
Using Noise Equations .................................................................... 3-27
4 l' a" n% D4 h" U3 BTemperature Compensation Equations ........................................... 3-280 j: `8 b/ x+ N+ t* [. y
Using the Junction Cap Model .............................................................. 3-32
4 H# i2 i: v+ d( C3 p( YSetting Juncap Model Parameters ................................................... 3-33
; c8 a& }: h3 [9 A9 fTheory ............................................................................................. 3-33
* s* _# U2 F7 T* @JUNCAP Model Equations ............................................................. 3-38
4 _: b% {! a1 a' w$ g! PUsing the Fowler-Nordheim Diode ...................................................... 3-46' A0 }5 V! ~! }+ G; n. q
Converting National Semiconductor Models ........................................ 3-48% Q, M& y/ t8 T& y! `$ ]
Chapter 4 - Using BJT Models ........................................................................ 4-1
. X6 x0 @+ m5 \' ]Using BJT Models .................................................................................. 4-2
4 x, o" g8 K- nSelecting Models ............................................................................... 4-2
' b( o% P/ h& a3 b/ J2 GBJT Model Statement ............................................................................. 4-48 F* c+ q0 Q* f3 Z# c! C& \- Q; W
Using BJT Basic Model Parameters ................................................. 4-53 b, k( m3 t8 t/ ^) v
Handling BJT Model Temperature Effects ..................................... 4-15
* x3 b3 ]9 s7 i3 ^$ z- ?6 g! V' EBJT Device Equivalent Circuits ............................................................ 4-21
8 z2 J6 ?  ~+ JScaling ............................................................................................. 4-21
' {8 Q, \! x* o- V4 D; J6 nUnderstanding the BJT Current Convention ................................... 4-21
: p, s& f4 A9 j* b7 EUsing BJT Equivalent Circuits ....................................................... 4-22
' b. r3 D5 s, `( M/ W# sBJT Model Equations (NPN and PNP) ................................................. 4-304 j7 |7 z, [0 B) h) N7 v! a/ a6 p& ]
Understanding Transistor Geometry in Substrate Diodes .............. 4-30- g7 z( L1 V) J1 H: I
Using DC Model Equations ............................................................ 4-32
" u9 H; q5 H# SUsing Substrate Current Equations ................................................. 4-33. h" Z6 ?9 Q# Q
Using Base Charge Equations ......................................................... 4-34$ K( Q) N0 X* a9 E6 h
Using Variable Base Resistance Equations .................................... 4-358 E" k' M& c& c% ^
Using BJT Capacitance Equations ........................................................ 4-364 s/ s1 U. \$ t' w, y% V
Using Base-Emitter Capacitance Equations ................................... 4-36
) Z, s: ]9 {1 N6 V2 Q  ^Determining Base Collector Capacitance ....................................... 4-384 q8 n  W" K9 z3 r2 ?' J$ T
Using Substrate Capacitance ........................................................... 4-404 `. S' p) ^) C  f* `5 p; n! s! g
Defining BJT Noise Equations ............................................................. 4-42
9 E5 b+ M6 N0 S7 M/ n; p" _BJT Temperature Compensation Equations ......................................... 4-44
* g2 q6 [1 n: i' ^2 [" K  XUsing Energy Gap Temperature Equations .................................... 4-442 n8 m  w# @# T3 p2 d' ?
Saturation and Beta Temperature Equations, TLEV=0 or 2 ........... 4-446 V+ ?3 p2 k( J: d" E( [$ J
Using Saturation and Temperature Equations, TLEV=1 ................ 4-46
- b  T# k* A! t1 o0 T! IUsing Saturation Temperature Equations, TLEV=3 ....................... 4-476 G' e6 e! `1 j
Using Capacitance Temperature Equations .................................... 4-49: D, ?, @; {2 u8 j2 t0 }1 P( P6 W
Parasitic Resistor Temperature Equations ...................................... 4-51
# ]3 V3 D$ t  {9 rUsing BJT Level=2 Temperature Equations .................................. 4-52- g$ n4 H! w! n; g! p' r
BJT Quasi-Saturation Model ................................................................ 4-53: d& Y) R' B& M% n: K5 o
Using Epitaxial Current Source Iepi ............................................... 4-55
% ]* I, a4 T" Q* hEpitaxial Charge Storage Elements Ci and Cx ............................... 4-554 K9 \5 E6 v+ F% d9 [
Converting National Semiconductor Models ........................................ 4-581 c2 R$ J$ M2 `2 g9 ~
VBIC Bipolar Transistor Model ........................................................... 4-60
/ T  T0 F: O+ Y6 v: `% g4 @Understanding the History of VBIC ............................................... 4-60
# F( V7 i; q, F8 \/ M' I. EVBIC Parameters ............................................................................ 4-61
+ ]" l3 i/ Q* ]7 hNoise Analysis ................................................................................ 4-62
! K. G+ I; ]" T+ ?5 X. ULevel 6 Philips Bipolar Model (MEXTRAM Level 503) ..................... 4-71
, T# e$ H* L* HLevel 6 Element Syntax .................................................................. 4-71
7 p; o& v- H; ?Level 6 Model Parameters .............................................................. 4-72: V& D5 s2 q; H0 M' m
Level 6 Philips Bipolar Model (MEXTRAM Level 504) ..................... 4-78& j+ u2 r* r3 f( z9 ?+ j4 A
Notes ............................................................................................... 4-791 c% Y) Z6 F* L
Level 6 Model Parameters (504) ..................................................... 4-80
1 K$ M* E, ^. o. L5 cLevel 8 HiCUM Model ......................................................................... 4-94$ Q  y/ [: ]( X
What is the HiCUM Model? ........................................................... 4-94
# l( R" @  t" ]) e2 B. vHiCUM Model Advantages ............................................................ 4-949 |4 X0 V) y8 i
Avant! HiCUM Model vs. Public HiCUM Model .......................... 4-96: u: E  u2 r/ a5 @# D0 Z
Model Implementation .................................................................... 4-96
4 ]  e4 H8 X/ ~! _6 KInternal Transistors ......................................................................... 4-97! z+ G7 z! j  J- H7 ~8 s7 T9 _7 l
Level 9 VBIC99 Model ...................................................................... 4-1104 ?+ i3 r) @4 F4 i3 H( s1 N2 l. P
Element Syntax of BJT Level 9 .................................................... 4-110
: r" [3 D' f/ B, J3 `0 N/ }Effects of VBIC99 ........................................................................ 4-112
+ z! S7 F8 Q: g. A, xModel Implementation .................................................................. 4-112
* @( j! u" C6 h. i5 BExample ........................................................................................ 4-1195 n7 {6 U% b" k; D9 v9 J3 y
VBIC99 Notes for HSPICE Users ................................................ 4-123
9 m% Z' |* O8 t- s0 O8 oLevel 10 Phillips MODELLA Bipolar Model .................................... 4-124
( d3 U( a) Q3 TModel Parameters ......................................................................... 4-124& ^, _% ~0 A7 A; D, E
Equivalent Circuits ........................................................................ 4-129
) M6 F8 ^0 K: }) C" sDC Operating Point Output .......................................................... 4-131
8 p& r' X5 |: z" AModel Equations ........................................................................... 4-132; {; n5 S- L- I/ C" ^
Temperature Dependence of the Parameters ................................ 4-142, a$ z- A# H3 l+ J
Level 11 UCSD HBT Model .............................................................. 4-146
- F, U5 \& k6 K8 ~Using the UCSD HBT Model ....................................................... 4-146- F5 _. f% V* A' y
Description of Parameters ............................................................. 4-147) R, X! z' z* Z/ @
Model Equations ........................................................................... 4-152- Y+ \' K+ N0 a
Equivalent Circuit ......................................................................... 4-1638 [, v' [. Z7 j! a
Example Avant! True-Hspice Model Statement ........................... 4-165: y7 l, O5 Z: v$ v
Chapter 5 - Using JFET and MESFET Models............................................. 5-1
6 A1 R6 h5 A/ V. iUnderstanding JFETs .............................................................................. 5-2, u. y; _. N; J- I, C
Specifying a Model ................................................................................. 5-3; `( D% I# Q1 Y# t8 c
Understanding the Capacitor Model ....................................................... 5-5
, B% c3 T8 b2 w, m( t1 X) lModel Applications ........................................................................... 5-5
$ n) x2 a2 M: [! N7 P+ o& C+ eControl Options ................................................................................. 5-6
, P) \3 @2 r1 A3 Z0 xJFET and MESFET Equivalent Circuits ................................................. 5-7
( _& G' w$ v% ]. N; N4 p6 E7 _9 n# XScaling ............................................................................................... 5-7: u# d/ G; U$ \8 X+ Q/ F# v! j
Understanding JFET Current Convention ........................................ 5-7$ R" s9 {! e/ \1 w0 N! e# v4 x' ?
JFET Equivalent Circuits .................................................................. 5-8! Q- L% `+ K/ k* L; s
JFET and MESFET Model Statements ................................................. 5-13: Y# Z0 M2 ~; t% t! F# ?
JFET and MESFET Model Parameters ........................................... 5-13
* ^0 N2 D! [+ |' I" O) PGate Diode DC Parameters ............................................................. 5-15, n+ D/ `' z; F" _
JFET and MESFET Capacitances ................................................... 5-25" G0 g2 N( i- c6 {. o
Capacitance Comparison (CAPOP=1 and CAPOP=2) ................... 5-29
$ h* M' k' }1 K4 J$ tJFET and MESFET DC Equations ................................................. 5-31
+ J- F! O: O1 d$ U5 n& OJFET and MESFET Noise Models ....................................................... 5-35' I$ W/ C2 h1 F4 F; v
Noise Parameters ........................................................................... 5-35
& o) d. j8 l" J: ]8 c# i4 Q: wNoise Equations .............................................................................. 5-35
/ _8 ^% T. ^# PNoise Summary Printout Definitions .............................................. 5-36
" _5 }; Q: K3 mJFET and MESFET Temperature Equations ........................................ 5-37& J4 }# p8 z2 C
Temperature Compensation Equations ........................................... 5-404 f; D, d0 q+ w& Y
。。。。。。。。。。。
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7 }1 c$ Q0 K+ g/ ~- E# O$ a  d/ k好 啊。感谢啊

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好 啊。感谢啊

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感激!

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谢谢,学习中

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谢谢~

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谢谢分享

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kan kan

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先下了,谢谢!努力学习
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