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[Hspice仿真] True-Hspice Device模型参考手册

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发表于 2008-3-25 17:14 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式

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Table of Contents5 K' B( L4 l: [, b
Audience ............................................................................................. iii
0 g& ~# A! f6 cRelated Documents ............................................................................. iii
6 m: X! y5 A; R7 q5 `( R" [Conventions ........................................................................................ iv; R/ B" a9 ?2 ?: i6 ?8 Q( F
Obtaining Customer Support .............................................................. vi: y' D) U! a; V% d
Other Sources of Information ............................................................ vii
8 E& K7 W4 B& `& C/ Z  QRevision History ............................................................................... viii6 [* G, K: a, g" S4 T. I
Chapter 1 - Overview of Models ..................................................................... 1-19 @" z3 }1 k; p  g; F& O+ \! p
Using Models to Define Netlist Elements .............................................. 1-2: N$ I) y7 ^* V  O4 k5 C- s1 s: y
Supported Models for Specific Simulators ....................................... 1-2
  I. o5 H7 Z4 `# `: h; _Selecting Models .............................................................................. 1-3
! F$ P, {- E7 [3 T9 m: KExample ............................................................................................ 1-3
4 N  B1 D4 @0 P+ B/ x. n: M) t  H, v1 U3 AChapter 2 - Using Passive Device Models....................................................... 2-1
' @9 L4 q. `6 V: h. |- a4 Z& y/ PResistor Device Model and Equations .................................................... 2-22 {3 S$ y" E1 a  j
Wire RC Model ................................................................................. 2-2+ n4 t+ i6 c" r6 R
Resistor Model Equations ................................................................. 2-5
$ g0 F6 O3 P  ^0 y' s! b, f7 cCapacitor Device Model and Equations ............................................... 2-107 D( x, {/ L0 W3 k$ r! W& ^) s5 `8 s
Capacitance Model ......................................................................... 2-10' ~0 h+ m9 g0 A; n* P' R7 m: `4 s
Capacitor Device Equations ........................................................... 2-11( ?- ?9 M6 ~& S
Inductor Device Model and Equations ................................................. 2-146 p8 {% j- b! t% ^4 X4 s
Inductor Core Models ..................................................................... 2-15
8 g& M( s& t/ L. h% Q6 t) Z# l  lMagnetic Core Element Outputs .................................................... 2-18: T: ^" p' m4 N! i4 X" o6 c3 O
Inductor Device Equations ............................................................. 2-19) Y( s1 W# d6 s* h
Jiles-Atherton Ferromagnetic Core Model ..................................... 2-21: U9 ^" l1 x7 e' f! i$ {
Power Sources ....................................................................................... 2-30
1 {1 Z9 p" L9 sIndependent Sources ....................................................................... 2-30- J/ a/ j6 y% G+ ]: g
Controlled Sources .......................................................................... 2-33: G2 u+ Y5 ?) q7 E8 t* U
Chapter 3 - Using Diodes ................................................................................. 3-1
) c$ G9 {5 A$ e. M4 g+ wDiode Types ............................................................................................ 3-2
) B& D2 M1 o4 B2 I8 O* uUsing Diode Model Statements .............................................................. 3-3
8 N4 j' ?) X! E) h) aSetting Control Options .................................................................... 3-39 M6 w, z1 G- y' A3 ^% v& g2 D
Specifying Junction Diode Models ......................................................... 3-5. q# {) K* {0 X) C7 r/ ?
Using the Junction Model Statement ................................................ 3-6# \8 T2 Q4 Q7 a% v+ S
Using Junction Model Parameters .................................................... 3-77 d! V" I3 n2 M) q5 {
Geometric Scaling for Diode Models ............................................. 3-13
/ t$ i' h  f/ [  m# x) n: n0 YDefining Diode Models ................................................................... 3-153 ]( a% M: _3 ?; m
Determining Temperature Effects on Junction Diodes ................... 3-18
/ p' d/ L0 j, u, i6 lUsing Junction Diode Equations ........................................................... 3-21
/ Q5 L* t# @$ q" Z0 sUsing Junction DC Equations ......................................................... 3-22
% V/ M# r7 i* J$ zUsing Diode Capacitance Equations ............................................... 3-25: T8 A0 F( _: H3 k9 j
Using Noise Equations .................................................................... 3-27
, [) t6 u' v4 E! J3 ?% aTemperature Compensation Equations ........................................... 3-28
$ a; p1 t7 @; Q' N) TUsing the Junction Cap Model .............................................................. 3-32. V1 B2 I) J+ Y/ P
Setting Juncap Model Parameters ................................................... 3-33
" a7 T, [& E+ U# y' s* i9 d2 {' vTheory ............................................................................................. 3-33  [9 H7 ^  p  W7 J4 L; v; x2 @
JUNCAP Model Equations ............................................................. 3-38) o- x% g. O9 `/ \6 o, d
Using the Fowler-Nordheim Diode ...................................................... 3-464 g" M; c# G' z; [. b
Converting National Semiconductor Models ........................................ 3-48
1 b: g, t0 i- ]6 n4 G$ ?Chapter 4 - Using BJT Models ........................................................................ 4-1" F4 S6 i6 |7 G
Using BJT Models .................................................................................. 4-2
) h' I2 U" ?8 r' ~* U/ v3 z0 x, qSelecting Models ............................................................................... 4-2
6 @% o/ z2 x( ?9 i, O4 |BJT Model Statement ............................................................................. 4-4+ F2 a* I. O' S% Z+ A/ a
Using BJT Basic Model Parameters ................................................. 4-5
4 N( H0 z7 s6 j- VHandling BJT Model Temperature Effects ..................................... 4-15
# }* @6 i0 N+ n: d- Y; EBJT Device Equivalent Circuits ............................................................ 4-21
" {7 s4 P& ~2 ?' cScaling ............................................................................................. 4-217 s+ G7 W; r$ O& H
Understanding the BJT Current Convention ................................... 4-21% u* y) h( f! {/ I: m
Using BJT Equivalent Circuits ....................................................... 4-22
# ^2 q( [! }: VBJT Model Equations (NPN and PNP) ................................................. 4-30
6 g+ ?2 |6 s: E3 C" X6 Z% z8 n7 ^Understanding Transistor Geometry in Substrate Diodes .............. 4-30; B7 U, D) V+ _5 I- Q  O
Using DC Model Equations ............................................................ 4-326 P0 h) |  L# n* m4 m" [
Using Substrate Current Equations ................................................. 4-33& G* p' Z- G+ g. D+ t: K
Using Base Charge Equations ......................................................... 4-34
8 l! J- }0 y1 n' [+ zUsing Variable Base Resistance Equations .................................... 4-35, T! K1 G4 o0 D0 d8 K* d9 y
Using BJT Capacitance Equations ........................................................ 4-367 H. m' E8 z4 z8 q  G1 Q# k6 g; J$ ^
Using Base-Emitter Capacitance Equations ................................... 4-36: ]- T: i2 d7 Q0 V( H0 V0 F
Determining Base Collector Capacitance ....................................... 4-38
/ C1 M( L+ s4 U! j$ T( ^/ iUsing Substrate Capacitance ........................................................... 4-40% E4 H/ F! [# L5 a" M* B/ z, N
Defining BJT Noise Equations ............................................................. 4-42
2 V. ]2 G3 f3 w  t5 d0 o+ `  l4 `BJT Temperature Compensation Equations ......................................... 4-44
" x" v% P: g% T( Q! I5 V) Q9 eUsing Energy Gap Temperature Equations .................................... 4-44
9 K& |  \/ p. R- C$ k" eSaturation and Beta Temperature Equations, TLEV=0 or 2 ........... 4-44# ~* q  B8 U9 H/ v& _
Using Saturation and Temperature Equations, TLEV=1 ................ 4-46
1 r" `* Q" _, K( V& sUsing Saturation Temperature Equations, TLEV=3 ....................... 4-47
! d2 r- u; l% d2 G0 bUsing Capacitance Temperature Equations .................................... 4-49
- H# j( t5 @- O! S$ _# j  sParasitic Resistor Temperature Equations ...................................... 4-51: |; j4 ~( T$ @( G" u; x
Using BJT Level=2 Temperature Equations .................................. 4-52
% u2 j2 R4 n5 \7 e/ aBJT Quasi-Saturation Model ................................................................ 4-53
" d6 a: m" |/ U" H! bUsing Epitaxial Current Source Iepi ............................................... 4-55% x9 [1 K0 w" {! @- v: I7 f
Epitaxial Charge Storage Elements Ci and Cx ............................... 4-55
6 S9 r- \6 h$ xConverting National Semiconductor Models ........................................ 4-58
5 R( q& E% D% D, tVBIC Bipolar Transistor Model ........................................................... 4-607 N$ y0 M/ `5 b: |" T
Understanding the History of VBIC ............................................... 4-607 T8 ^  E) F# @1 H  _6 q6 l
VBIC Parameters ............................................................................ 4-61
7 v8 B7 D) U8 T2 B: Q5 _Noise Analysis ................................................................................ 4-62
' w' [7 [9 G! J- l7 ILevel 6 Philips Bipolar Model (MEXTRAM Level 503) ..................... 4-71
. r; E2 S* N* `+ E8 Y. wLevel 6 Element Syntax .................................................................. 4-71
8 D  `: q% Q* B4 v+ W( D0 X' YLevel 6 Model Parameters .............................................................. 4-72+ u. Y+ m: ?2 f6 z: [2 r
Level 6 Philips Bipolar Model (MEXTRAM Level 504) ..................... 4-783 }9 F, a$ @$ k5 P' |- r) F& q
Notes ............................................................................................... 4-79
. n/ o' l4 T# j4 gLevel 6 Model Parameters (504) ..................................................... 4-80
6 O* n' i, |0 d  M  Z! ~7 dLevel 8 HiCUM Model ......................................................................... 4-94
* n9 _# u+ P8 j8 t. a; b) j% _What is the HiCUM Model? ........................................................... 4-943 p" H6 w( d4 a5 ?" o
HiCUM Model Advantages ............................................................ 4-94
4 \8 M& r, X7 }8 G7 GAvant! HiCUM Model vs. Public HiCUM Model .......................... 4-96) f, _, F$ V  ?( x# O
Model Implementation .................................................................... 4-965 _! a( \2 V# z7 {. Y7 H; w
Internal Transistors ......................................................................... 4-971 z' u- D$ F3 c4 G5 @
Level 9 VBIC99 Model ...................................................................... 4-1105 P. ^3 b2 a. f2 P& c% I0 t: P" g7 r
Element Syntax of BJT Level 9 .................................................... 4-110
0 f* K! H2 U% c8 D/ EEffects of VBIC99 ........................................................................ 4-112
: q' s; C& X( c1 @: |/ AModel Implementation .................................................................. 4-1125 {9 P3 |4 `7 B; h. R% e3 E
Example ........................................................................................ 4-119
- S+ U+ r1 y% _  w8 OVBIC99 Notes for HSPICE Users ................................................ 4-1233 x, i. M* P" Y8 T1 _% G# I: `
Level 10 Phillips MODELLA Bipolar Model .................................... 4-124
5 }9 M9 p3 j. D* }" M5 u" y+ yModel Parameters ......................................................................... 4-124
; H3 |# i7 W% K) K5 i5 q: O4 XEquivalent Circuits ........................................................................ 4-1298 S5 d8 r- Y+ D7 W. k6 _) Y+ U
DC Operating Point Output .......................................................... 4-131% x" `- g6 B: W4 B, M- c, \) @
Model Equations ........................................................................... 4-1323 @% n0 F, g& \! B2 D2 v( g
Temperature Dependence of the Parameters ................................ 4-1428 v! V# W! L7 t$ o
Level 11 UCSD HBT Model .............................................................. 4-146
! A  p, b, M: i" nUsing the UCSD HBT Model ....................................................... 4-146$ L/ t; A) |6 L' N+ [
Description of Parameters ............................................................. 4-147
- Z0 p. ~) P& q/ hModel Equations ........................................................................... 4-152
0 z! ?. \) B) O4 s2 E; j- _7 G2 FEquivalent Circuit ......................................................................... 4-1639 l/ Z! f/ }$ E  t
Example Avant! True-Hspice Model Statement ........................... 4-165  `; C9 x" I9 v0 b- t# T
Chapter 5 - Using JFET and MESFET Models............................................. 5-1
4 t  B, W) r$ t7 [; r% M# ~. [Understanding JFETs .............................................................................. 5-2/ ~$ [8 t0 w0 L0 @7 M
Specifying a Model ................................................................................. 5-3/ p! G3 w9 C+ j1 y6 O# F
Understanding the Capacitor Model ....................................................... 5-5/ _- m5 Q: @' k: _) T4 k
Model Applications ........................................................................... 5-5
" Z+ ~' |- v3 t8 B* IControl Options ................................................................................. 5-68 C) Y4 T8 G1 P: ~
JFET and MESFET Equivalent Circuits ................................................. 5-7
' n% n7 V0 u; D5 ?0 \1 ^, Y; d& M' f1 EScaling ............................................................................................... 5-7+ F1 H5 J7 h9 |: d% p: M
Understanding JFET Current Convention ........................................ 5-7
6 v, ?7 \3 Z- t- R) v  ]JFET Equivalent Circuits .................................................................. 5-8
8 S! s* R  X. Z) v) Q8 D5 HJFET and MESFET Model Statements ................................................. 5-13
7 w, y" Q& H0 o9 I0 i- a$ oJFET and MESFET Model Parameters ........................................... 5-13; Q1 b  m. X: F+ A
Gate Diode DC Parameters ............................................................. 5-15
8 M2 o" b' y7 m3 ZJFET and MESFET Capacitances ................................................... 5-25$ s/ a4 B$ Y- d# \
Capacitance Comparison (CAPOP=1 and CAPOP=2) ................... 5-29
5 A3 v* m) a& \: p( Y! s3 AJFET and MESFET DC Equations ................................................. 5-31- ~2 A% @' \; ~
JFET and MESFET Noise Models ....................................................... 5-35
: N: M' M' j5 X, O) {Noise Parameters ........................................................................... 5-356 O( l+ v% p" k9 f
Noise Equations .............................................................................. 5-35- ]  i6 I- X$ K+ ^6 e- W
Noise Summary Printout Definitions .............................................. 5-36
6 a6 P# X& o, s; C3 PJFET and MESFET Temperature Equations ........................................ 5-37: k- f$ L, ?8 G1 V1 {1 m& l
Temperature Compensation Equations ........................................... 5-40
7 o% X0 }1 {! j8 Z( f6 [。。。。。。。。。。。" \+ o4 K4 W/ \" [: ?# I5 R  r# u4 S
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