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1.1 Overview
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8 e2 E( a0 K+ a: @, l4 k Timemultiplex hardware dynamically on a single FPGA is advantageous:4 Y4 r! P$ O7 J! U) b3 |) w! q, m
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9 L) y/ G) J0 qfigure1.1 Basic Premise of Partial Reconfiguration
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Aftera full BIT file configures the FPGA, partial BIT files can be downloaded tomodify reconfigurable regions in the FPGA without compromising the integrity ofthe applications running on those parts of the device that are not beingreconfigured.
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