|
EDA365欢迎您登录!
您需要 登录 才可以下载或查看,没有帐号?注册
x
Xilinx® 7 series FPGAs comprise four FPGA families:
* g/ u. U& H9 ~- q/ `# w, Z3 w6 q3 f/ p1 x5 Q* e6 ]+ ]/ C K# D% c
, R i" ~" ]+ C
Spartan®-7 Family* a7 D+ V1 ?$ I9 n5 j5 M$ u4 c7 |
Artix®-7 Family
7 O. w$ H0 D, Y$ A. YKintex®-7 Family
$ B/ @ o4 V a, l* p2 w* cVirtex®-7 Family
3 O) w( Z* s, K! e2 _, Y. E6 ^( e" T. r
1 `4 {9 `6 ]6 z7 OSummary of 7 Series FPGA Features:
2 m0 S, e. P- L# {6 S- Advanced high-peRFormance FPGA logic based on real 6-input lookup table (LUT) technology configurable as distributed memory.
- 36 Kb dual-port block RAM with built-in FIFO logic for on-chip data buffering.
- High-performance SelectIO™ technology with support for DDR3 interfaces up to 1,866 Mb/s.
- High-speed serial connectivity with built-in multi-gigabit transceivers from 600 Mb/s to max. rates of 6.6 Gb/s up to 28.05 Gb/s, offering a special low-power mode, optimized for chip-to-chip interfaces.
- DSP slices with 25 x 18 multiplier, 48-bit accumulator, and pre-adder for high-performance filtering, including optimized symmetric coefficient filtering.
- Powerful clock management tiles (CMT), combining phase-locked loop (PLL) and mixed-mode clock manager (MMCM) blocks for high precision and low jitter.
- Designed for high performance and lowest power with 28 nm, HKMG, HPL process, 1.0V core voltage process technology and 0.9V core voltage option for even lower power.
, F# A( \* ]5 s; i . Y3 C7 o- x, E" }5 {& k- G
+ y7 e$ {7 A/ p7 }1 c3 Y# O
" _# c5 i9 {' M9 t: F9 B# l1 A: T- K! o( h0 ~. N4 j
+ t$ J) D; l! J- ]5 r8 t/ f7 V* d4 A
|
|