FPGA ------- FIR 滤波器之固定分数率重采样滤波器

mytomorrow

FIR滤波器，它以固定的分数比率P/Q实现数据流的重采样，其中P和Q均为整数，最高可达64，可用于Systolic Multiply-Accumulate（SMAC）架构。

In Figure 3-34, the operation of an interpolation filter with interpolation rate P=5 is contrasted conceptually with the operation of a fixed fractional rate filter with rate P/Q=5/3.
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kinidrily

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