求大神给程序注释一下...急用...，非常感谢！

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library IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL ; 4 D5 h. A! O" L' \# {" cENTITY keys_lock IS         PORT (           clk ,clr,status  : IN   STD_LOGIC ;                                 selout    : OUT  STD_LOGIC_VECTOR (2 downto 0) ;         key       : IN   STD_LOGIC_VECTOR (3 downto 0) ;         segout    : OUT STD_LOGIC_VECTOR (0  TO 6); 2 d& ?. s1 h0 b9 [    locks,unlocks: OUT STD_LOGIC : t+ @( }' d4 a% }( `2 N. m          ); + T, b4 ^; f0 D& T* l" H$ x8 KEND keys_lock ; ( _- Z% s7 C" }. [ ARCHITECTURE doit of keys_lock IS 4 R: h7 m# @5 {6 Osignal counter1 : std_logic_vector(1 downto 0); 7 V: b& \* r; ~' z4 T! y- U, s/ r# Tsignal counter : std_logic_vector(2 downto 0); 4 [/ O* q7 ?% Z" q. t1 k  b! x0 G6 xsignal counter2 : std_logic_vector(4 downto 0); 8 H6 ]6 h8 [1 @2 T" Bsignal dc0,dc1,dc2,dc3,lock0,lock1,lock2,lock3 : std_logic_vector(3 downto 0); + Z% l/ j/ J) s. Xsignal dcc1 : std_logic_vector(4 downto 0); signal dcc : std_logic_vector(6 downto 0); signal d0,d1,d2,d3 : std_logic_vector(0 to 6); signal clk1,test,koff: std_logic; component decode   PORT(     ssin : in  std_logic_vector(3 downto 0); + E0 D/ K0 X' b) m( ]7 b    ssout: out std_logic_vector(0 to 6)     ); end component; ( C5 Y& \) |- J/ `$ ebegin test<=key(3) and key(2) and key(1) and key(0); % l, [  Z. W, X& K1 L ) p5 ^# {+ F' X3 U* e' O7 E3 OP1: process(clr,clk) begin    if(clr='0') then 0 |4 _5 \) q+ ^2 Q; m     counter1<="00";    elsif(clk'event and clk='1') then      counter1<=counter1+1; ( W/ U* z1 k1 C   end if; * L1 t  R: m4 ]6 |" K+ X# yend process P1; clk1<='0' when counter1<="01" else       '1'; & x3 U! a; t. B6 \( [$ s 2 L0 J! a6 g& C4 b+ W( j& L0 u) XP2: process(clr,clk1,test) begin # ^: v( j: g  n) u) o# K6 L! h   if(clr='0') then 5 H- r1 e- |) s/ P/ B     counter<="000";    elsif(clk1'event and clk1='1') then      if(test='0') or (koff='0') then        counter<=counter; ) g3 ]! n8 I) [     else        counter<=counter+1;      end if;    end if; end process P2; selout<=counter; dcc<=counter & key; P3: process(clk,test) begin    if(clk'event and clk='0') then      if(dcc="0001110") then . q7 Y) p+ w8 p0 t        dcc1<="00000"; ! m6 x4 `* N. [: f     elsif(dcc="0011110") then 5 I, V( Q/ e! g  M        dcc1<="00001"; & i  U9 }) ?8 Z% y! d# y; T     elsif(dcc="0101110") then         dcc1<="00010";      elsif(dcc="0111110") then 6 f; K: C9 p4 F( t        dcc1<="00011";      elsif(dcc="1101110") then         dcc1<="00100";      elsif(dcc="1111110") then % _: A; A" p* N. c; _        dcc1<="00101"; ! Q. e! L# d2 i) A     elsif(dcc="0001101") then ! V0 M8 ^' Q2 W" W$ H        dcc1<="00110"; * ?/ ^8 x# e+ \( \3 _% Z     elsif(dcc="0011101") then # p: D  Q% d- D; ?3 S        dcc1<="00111"; 3 L9 @- O, C$ `! S     elsif(dcc="1001101") then # |* x) a8 w& g9 N        dcc1<="01000"; + J- ^4 [0 c; G     elsif(dcc="1011101") then         dcc1<="01001"; ) y0 |( {  c1 k9 e( g# d; w* e     elsif(dcc="1101101") then         dcc1<="01010"; 3 w8 G9 M: A1 f: O     elsif(dcc="1111101") then         dcc1<="01011"; # V- Y7 \0 ]3 K) t% Z+ W- T     elsif(dcc="0101011") then         dcc1<="01100";      elsif(dcc="0111011") then         dcc1<="01101"; 5 Z7 v5 U9 a: @( \' I     elsif(dcc="1001011") then         dcc1<="01110"; * y, j, z" J. C6 o9 N5 ?( B- S- h     elsif(dcc="1011011") then         dcc1<="01111"; ; _2 K1 L8 x& ^+ s     elsif(dcc="1001110") then 2 y* Q' Y5 K' f4 F" N* B        dcc1<="10000"; , v  ]- ?$ Z1 F1 K/ g. q* {     elsif(dcc="1011110") then         dcc1<="10001"; 7 S+ e1 c8 T# [8 U     elsif(test='0') then         dcc1<="01111"; # l% [) j) H0 z4 V9 O% a& f0 i     end if; 4 E8 q( I9 M5 [& }9 j1 L. F7 |; Y   end if; end process P3; 9 P% h/ ]# O2 j& S4 w--dcc1<="0000" when (dcc="0001110") else " L/ i, k" ~* ]4 d--      "0001" when (dcc="0011110") else --      "0010" when (dcc="0101110") else --      "0011" when (dcc="0111110") else --      "0100" when (dcc="1101110") else --      "0101" when (dcc="1111110") else --      "0110" when (dcc="0001101") else ; m8 t4 W! x9 m- T$ C# Q--      "0111" when (dcc="0011101") else 9 y$ n; {3 f% e+ H--      "1000" when (dcc="1001101") else --      "1001" when (dcc="1011101") else --     "1010" when (dcc="1101101") else & I, {2 M8 ^* m( |$ o- m; X--      "1011" when (dcc="1111101") else 0 l  R, ~7 I- g7 n1 c. \--      "1100" when (dcc="0101011") else --      "1101" when (dcc="0111011") else $ G9 ^/ ^0 e9 l: d: e--      "1110" when (dcc="1001011") else ) X$ p- t  E6 l$ a) T% j! a--      "1111" when (dcc="1011011") else --      "0000"; , u3 c& ^( @2 m7 S( fP4: process(test,clk,clr) ( M1 s% A9 X5 \2 zbegin    if(clr='0') then      counter2<="00000";      koff<='1';    elsif(clk'event and clk='1') then      if(test='0') then * ?6 m& l, U* G: j9 m, a        counter2<="00000"; 5 A9 D9 G! `) }" w6 V- z2 D        koff<='0'; 9 J  h; ^9 r& u% ~5 p     elsif(counter2<"11110") then - U3 n$ j% P# F5 \+ x0 ]  ]/ W/ U# x        counter2<=counter2+1;     -- end if; / D( ~! a( Q; e/ A0 N: L  f; t     elsif(counter2="11110") then        koff<='1';      end if;     end if; % t! p8 b4 |/ |9 Iend process P4; 7 X# A8 b4 J- k9 @--koff<='0' when counter2<="01110"  else --      '1'; 2 V: V* b5 d( G / n( |% Z* t/ N7 O# l7 B) H/ QP5: process(koff,clr) begin 1 {8 `* n* o# x6 D2 U1 O8 @   if(clr='0') then 1 W3 B* Y) N) x+ _      dc0<="0000"; 0 B9 _- q2 i( r1 g  k2 r- D      dc1<="0000"; . F& @0 q7 D8 O/ @* l8 R7 j      dc2<="0000"; " D( S9 \# h& \, y  Q) |  C      dc3<="0000"; ! Y6 m: j& T  t+ c* K- f$ P$ p( \      locks<='0'; 3 M" n, L* A' v" J" K) t% m/ |% v4 t      unlocks<='0';    elsif(koff'event and koff='1') then 8 t- ~4 n+ }# o5 K0 U6 W    if(dcc1="10000" and status='0') then       lock0<=dc0;       lock1<=dc1;       lock2<=dc2;       lock3<=dc3;       locks<='1';       unlocks<='0';     elsif(dcc1="10001" and status='1') then       if(dc0=lock0 and dc1=lock1 and dc2=lock2 and dc3=lock3) then ) `( K) ?5 ]6 \' j. R0 Y8 t        locks<='0'; : m2 m9 y! j7 E9 \1 W. p2 r        unlocks<='1'; 5 L6 T8 K2 C/ D( i! S+ Q- v3 R% h      end if;     else       dc0<=dcc1(3 downto 0);       dc1<=dc0; % N# p- P; e* g, A      dc2<=dc1;       dc3<=dc2;    end if;   end if; ! T# E5 z) i" ?$ B; o+ Zend process P5; % \4 q& g+ d4 O/ y U1: decode port map(ssin=>dc0, ssout=>d0);   U1 H/ v( `7 Y2 P0 OU2: decode port map(ssin=>dc1, ssout=>d1); U3: decode port map(ssin=>dc2, ssout=>d2); 3 V4 F) [$ N. d" `) k+ C" ?' H. X! MU4: decode port map(ssin=>dc3, ssout=>d3); & k8 z  P& ]! ^' B- H- o7 x ( x3 \$ ?- g/ ssegout<=d0 when counter="000" else         d1 when counter="001" else 5 a2 V5 G" K) `4 b' K! W        d2 when counter="010" else         d3 when counter="011" else 7 [9 l9 C1 h6 h# j. ]        "0000000"; 6 ]+ p5 g% \9 K! E6 |- F. n end doit; 6 `0 j7 M, b- M' b. K . x  E/ Y9 x9 f' K& V/ pLIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ' A* \* K7 s- t0 ^% m  X- OUSE IEEE.STD_LOGIC_UNSIGNED.ALL ; ENTITY decode IS ( A: w& g# P- \5 EPORT(   ssin : in  std_logic_vector(3 downto 0); 1 Z% q& _* j; w  ssout: out std_logic_vector(0 to 6) # P& N6 ]  ^) ^    ); end decode; 5 ~7 f" A" ]* LARCHITECTURE a of decode IS begin 7 R' l6 R+ t$ J  ssout<="1111110" when ssin="0000" else              "0110000" when ssin="0001" else                     "1101101" when ssin="0010" else * d" O2 Q" }4 h/ ]& s             "1111001" when ssin="0011" else              "0110011" when ssin="0100" else              "1011011" when ssin="0101" else & z/ K8 {( t. L$ K             "1011111" when ssin="0110" else              "1110000" when ssin="0111" else              "1111111" when ssin="1000" else              "1111011" when ssin="1001" else              "1110111" when ssin="1010" else ( D- z' H2 x2 V% O$ Q             "0011111" when ssin="1011" else              "1001110" when ssin="1100" else ; V0 F6 b0 u4 T2 h             "0111101" when ssin="1101" else              "1001111" when ssin="1110" else              "1000111" when ssin="1111" else ( O  L2 T3 d; T) O+ x                 "0000000"; end a;

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