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本帖最后由 jacklee_47pn 于 2016-12-21 18:11 编辑 0 B5 K3 y" q3 A1 `# t
/ R Z$ W. P8 O6 W來一個強悍的 PSoC® 4100 M-Series
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32-bit MCU subsystem# m# Y; n8 h f* d5 Y+ Y; |2 `
24-MHz ARM® Cortex®-M0 CPU with a DMA controller and RTC ) n% d( r$ d" ?6 M+ I! |
Up to 128KB Flash and 16KB SRAM
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) t# a6 `8 k. z8 [. z' M, z3 t, qCapSense® with SmartSense™ Auto-tuning! V0 V# l) S' y; E: Y/ F) X
Cypress Capacitive Sigma-Delta™ (CSD) controller- d* E; H; ^, N+ j( U8 X
CapSense supported on up to 55 pins
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$ R) Z3 E% B6 Y8 G) C4 VProgrammable Analog Blocks
5 a' z: V4 }0 w0 N% A Two comparators (CMP)6 O* m. o' s# K
Four opamps, programmed as PGAs, CMPs, filters, etc.& V% z! E5 }1 E: P
One 12-bit, 1-Msps SAR1 ADC8 X! G ~7 b; t R, K1 ?( a
Four IDACs2 (2x 8-bit, 2x 7-bit)
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: u& `- D) P% ^- QProgrammable Digital Blocks
q! M& e1 A' {! N# z) _ Eight programmable 16-bit TCPWM3 blocks
8 t! u5 N8 C9 Q6 u& q& D Four SCBs4 : I2C master or slave, SPI master or slave, or UART
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Packages: 48-pin LQFP, 64-pin TQFP (0.8-mm pitch),64-pin TQFP (0.5-mm pitch), 68-pin QFN
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