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4 c a/ S1 I& |8 U( B) i DATE: 05-01-2015 HOTFIX VERSION: 002
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$ F$ k- y& T: |5 H8 O% u E1 q CCRID PRODUCT PRODUCTLEVEL2 TITLE
+ {. p A+ Q! ?3 B1 z9 h7 ]/ _ ===================================================================================================================================. a+ T' N3 g, B+ n4 N% R1 H
1315048 allegro_EDITOR INTERFACES IPC2581 translation inconsistency on negative layer+ a* V0 J7 D; ?4 m5 o% y- R4 K
1362745 CONSTRAINT_MGR OTHER Allegro PCB Editor crashes on opening Constraint Manager with any design+ p1 A* L7 F/ u: A/ m& s6 j
1373412 ALLEGRO_EDITOR GRAPHICS SigXP Print Canvas : Via model seems to be filled by black Via box.
- d/ j" n, {/ ?# ~$ [) K 1376765 CONSTRAINT_MGR ANALYSIS SETUP/Hold spreadsheet lists only one pin pair( a0 Y* j' J% f) c6 D
1399646 ASI_SI OTHER Should be able to run mbs2brd with SI/PI base licenses9 b& O. K) r, {( M4 v
1400215 SIG_INTEGRITY REPORTS cross talk failure on certain nets in PCB SI 16.6
, L! X8 L) t6 o0 S$ M8 U3 A* f& l- i 1400302 ALLEGRO_EDITOR MANUFACT Copper Thieving is working differently in SPB16.6 as compared to SPB16.55 K1 r# t8 K3 m. j
1400755 ALLEGRO_EDITOR SHAPE Updating the shapes on the ATTACHED deisgn causes a short to a pad.# x; A( _4 i) [% i. Y6 Z2 x& }2 u
1400813 ALLEGRO_EDITOR SHAPE PCB Editor crashes when you delete islands from all the layers and save the board8 n# g* E% I0 t0 u v( R
1404174 SIP_LAYOUT OTHER Creating bounding shapes generates INCORRECT shapes and DRCs" E( ~$ k. V: r" j; N4 {) P
1404184 ALLEGRO_EDITOR INTERFACES Step package mapping - Save is disabled for certain symbol' d: u7 Q' p# i6 F- B# M
1406457 ALLEGRO_EDITOR SCRIPTS Unable to launch allegro.exe -orcad after update hotfix 046' ~2 u* c% e7 v5 z: j6 Z9 D: r
1407123 ALLEGRO_EDITOR OTHER Lines with zero line width are not being printed in PDF format5 l" _8 x! s- r1 i" O5 t4 G: L
1407483 ALLEGRO_EDITOR REFRESH The 'refresh symbol' command creates an unrouted connection in a fully routed design& j3 F. _2 _' @) n
1408072 SIP_LAYOUT OTHER Net assignment for a BGA component fails on running the File - Import - Netlist-in wizard command.* N3 C9 C. l+ A j; z s
1410857 ALLEGRO_EDITOR DRC_CONSTR Diff Pair Uncoupled length DRC gives different results in SPB16.3, SPB16.5, and SPB16.6.2 V" c+ S4 E/ b8 f
1413235 ALLEGRO_EDITOR INTERACTIV Find by Query with Via Structures: GUI freeze
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+ l1 t/ ?, J5 l# l# S DATE: 04-03-2015 HOTFIX VERSION: 001% E0 T0 X" d* ~9 ^
===================================================================================================================================
/ P+ W- C0 z3 |. `# E CCRID PRODUCT PRODUCTLEVEL2 TITLE
9 w+ {5 b J# @" D* l ===================================================================================================================================
2 [' i7 S) h0 { 491042 concept_HDL SECTION Prevent PackagerXL from changing visibility on SEC attribute
# X$ D: U+ H$ h. y$ Z" _" h 1205900 ALLEGRO_EDITOR INTERACTIV additional object polygon-rectangle for "snap to pick"
. f; H7 Q$ O, T3 u' ]& s 1327533 SIP_LAYOUT REPORTS Metal Usage Report fails2 c& G8 j. @9 u
1341177 ALLEGRO_EDITOR PLACEMENT "Place Replicate Unmatched Component Interface" window size should be increased to show "Matched Component"
4 [ Q8 g3 Y" ^" V 1360269 SIP_LAYOUT REPORTS Getting incorrect results in the Metal Usage report of SiP Layout when the variable METAL_USAGE_REPORT_NOARCS is set
7 m0 ^& R4 g. a8 E8 i+ L! a 1361281 ALLEGRO_EDITOR INTERACTIV Moving stacked vs non-stacked via's should be the same.% L4 ~0 t5 P% ?, D, O* K
1366525 ALLEGRO_EDITOR INTERACTIV Add replace via with via structure command to Allegro PCB
' g. \( ~* h/ q) f8 @ 1368091 ALLEGRO_EDITOR INTERACTIV Snap pick to fuction should see fiiled rectangle as a shape
1 ^! E6 x; ~( B0 w O' a8 w 1371510 APD DATABASE How to show DRC when tack point of wirebond out of finger boundary
6 o# P. W+ |5 G% N Z7 ^- D 1373564 ASI_PI GUI Impedance results are incorrect in PFE+ [1 T: L$ P6 Z+ X# W8 H
1374703 ALLEGRO_EDITOR SHAPE Inconsistent behavior on shape voiding" ? e! J+ ]( [) R: P+ M4 D
1376851 CONSTRAINT_MGR UI_FORMS CM workbooks change after simulating9 G3 {+ A a7 L3 a
1377555 ALLEGRO_EDITOR DRC_CONSTR The "Line to SMD Pin Same Net Spacing" DRC toggles everytime we run "Force Update" of Dynamic Shapes.3 g$ Y$ \' u0 X) X
1378032 ALLEGRO_EDITOR REPORTS Report command and batch mode give different Waived DRC Report results in PCB Editor0 I- a( u5 q/ R5 x5 u8 m( u
1378611 ALLEGRO_EDITOR INTERFACES Enable STEP export to convert the mixed unit into one single unit
, U2 D9 j& \& f5 k. @% j 1379240 APD PLACEMENT Placement gives error regarding the difference in units between the database and symbol, which is not the case3 v' ^' f- F. w; e" z' ~3 c: ~
1394908 ALLEGRO_EDITOR DATABASE Database crashes on doing "Show Element" on selected net
3 k: K, N4 H# n1 b& x 1395541 ALLEGRO_EDITOR PLOTTING Export PDF not correct for Phantom lines# {& y8 M E! _$ j( @. |
1395747 CONSTRAINT_MGR INTERACTIV Rename refdes causes Allegro to crash. Possibly due to CM being open.
7 R7 u! f; g9 z6 k3 S! z) K 1396915 APD STREAM_IF The question about MIRROR geometry function from stream out
! Z7 y5 u3 s( M& P 1398184 ALLEGRO_EDITOR MANUFACT Mismatch in backdrill data with IPC-2581 export |
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发表于 2015-5-7 02:28
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发表于 2015-5-8 11:30
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