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偶也跟一贴！
8 T I" w" a, h# ]以下内容来自《high speed digital system design》。
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! l F. Y2 Z: u2 \ }: uA via is a small hole drilled through a PCB that is used to make connections between various% c, g% ]3 a9 {! a8 k8 M" L% a
layers of the PCB or to connect components to traces. It consists of the barrel, the pad, and! h+ T" p9 @! S
the antipad. The barrel is a conductive material that fills the hole to allow an electrical( Y& h q1 p4 E g& q, x# \
connection between layers, the pad is used to connect the barrel to the component or trace,
7 L* e0 `+ }9 t9 N0 n: nand the antipad is a clearance hole between the pad and the metal on a layer to which no4 Y7 g9 ]8 Y4 B9 e3 h
connection is required. The most common type of via is called a through-hole via because it
. a1 X( [3 J% z5 Pis made by drilling a hole through the board, filling it with solder, and making connections on0 [4 W2 X7 _& A
appropriate layers via the pad. Other, less common types of vias, used primarily in multichip Q5 x" e5 ~( S! s
modules (MCMs) and advanced PCBs, are blind, buried, and micro-vias. Figure 5.1 depicts
+ t; U) B- @* {$ j" S) e1 ra typical through-hole via and its equivalent circuit. Notice that the pads used to connect the" b$ |9 S9 m1 ^8 C3 D4 ?) H) u4 v/ u
traces on layers 1 and 2 make contact with the barrel and that there is no connection on
5 \ _: N v7 `, zlayer 3. Blind and buried vias have a slightly different construction. Since through-hole vias9 l9 i" O! B$ o5 K4 q! K/ J
are by far the most common used in industry, they are the focus of this discussion.' g- b# n- N1 s; h2 q
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Notice that the via model is simply a pi network. The capacitors represent the via pad- [6 V5 G( P- `; W/ y/ q/ P
capacitance on layers 1 and 2. The series inductance represents the barrel. Since the via2 L( C2 } C3 K# S" T8 n) \
structures are so small, they can be modeled as lumped elements. This assumption, of" K+ X6 ]) e0 p: L
course, will break down when the delay of the via is larger than one-tenth of the edge rate.
& d' [/ J' A/ { E( D+ }; sThe main effect that via capacitance has on a signal is that it will slow down the signal edge7 X2 V0 U6 r! m+ P
rate, especially after several transitions. The amount that the signal edge rate will be slowed
; H g' P, J& v) I# T* O% scan be estimated by examining the degradation of a signal transmitted through a capacitive) m! _" A; W$ H, w \/ ?
load, as shown later in this chapter in equation (5.21). Furthermore, if several consecutive
/ Y9 Q( J. s8 x ~# ?- [8 ]! bvias are placed in close proximity to one another, it will lower the effective characteristic1 r A# T1 g- I
impedance, as explained in Section 5.3.3. The approximate value of the pad capacitance is
) J1 M) {/ Y" g[Johnson and Graham, 1993]
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[ 本帖最后由 killerljj 于 2007-11-21 20:51 编辑 ] |
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发表于 2007-9-11 14:20
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支持！
反对！
发表于 2008-1-17 21:53
发表于 2007-9-15 15:34
俺也顶一下,因为焊盘描述的太形象啦!