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PCB Net List Errors Report - 实验.sch - Sun Jun 12 21:33:09 20113 H! N& @, l5 w9 V* Y
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0 s7 l% M6 G9 s6 | Z/ S: a3 rDesign to Library Part Consistency Check
: p, c _/ Z+ S- N* ?----------------------------------------. I8 k# ~) C9 x- K# R1 ]
No Library consistency checking errors.
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$ ?" x5 U L g; O6 pSingle/Zero Pin Net Warnings
; R# J2 N& L" M5 Y& t----------------------------$ g4 Z( g7 \: V* y
Net +5V has less than two pins in PCB net list file.# }2 Q% l+ p4 }$ C- M
Net +12V has less than two pins in PCB net list file.. S) | Z- |1 ]% w d5 |" e' p
" S/ V8 b: l3 M6 KSchematic Connectivity Errors- J- ]- l p H; X0 R. P$ I. o" \
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w8 S2 a, R3 m" Z" uNo connectivity errors or warnings.: v" e% l- K9 Z" b' c
4 O9 K0 W8 k f1 P, ~. {
; m! X: _( N- n/ m7 e这是什么 错误，我刚学pads，不太懂，能不i能解释解释一下 |
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发表于 2011-6-12 21:36
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淘帖
支持！
反对！
楼主