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Table of Contents
' ~0 R% t6 w& g! ]0 b6 GAudience ............................................................................................. iii
; p- u- v1 Q' rRelated Documents ............................................................................. iii
9 |( F+ h( N% R' i* w$ v0 |8 J% mConventions ........................................................................................ iv
, [+ h+ \ Z% p) p8 IObtaining Customer Support .............................................................. vi% s8 _! p$ @7 V
Other Sources of Information ............................................................ vii$ m: \- Z) k5 r0 F& \
Revision History ............................................................................... viii
0 b+ C* F6 P& T' d4 k4 b/ Q9 XChapter 1 - Overview of Models ..................................................................... 1-1
. G/ B' i6 p4 @- M" n: }& u0 LUsing Models to Define Netlist Elements .............................................. 1-2
& W m8 c/ r4 WSupported Models for Specific Simulators ....................................... 1-2; I" ?4 l% D$ {7 z
Selecting Models .............................................................................. 1-3
* G6 t# t# G) D) W( m, l- jExample ............................................................................................ 1-3
( `/ T+ Q# Z; [3 ^1 S: UChapter 2 - Using Passive Device Models....................................................... 2-1
3 x) Y/ r6 b2 qResistor Device Model and Equations .................................................... 2-2; P; A# l1 ?' M) V% T7 i2 B) {
Wire RC Model ................................................................................. 2-2
; F+ _! P# }" A& q: G8 j, }1 UResistor Model Equations ................................................................. 2-5
; m3 v- M2 f, r8 B3 e: \Capacitor Device Model and Equations ............................................... 2-10# C6 t; x* ]% H
Capacitance Model ......................................................................... 2-10/ B+ H2 n- K1 |, H3 V3 e: J; G# C
Capacitor Device Equations ........................................................... 2-11
\& ^/ k$ A7 H" X1 j2 YInductor Device Model and Equations ................................................. 2-14
/ m. ^$ M5 J. Z/ \3 k6 [Inductor Core Models ..................................................................... 2-15
7 j- B$ J3 l. u7 w# s! E( LMagnetic Core Element Outputs .................................................... 2-18 J2 n2 P2 H3 u7 ~7 K U( P0 O) @
Inductor Device Equations ............................................................. 2-19/ a. o6 L; }5 d" _5 g
Jiles-Atherton Ferromagnetic Core Model ..................................... 2-216 E: P! A. X( C1 J: S
Power Sources ....................................................................................... 2-30! X1 W$ v! z& @
Independent Sources ....................................................................... 2-305 A) V, G! k/ k; X( c
Controlled Sources .......................................................................... 2-336 s8 l" Q/ [$ j! R5 [+ ~2 f. B/ i
Chapter 3 - Using Diodes ................................................................................. 3-1
9 g+ k( _5 l4 ODiode Types ............................................................................................ 3-2
$ l- t% b; y4 m8 `- EUsing Diode Model Statements .............................................................. 3-3
6 @- B* G5 e8 ]: f) m! TSetting Control Options .................................................................... 3-3% ?2 w; H- l- I9 g8 ^* M j3 W1 s3 c
Specifying Junction Diode Models ......................................................... 3-5
8 i/ v' k. w2 O( qUsing the Junction Model Statement ................................................ 3-6
2 N% Q! n0 A+ \& [; cUsing Junction Model Parameters .................................................... 3-7
( y5 C' ~. a) d+ `. @( T" jGeometric Scaling for Diode Models ............................................. 3-13
% q$ }. U4 Q" NDefining Diode Models ................................................................... 3-159 |& N; l& {" ?8 W9 |8 v
Determining Temperature Effects on Junction Diodes ................... 3-18% o, g( H: C3 t+ \1 a
Using Junction Diode Equations ........................................................... 3-21
/ L$ s( X4 }# U9 y3 RUsing Junction DC Equations ......................................................... 3-22
8 F. x( M6 [* d w5 E' nUsing Diode Capacitance Equations ............................................... 3-25' p8 H5 y: v: n8 z! z$ g6 I# B
Using Noise Equations .................................................................... 3-27
$ X6 F4 H1 O2 g* \+ STemperature Compensation Equations ........................................... 3-28( }% T. H* |. M$ G6 }- ]: X
Using the Junction Cap Model .............................................................. 3-327 E& [& t5 v8 {0 G/ V
Setting Juncap Model Parameters ................................................... 3-33
, g/ w3 w2 Y. o* r3 v; q& wTheory ............................................................................................. 3-33$ g5 r8 V* U2 B. {
JUNCAP Model Equations ............................................................. 3-384 p: @. u9 D; l3 c' h$ h9 x9 }
Using the Fowler-Nordheim Diode ...................................................... 3-46
0 h# w$ E b( ?4 u2 e7 t2 K+ ^6 j( _( ]Converting National Semiconductor Models ........................................ 3-48( Q: w# ]& i3 G& Z% o
Chapter 4 - Using BJT Models ........................................................................ 4-1
& n( G# R% U# I* }Using BJT Models .................................................................................. 4-2
( i- Y* a7 i; wSelecting Models ............................................................................... 4-25 Y* @: a! N1 q- m3 b# M5 e( r
BJT Model Statement ............................................................................. 4-4
' g$ b7 |7 X2 n" Z* D* UUsing BJT Basic Model Parameters ................................................. 4-5+ H6 @! B: g" ~) q0 ?$ O
Handling BJT Model Temperature Effects ..................................... 4-15: V. Y7 l/ y8 G
BJT Device Equivalent Circuits ............................................................ 4-21! o3 w/ n$ N; V1 H8 t7 }
Scaling ............................................................................................. 4-21; [7 z5 j; S- d7 [
Understanding the BJT Current Convention ................................... 4-21* d! U% s0 N6 x, g" O( L% U$ o
Using BJT Equivalent Circuits ....................................................... 4-22
/ n. @/ b, r9 ]/ q) D zBJT Model Equations (NPN and PNP) ................................................. 4-30. h4 F, T' P& U) \! Z
Understanding Transistor Geometry in Substrate Diodes .............. 4-30- W! ?) C7 H# w9 m
Using DC Model Equations ............................................................ 4-324 M" s( ?, c. Y
Using Substrate Current Equations ................................................. 4-33+ X) B* s \0 y, m4 K: N- m
Using Base Charge Equations ......................................................... 4-347 c4 i7 h& K0 q* Q- r! u
Using Variable Base Resistance Equations .................................... 4-35 ^, @4 g4 g* G+ Y9 `5 c# ~
Using BJT Capacitance Equations ........................................................ 4-36
2 q" u6 L' K! V) HUsing Base-Emitter Capacitance Equations ................................... 4-36# }# }" q6 E, W8 C
Determining Base Collector Capacitance ....................................... 4-38
: U# d- ~% c& u. R* ^' I0 v+ NUsing Substrate Capacitance ........................................................... 4-40) O$ D3 w$ m) C! R* G
Defining BJT Noise Equations ............................................................. 4-420 e1 K( B+ y0 r" Y
BJT Temperature Compensation Equations ......................................... 4-44! I6 p5 I; G6 ~' g" c6 L
Using Energy Gap Temperature Equations .................................... 4-44
& |: {9 p( e; r6 o2 J' ESaturation and Beta Temperature Equations, TLEV=0 or 2 ........... 4-44 m$ m! K) i* B- r- G' A* M, y* d8 C
Using Saturation and Temperature Equations, TLEV=1 ................ 4-46# \) W! ^; o6 k$ k/ Z& E+ D J4 L
Using Saturation Temperature Equations, TLEV=3 ....................... 4-47
& z2 I9 `8 o, ~& O% @& b! c" R3 KUsing Capacitance Temperature Equations .................................... 4-49
- @# }5 U7 L/ [3 M( NParasitic Resistor Temperature Equations ...................................... 4-51
7 k4 y& r/ `6 x; s' G: {Using BJT Level=2 Temperature Equations .................................. 4-52" v% R9 D) f2 t* j! I6 j. h8 \
BJT Quasi-Saturation Model ................................................................ 4-53
: e$ G9 X6 [- Y0 E4 bUsing Epitaxial Current Source Iepi ............................................... 4-55/ r' O0 X6 P- K- k( D
Epitaxial Charge Storage Elements Ci and Cx ............................... 4-55! b1 Q2 s! G, @% p
Converting National Semiconductor Models ........................................ 4-58
! o+ i- }& N- p0 m. h; TVBIC Bipolar Transistor Model ........................................................... 4-60
5 y/ c5 u* i* n5 t" t$ f' b. p4 mUnderstanding the History of VBIC ............................................... 4-60
7 t6 K- g& T/ u+ C( BVBIC Parameters ............................................................................ 4-61
2 E' w, L5 D; _/ o0 ^Noise Analysis ................................................................................ 4-62
/ k Z8 G) \2 y, g6 Y: MLevel 6 Philips Bipolar Model (MEXTRAM Level 503) ..................... 4-71
; Z7 \; M- P2 U" ~( wLevel 6 Element Syntax .................................................................. 4-71" O% H( a$ Z6 ]9 A& m
Level 6 Model Parameters .............................................................. 4-72 o7 q/ {0 b7 U- R6 i
Level 6 Philips Bipolar Model (MEXTRAM Level 504) ..................... 4-78
) R( b- h; ?7 u, W+ V4 Q0 YNotes ............................................................................................... 4-79
% W# l' y6 \% A4 E8 BLevel 6 Model Parameters (504) ..................................................... 4-807 j' W( F, n2 i& Z5 g
Level 8 HiCUM Model ......................................................................... 4-94
1 v5 k% V& w3 B7 w9 `0 F# A( _What is the HiCUM Model? ........................................................... 4-948 F6 u+ c3 h" n; g6 |, e* t4 \
HiCUM Model Advantages ............................................................ 4-94' S- y9 i% m! ~+ [$ h
Avant! HiCUM Model vs. Public HiCUM Model .......................... 4-961 i7 a0 S$ K9 C: g0 r
Model Implementation .................................................................... 4-96
, ~) @3 o4 ^+ ]5 [; A9 r) f1 xInternal Transistors ......................................................................... 4-97 {# u4 K/ G: W! j7 A
Level 9 VBIC99 Model ...................................................................... 4-110
" v/ T; ], M7 V( a6 o2 D; Z5 fElement Syntax of BJT Level 9 .................................................... 4-110- ~. l0 Q+ f8 M7 Z
Effects of VBIC99 ........................................................................ 4-112
1 n% Q* O0 R+ Z7 t+ C$ k! `Model Implementation .................................................................. 4-112
0 p B& ]9 H1 j6 K8 u: yExample ........................................................................................ 4-119' E) `3 V# Q7 V# ?, u
VBIC99 Notes for HSPICE Users ................................................ 4-123$ N$ |6 @% h# K4 G
Level 10 Phillips MODELLA Bipolar Model .................................... 4-124+ B' ~+ q8 w6 p
Model Parameters ......................................................................... 4-124
; B' b; V+ G6 R- g8 Y" H; A- bEquivalent Circuits ........................................................................ 4-129! N& i( T' k6 A" C% ]
DC Operating Point Output .......................................................... 4-131. ~- W4 ?7 _( i& v# M3 z
Model Equations ........................................................................... 4-1325 ~; |0 z; {' c* Q
Temperature Dependence of the Parameters ................................ 4-142/ c7 }- ^1 w6 A; f: a, R
Level 11 UCSD HBT Model .............................................................. 4-146/ N3 T( x' i- p9 t8 Q0 t' v6 [
Using the UCSD HBT Model ....................................................... 4-146
* W/ i; t2 ?4 v0 s& xDescription of Parameters ............................................................. 4-147
) L/ f% E6 H# d e0 ^Model Equations ........................................................................... 4-152% r$ G$ I* K+ N- n9 C
Equivalent Circuit ......................................................................... 4-163
# D/ o5 s8 ?# ~Example Avant! True-Hspice Model Statement ........................... 4-165
3 a. s: t- }/ xChapter 5 - Using JFET and MESFET Models............................................. 5-1
! e. W" e0 X* L1 {Understanding JFETs .............................................................................. 5-2
" d8 r# _* B6 @; cSpecifying a Model ................................................................................. 5-3
/ `/ R2 p. M" K, ?1 d; k6 H4 Z2 bUnderstanding the Capacitor Model ....................................................... 5-5
+ V L" q" O- M$ lModel Applications ........................................................................... 5-5
) s2 g' y* j: AControl Options ................................................................................. 5-6/ F: k7 O( A" g
JFET and MESFET Equivalent Circuits ................................................. 5-7
7 }7 d. P* s3 [) v1 {: t, wScaling ............................................................................................... 5-7
4 y5 H: E( E8 V0 v, }Understanding JFET Current Convention ........................................ 5-7& w% \- k q+ ^' c
JFET Equivalent Circuits .................................................................. 5-8
6 t" q- o: M6 h& rJFET and MESFET Model Statements ................................................. 5-13
3 c. ]& Y8 k% Z# A2 h! hJFET and MESFET Model Parameters ........................................... 5-13% J) A; N5 _: p* d5 o# Z
Gate Diode DC Parameters ............................................................. 5-15
7 g1 l0 h& O' P2 |! P/ n$ `JFET and MESFET Capacitances ................................................... 5-25' T# t' g2 i/ g3 R9 B
Capacitance Comparison (CAPOP=1 and CAPOP=2) ................... 5-290 L$ H( c# c7 u% p% z
JFET and MESFET DC Equations ................................................. 5-31
% H1 V6 h! s4 x0 YJFET and MESFET Noise Models ....................................................... 5-350 b( ?5 Q9 s# B5 j
Noise Parameters ........................................................................... 5-357 q% x/ f/ e! j( v4 }
Noise Equations .............................................................................. 5-35, X+ P' ~! @: C y' k8 ^
Noise Summary Printout Definitions .............................................. 5-36" d; U! J: V. ^ _$ @) t# N! @+ j
JFET and MESFET Temperature Equations ........................................ 5-377 @3 u/ F+ o5 _: _+ g q9 ]
Temperature Compensation Equations ........................................... 5-40
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发表于 2008-3-25 17:14
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thanks a lot ,very good materials