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Table of Contents
# f+ _5 t5 X' O9 b0 oAudience ............................................................................................. iii
/ R; d4 N5 y' lRelated Documents ............................................................................. iii; u" b/ `4 I+ M% I7 S
Conventions ........................................................................................ iv* D1 S+ c( J/ n
Obtaining Customer Support .............................................................. vi
; \7 o7 a2 X4 F" h' `/ v" \/ ROther Sources of Information ............................................................ vii
1 ?8 O. y4 u5 k4 Z: L' MRevision History ............................................................................... viii
* L1 s: b3 a) v0 }: L0 |" MChapter 1 - Overview of Models ..................................................................... 1-1
8 p, m$ X( X% c. D" E: RUsing Models to Define Netlist Elements .............................................. 1-21 i. j" p4 `3 _8 N+ k; i4 ?3 E0 T; N
Supported Models for Specific Simulators ....................................... 1-2) h! T& B- [$ T! n6 v
Selecting Models .............................................................................. 1-3
8 I, o/ V0 Y. w9 B cExample ............................................................................................ 1-3
7 H: H1 b# j2 i1 g8 MChapter 2 - Using Passive Device Models....................................................... 2-1% b* N7 l8 Y1 g0 X* `8 V
Resistor Device Model and Equations .................................................... 2-2# f9 O; `' y E: B$ d) @
Wire RC Model ................................................................................. 2-2- I! Z! ]! W h. A" k! J! A9 s
Resistor Model Equations ................................................................. 2-5, x! N, O1 i" \
Capacitor Device Model and Equations ............................................... 2-10
( j' W- o$ J! L1 g8 s5 ECapacitance Model ......................................................................... 2-109 t! P L8 {/ f; H# E7 D" a" e, b
Capacitor Device Equations ........................................................... 2-11
% T% E+ o: m6 d- w! EInductor Device Model and Equations ................................................. 2-14. r7 e6 C: T) y2 o8 N
Inductor Core Models ..................................................................... 2-15
+ J5 ]0 g2 Y3 ]9 I' bMagnetic Core Element Outputs .................................................... 2-18' t% h; a# S4 O
Inductor Device Equations ............................................................. 2-19
5 o J& _; X$ W% a* RJiles-Atherton Ferromagnetic Core Model ..................................... 2-21/ u' d# O- c0 p4 ^
Power Sources ....................................................................................... 2-30
% W& \& K: v+ S+ D% E, pIndependent Sources ....................................................................... 2-30
1 Q/ M9 {7 s$ d: ^7 k- u, FControlled Sources .......................................................................... 2-335 J. a5 @9 |7 X0 V% b$ Q* _( j
Chapter 3 - Using Diodes ................................................................................. 3-1. v) ]- Q: e( K9 O+ s1 ~, b5 p
Diode Types ............................................................................................ 3-24 A+ h( B/ u& x5 h: r! Z3 {2 [
Using Diode Model Statements .............................................................. 3-3
: C) c/ H( e" I; A8 _Setting Control Options .................................................................... 3-3
6 c1 T( n% d+ a5 i2 Q* O2 F! xSpecifying Junction Diode Models ......................................................... 3-5! I$ Z5 y, _) m! K. T
Using the Junction Model Statement ................................................ 3-6' |) F! K% Y8 _4 E! ~: I
Using Junction Model Parameters .................................................... 3-7
7 I6 @' l) K7 j8 \+ hGeometric Scaling for Diode Models ............................................. 3-13/ a: R: D3 {: q; z& P
Defining Diode Models ................................................................... 3-159 V- k' Q/ ^* j+ y% |$ l
Determining Temperature Effects on Junction Diodes ................... 3-18
' f. h& u# ?0 a q" K% H$ dUsing Junction Diode Equations ........................................................... 3-217 C5 e- H' B2 V" p0 F# U3 N6 j
Using Junction DC Equations ......................................................... 3-22
E& H3 j: l, y# K( K( N7 X ?+ M! wUsing Diode Capacitance Equations ............................................... 3-257 X) C! W I) W5 M# r) f% H* b) L
Using Noise Equations .................................................................... 3-27
; Q0 n2 j5 M$ C, O6 h! TTemperature Compensation Equations ........................................... 3-28; _5 p9 N0 I3 q1 w r, _
Using the Junction Cap Model .............................................................. 3-32
& c4 G# n8 Q7 B' oSetting Juncap Model Parameters ................................................... 3-339 `! Z6 [+ p5 c& i3 @
Theory ............................................................................................. 3-33" N0 \% T6 @$ u" _
JUNCAP Model Equations ............................................................. 3-388 O" A' y T6 L0 ^" ~/ s" r
Using the Fowler-Nordheim Diode ...................................................... 3-46
" S2 H* r/ L9 w" }Converting National Semiconductor Models ........................................ 3-487 A2 ]- O. W: i9 s
Chapter 4 - Using BJT Models ........................................................................ 4-1+ z. X1 m0 [; F( Q7 B( ?. b
Using BJT Models .................................................................................. 4-2, m- o+ | K; y
Selecting Models ............................................................................... 4-2 D; y+ n) Y' {% J4 H2 S
BJT Model Statement ............................................................................. 4-4
: _* f# E& r7 L1 T# B- \Using BJT Basic Model Parameters ................................................. 4-5
9 \" d0 J" j+ _' q1 XHandling BJT Model Temperature Effects ..................................... 4-15( P* ^* I/ n/ D1 ^. S) ^
BJT Device Equivalent Circuits ............................................................ 4-21, ~& F; x a: p1 D4 j
Scaling ............................................................................................. 4-210 Q+ p& q( v, @! I7 j: ]$ F
Understanding the BJT Current Convention ................................... 4-21% `( P, {# Y* V9 R8 \
Using BJT Equivalent Circuits ....................................................... 4-22
/ z: w, m) s7 R; s1 z, k$ uBJT Model Equations (NPN and PNP) ................................................. 4-30
; T4 j" ?7 \( C3 H6 S7 x* n8 l/ f( yUnderstanding Transistor Geometry in Substrate Diodes .............. 4-30
/ s' y+ |4 A: W4 t" l. vUsing DC Model Equations ............................................................ 4-32
" x( H! y6 M( W) a5 Y$ n9 y0 qUsing Substrate Current Equations ................................................. 4-331 ]6 S+ k) i2 {
Using Base Charge Equations ......................................................... 4-34
. U3 v5 n' J3 q) b: w$ u6 AUsing Variable Base Resistance Equations .................................... 4-351 J; z% e% ] C% H
Using BJT Capacitance Equations ........................................................ 4-36
' j5 `5 h1 L; z" @# ZUsing Base-Emitter Capacitance Equations ................................... 4-36
$ U3 z! ? ^3 ~9 f1 J' E; vDetermining Base Collector Capacitance ....................................... 4-38; x. `* b& G5 j! D3 t( _
Using Substrate Capacitance ........................................................... 4-40
! Y( f' |- G- ^! t+ fDefining BJT Noise Equations ............................................................. 4-42& C+ Z% S+ S+ u9 q1 A
BJT Temperature Compensation Equations ......................................... 4-44$ Z1 t6 ~0 ]% Z3 z
Using Energy Gap Temperature Equations .................................... 4-44
$ z4 j% ^# C% T# k7 N6 I/ e5 ~Saturation and Beta Temperature Equations, TLEV=0 or 2 ........... 4-449 x* j8 a* G6 Q0 v! r
Using Saturation and Temperature Equations, TLEV=1 ................ 4-46$ z6 P Q1 M; |: Z1 y: b' e( |
Using Saturation Temperature Equations, TLEV=3 ....................... 4-47
0 T" E: b4 `( F. z% u# A4 mUsing Capacitance Temperature Equations .................................... 4-494 S; H. f8 b- ~. m
Parasitic Resistor Temperature Equations ...................................... 4-51$ W( ~9 i+ B% i- Q
Using BJT Level=2 Temperature Equations .................................. 4-52
9 ^1 O# w8 T. K+ B C. s, i, ?BJT Quasi-Saturation Model ................................................................ 4-53( E9 u0 _* s: V0 d% K# ^; a) l
Using Epitaxial Current Source Iepi ............................................... 4-559 o/ g# ?7 M0 | h; X1 h
Epitaxial Charge Storage Elements Ci and Cx ............................... 4-55
2 ?- K, t J" @) [. ~9 t9 z. u& lConverting National Semiconductor Models ........................................ 4-585 J4 K" Q( ^% x% g) k
VBIC Bipolar Transistor Model ........................................................... 4-607 M7 x$ X/ H* ~; o5 I% b
Understanding the History of VBIC ............................................... 4-60
- C; }3 a4 D" V: i& ~VBIC Parameters ............................................................................ 4-61
+ u1 Y1 Y- t3 S# R2 D5 f8 N; mNoise Analysis ................................................................................ 4-62
3 z7 `- i% Q0 QLevel 6 Philips Bipolar Model (MEXTRAM Level 503) ..................... 4-718 \* D& m3 [8 |% {( ?
Level 6 Element Syntax .................................................................. 4-71
9 y% V: v3 Y" l7 a+ V1 w9 x5 HLevel 6 Model Parameters .............................................................. 4-72
2 T, h# q% u) I9 E3 uLevel 6 Philips Bipolar Model (MEXTRAM Level 504) ..................... 4-78
/ w/ w- m5 E: ~Notes ............................................................................................... 4-79
% _4 X" |+ X, c& b; p7 [Level 6 Model Parameters (504) ..................................................... 4-80
. p* i" V% I* ^3 E, j0 H& ]* y3 CLevel 8 HiCUM Model ......................................................................... 4-94! L* o7 r& Z$ _$ p
What is the HiCUM Model? ........................................................... 4-94: K; f/ X8 b [7 \
HiCUM Model Advantages ............................................................ 4-94
7 N# r1 G" ]% X% e5 _2 Q) qAvant! HiCUM Model vs. Public HiCUM Model .......................... 4-964 _: \* k9 h) p4 p
Model Implementation .................................................................... 4-96
8 o8 X9 Y: I( a: G8 OInternal Transistors ......................................................................... 4-974 ]6 x/ s( e8 b+ P! b
Level 9 VBIC99 Model ...................................................................... 4-110
( t r9 j# I+ v) ]Element Syntax of BJT Level 9 .................................................... 4-1108 M7 K# Y4 {" J& v7 z8 N" Z* {
Effects of VBIC99 ........................................................................ 4-1128 j1 _ |% I d, s0 s" x1 O6 t
Model Implementation .................................................................. 4-1123 r5 M s) m+ K( B2 D2 s5 n6 ]
Example ........................................................................................ 4-1197 A! A/ N1 t- h9 I" u8 s$ {1 G! ?
VBIC99 Notes for HSPICE Users ................................................ 4-123
! i8 E1 `& _! L# `) o; YLevel 10 Phillips MODELLA Bipolar Model .................................... 4-124) `3 @% p$ R j- s" y' g
Model Parameters ......................................................................... 4-124
1 j7 @# g3 {2 yEquivalent Circuits ........................................................................ 4-1297 w$ B3 B- {1 g7 T1 l: B
DC Operating Point Output .......................................................... 4-131
& k: j; h8 v9 A6 f& s+ tModel Equations ........................................................................... 4-132: u& T( H- p, l0 q9 M
Temperature Dependence of the Parameters ................................ 4-142: c- i0 U& \! o9 Z) @5 L
Level 11 UCSD HBT Model .............................................................. 4-146
% L( F1 Y4 S, o% nUsing the UCSD HBT Model ....................................................... 4-146
% } e9 v" f7 ]0 a4 @+ Y8 t+ N5 V) WDescription of Parameters ............................................................. 4-1479 O8 P( E6 {8 k1 S, d1 h
Model Equations ........................................................................... 4-152
% C9 s5 L- `- E: HEquivalent Circuit ......................................................................... 4-163
& l, F5 W1 B; ^. kExample Avant! True-Hspice Model Statement ........................... 4-1658 z3 V$ b; C3 ^
Chapter 5 - Using JFET and MESFET Models............................................. 5-1
: `$ F- X$ }5 LUnderstanding JFETs .............................................................................. 5-2$ C% e0 A2 c# U( x
Specifying a Model ................................................................................. 5-30 f. {' p% s" {8 @' u4 c
Understanding the Capacitor Model ....................................................... 5-5
0 ]2 Q$ [8 S, ^8 C/ P f/ f. yModel Applications ........................................................................... 5-5
( I O* } ?0 u; N, F, k* _4 _8 R% vControl Options ................................................................................. 5-6# j( U( T, t i
JFET and MESFET Equivalent Circuits ................................................. 5-7
" C6 g! U9 M1 m' V7 Z$ @7 yScaling ............................................................................................... 5-7$ Y: z* ~9 {' D/ @: i" [
Understanding JFET Current Convention ........................................ 5-7
0 i0 Y6 r: ]/ T( H9 M1 IJFET Equivalent Circuits .................................................................. 5-8
( S0 V6 c* \7 t/ p6 E" iJFET and MESFET Model Statements ................................................. 5-13
x$ E2 Y _2 q0 fJFET and MESFET Model Parameters ........................................... 5-138 p1 q% B) G' q9 t
Gate Diode DC Parameters ............................................................. 5-15- O+ a0 C: h' E: E" P
JFET and MESFET Capacitances ................................................... 5-25
0 D2 K' C" W/ W1 N! V: @ _5 fCapacitance Comparison (CAPOP=1 and CAPOP=2) ................... 5-29
) X( ^9 _. Z8 DJFET and MESFET DC Equations ................................................. 5-31
% E- A5 k- a! H; j$ _8 i+ h) K2 }JFET and MESFET Noise Models ....................................................... 5-359 K1 T6 l5 t m+ @1 `' d
Noise Parameters ........................................................................... 5-352 U ~) K6 q+ f9 F
Noise Equations .............................................................................. 5-35
5 b! ~# @1 _4 u# O XNoise Summary Printout Definitions .............................................. 5-362 s/ ^! T: W8 {5 s: ]8 s v' f: G# w
JFET and MESFET Temperature Equations ........................................ 5-37
% _+ L3 l8 U; S( { H) sTemperature Compensation Equations ........................................... 5-40
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