对这段文字描述感觉有些困惑

mengzhuhao · 发表于 2007-12-21 18:01

EDA365欢迎您登录！

您需要登录才可以下载或查看，没有帐号？注册

x

对这段文字描述感觉有些困惑

8.0 Actual "full_case" design problem
The 2-to-4 decoder with enable in Example 12, uses a case statement that is coded without using
any synthesis directives. The resultant design was a decoder built from 3-input and gates and
inverters. No latch is inferred because all outputs are given a default assignment before the case
statement. For this example, the pre-synthesis and post-synthesis designs and simulations
matched. The 2-to-4 decoder with enable in Example 13, uses a case statement with the
"full_case" synthesis directive. Because of this synthesis directive, the enable input (en) was
optimized away during synthesis and left as a dangling input. The pre-synthesis simulation
results of modules code4a and code4b matched the post-synthesis simulation results of module
code4a, but did not match the post-synthesis simulation results of module code4b [2].
// no full_case
// Decoder built from four 3-input and gates
// and two inverters
module code4a (y, a, en);
output [3:0] y;
input [1:0] a;
input en;
reg [3:0] y;
always @(a or en) begin
y = 4'h0;
case ({en,a})
3'b1_00: y[a] = 1'b1;
3'b1_01: y[a] = 1'b1;
3'b1_10: y[a] = 1'b1;
3'b1_11: y[a] = 1'b1;
endcase
end
endmodule
Example 12 - Decoder example with no "full_case" directive
Statistics for case statements in always block at line 9 in file
'.../code4a.v'
===============================================
| Line | full/ parallel |
===============================================
| 12 | no/auto |
===============================================
Figure 19 - Case statement report for Example 12

// full_case example
// Decoder built from four 2-input nor gates
// and two inverters
// The enable input is dangling (has been optimized away)
module code4b (y, a, en);
output [3:0] y;
input [1:0] a;
input en;
reg [3:0] y;
always @(a or en) begin
y = 4'h0;
case ({en,a}) // synopsys full_case
3'b1_00: y[a] = 1'b1;
3'b1_01: y[a] = 1'b1;
3'b1_10: y[a] = 1'b1;
3'b1_11: y[a] = 1'b1;
endcase
end
endmodule
Example 13 - Decoder example with "full_case" directive
Warning: You are using the full_case directive with a case statement in which
not all cases are covered
Statistics for case statements in always block at line 10 in file
'.../code4b.v'
===============================================
| Line | full/ parallel |
===============================================
| 13 | user/auto |
===============================================
Figure 20 - Case statement report for Example 13

谁给解释一下原因呢?
为啥会有差异?

帐号		自动登录	找回密码
密码			注册

对这段文字描述感觉有些困惑

EDA365欢迎您登录！

浏览过的版块

推荐内容 /1