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本帖最后由 pzt648485640 于 2013-11-19 08:22 编辑 ; \- Q# y* E6 \( C
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DATE: 11-15-2013 HOTFIX VERSION: 019
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8 Q; r0 B/ X' s% w4 z3 F3 l===================================================================================================================================
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
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===================================================================================================================================
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1176155 concept_HDL CORE Graphics remnants with 16.6 QIR 3
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1178272 CONCEPT_HDL OTHER Verilog netlist does not include split blocks correctly
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% R$ ]! S8 }: _' ?) Y, [1 o) t1190782 FSP FPGA_SUPPORT Support for Altera > 5SGXEA9N2F45 device.+ i6 V' e3 I& r; {% u
s% t3 Y9 v1 k0 j, r; w1194140 ADW LRM SYNC_PROPERTIES is not resolving issues a based sync_properties settings; }5 r1 M% W# R
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1195744 APD EDIT_ETCH Diff_Pair routing fails on certain Uvias in the pair.
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1196704 allegro_EDITOR INTERFACES ENH: During ipc2581 export checkboxes corresponding to ¿Miscellaneous Image Layers¿ should automatically get selected
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7 E- V! [$ D! r8 f) ]2 V1198340 ALLEGRO_EDITOR OTHER Multiple -product option on the Allegro command line does not access the second -product% w# y: \/ a, d' U1 z
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1198596 ALLEGRO_EDITOR INTERFACES When copper thickness is increased for the outer layers, step Viewer does not show correct component position.6 h2 T4 b7 Q# r
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1199673 PCB_LIBRARIAN OTHER Component Browser fails to load footrpints if they are set with UNC path* }2 M$ c) D4 L G; U
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1199889 ALLEGRO_EDITOR DATABASE Allegro crashing with latest hotfix.) Y; }2 E0 a$ R& ^# w* s
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1200303 ALLEGRO_EDITOR GRAPHICS 3D Viewer does not update after changing STEP model mapping2 m" e$ Q+ f: m/ c7 P! N* y
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1200449 ALLEGRO_EDITOR REPORTS Allegro crashes when generating Net Loop Report.
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1200915 ALLEGRO_EDITOR DATABASE Reducing accuracy of this specific design crashes Allegro/ w* A' I) p6 w' w+ u% ?9 S
0 ~; H# B4 g; j3 Y3 E1201011 ADW COMPONENT_BROWSE Component Browser crashes in DB mode
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1201376 ALLEGRO_EDITOR INTERFACES Allegro hangs when trying to map a specific STEP model to a package drawing.& |" P2 W5 x/ y
# O8 ^, i3 Y8 X1 S6 y1 u) ]% s8 c1201897 SIP_LAYOUT IMPORT_DATA BGA Pin Colors not matching the Colors defined in the Symbol Spreadsheet after updating.! f2 s3 I I- d( L
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1202709 ALLEGRO_EDITOR INTERFACES STEP File generated from Allegro is not overwritten when the variable "set ads_textrevs
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, I: [1 i' N: q! s( T! ^3 B1202820 ALLEGRO_EDITOR INTERFACES Different xml generation for same step model on S106 and S017* }+ t7 v: ?* Q) P% {# ~1 Y4 A: R
: M( Z9 K5 M" W6 a9 m1202842 ALLEGRO_EDITOR INTERFACES Step model invisible for one pin dra in allegro 16.6 symbol editor
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; f9 B6 \( B3 r- C7 D$ P* H1202983 ALLEGRO_EDITOR SHAPE Shape voiding creates DRC with Route Keepout% A. B* `) i9 b. @6 H4 O
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1203125 ALLEGRO_EDITOR OTHER Exporting STEP file with External copper enabled does not show all copper when viewed with Solid Edge or Inventor
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1203236 ALLEGRO_EDITOR INTERFACES IPC2581 output with crosshatched shape is not correct- L% ~8 o( z- _" J: L. R. I
6 v* f m+ _1 Q! G1203995 CONCEPT_HDL CHECKPLUS CheckPlus rule, local_signal_no_offpage_body, getting an incorrect failure.+ \6 n/ m: S* d' B
' W2 ~. A% C7 J3 A6 m1204629 ALLEGRO_EDITOR skill axlUIDataBrowse crashes the editor or returns error0 }% c! `+ B/ c: ?
$ p8 B6 k0 O5 q4 h# ]3 d& W1204640 SIP_LAYOUT DIE_EDITOR Concurrent co-design update fails
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1204881 SIP_LAYOUT BGA_GENERATOR Pin numbers are messed up after deleting a pin at a staggered bga2 O- e) x# n! |
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1204885 CONCEPT_HDL CONSTRAINT_MGR Cant assign discrete models after the wrong model was removed.
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1205374 ALLEGRO_EDITOR OTHER pdf out command creates incorrect drill Symbol Characters placement in pdf file when setting film mirrored.
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! ?$ J% l" |7 E* X' t. F3 d1205729 SIP_LAYOUT DIE_EDITOR update of codesign db fails on exit from die editor" [& b( ^/ j% G8 a j
: q( S3 D8 A8 \4 ~/ s3 n: U1205801 ALLEGRO_EDITOR OTHER Tool crash when do export IPF.
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1205881 CONSTRAINT_MGR OTHER In CMGR , Objects > Create crashes Allegro3 D1 P: u' J. R" @$ \, d: Y# _) J
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