|
EDA365欢迎您登录!
您需要 登录 才可以下载或查看,没有帐号?注册
x
更新内容及模块:
/ _& L4 }$ a5 c/ C/ fDATE: 06-14-2013 HOTFIX VERSION: 011) Z/ N7 d. @5 W( S8 } R) j" G
===================================================================================================================================9 K& i) ~) m5 j9 I
CCRID PRODUCT PRODUCTLEVEL2 TITLE3 f) _0 n' i c: p; {1 ~3 X+ g
===================================================================================================================================! w# v* {8 E* b. V
982306 concept_HDL OTHER When plotting a PDF publisher output the page coming out half inch bigger in pdf
; Y5 m3 E( |* e0 f4 W- m+ ^1055338 SIP_LAYOUT DRC_CONSTRAINTS Soldermask to Via drcs on bondfingers& a; @- |/ L9 E% u r
1093375 allegro_EDITOR PLACEMENT Align Module with Zero spacing value space the modules further away the modules should be nearer+ u H/ R/ A \3 D
1103201 RF_PCB FE_IFF_IMPORT Wrong permissions to map file during IFF import" R! c# N% K7 `3 z
1106900 CONCEPT_HDL COMP_BROWSER Component Browser performance utility should honor CPM directives for include and exclude PPT+ Y7 l6 ~% B" p& ~
1110178 ALLEGRO_EDITOR EDIT_ETCH Line Width Retention should be controlled via setting
' z' D" Z6 E M1 W1110323 APD DXF_IF DXF out is offsetting square discrete pads.
. |% K! E' a# {9 m& i p3 ]1 S1123581 ALLEGRO_EDITOR MANUFACT Dimension Line gets changed on board
! U' `. p% G4 G: I/ D/ A- J) B7 z& n1134083 CONCEPT_HDL OTHER Published PDF file's hyperlinks do not work fine when user use double digits partitions for page Border.
9 \3 _2 g2 t' }1 W$ C2 E7 F) N+ L1139338 ALLEGRO_EDITOR DRC_CONSTR The total etch length does not seem to work for Xnets after setting the variable "retain_electrical_constraints_on_nets"" p5 G: ?6 ^1 }+ Y' s w7 ~
1139361 ALLEGRO_EDITOR DRAFTING Angular dimension tolerance is incorrect when plus minus tolerances are equal.5 O8 r# x/ S. E" ]) v
1141882 ALLEGRO_EDITOR EDIT_ETCH Allegro Crashes during diffpair slide
. J p$ D3 f9 a+ R3 p1 Q1142876 ALLEGRO_EDITOR SHAPE No DRC error when airgap between place bounds exactly zero; c/ L1 E8 w+ Z4 C/ t
1145235 CONCEPT_HDL CONSTRAINT_MGR DEHDL CM gives error when trying to launch SigXP7 j7 b: c# _0 Y& k W
1145243 ALLEGRO_EDITOR NC Duplicate drills found in the NC Drill output
2 A% z6 E# C; M: D8 X' `1145260 SIP_LAYOUT DIE_EDITOR Enable "Copy" in die editor3 c3 |! ^9 L: e- E6 w
1145284 CONCEPT_HDL CORE Publish PDF crashes DE HDL9 s" v8 o% Z6 |( g/ {
1145333 ALLEGRO_EDITOR SHAPE SHAPE boundary may not cross itself. Error cannot be fixed.8 G# ~7 C+ A# z
1145856 ALLEGRO_EDITOR DRC_CONSTR DRC Line to Thru Pin appear while Fillet be added W- q0 O. |% C
1146287 PCB_LIBRARIAN CORE PDV expand pins and change origin sets coordinates for few pins wrong and places pins on top of each other after collaps4 f! T0 B7 x. X) {, m3 f
1146865 ALLEGRO_EDITOR DATABASE Allegro crashes when trying to place mechanical symbol' S& l! Z4 V3 R3 W% b" N! u
1148513 ALLEGRO_EDITOR OTHER Importing a subdrawing file causes incorrect net name assignment.
6 n* ^) y" L" F, ?( }1 g8 |! H/ y1148734 CONCEPT_HDL OTHER Logical Symbol Text is turned upside down after extracting PDF by Publish PDF
- I, S Z* u% e! M+ ]' {: y1149025 ALLEGRO_EDITOR INTERFACES IPC-2581 imports cross-hatched shapes as solid) h5 H# E8 h+ t% R1 t9 f
1149948 APD OTHER Stream_out hangs on this design -- hang processing merge of overlapping shapes using poly_deletecolinear_only()+ m+ r9 m( F7 S6 W5 g) H& N
1150274 CONCEPT_HDL CORE Uprev from 16.3 to 16.6 is not preserving RefDes* s9 b# x1 D/ E$ p7 I1 E) W: ~$ Q
1151450 SIP_LAYOUT DXF_IF DXF export from CDNSIP missing symbols5 M5 h) U: @" S4 z; X8 a* M6 x0 w8 l
- k# o5 W$ } N. Q0 z
( B6 _! l: [" P下载链接:
- |7 B1 S/ c2 j0 K8 x" K$ Khttp://pan.baidu.com/share/link? ... 5&uk=3826038294. d& V: K+ s, d2 @/ W8 r
|
评分
-
查看全部评分
|