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本帖最后由 超級狗 于 2026-3-2 09:15 编辑
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雙向的電平轉換有振盪（Oscillation）的問題，但我看起來不像之前與遇到的狀況。振盪（Oscillation）是即便沒有訊號，也會在那邊跳個不停。僅給樓主參考！
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I2C 沒辦法完全拉到低電平，以前遇到的是沒放上拉電阻（Pull-Up Resistor），但 TXS0102 已經有內置 10KΩ 上拉電阻（Pull-Up Resistor），所以排除這種可能。+ I2 b! X5 N: p
4 A' j* H% V& |! n; U. O" w) R4 E, k另一個推測就是芯片還在推挽（Push-Pull）模式，沒設在開漏極（Open-Drain），拉低時和低端的 MOS 管內阻分壓，所以到不了低電平。$ \- z% I4 g0 G& C
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TI recommends careful PCB layout practices with short PCB trace lengths to avoid excessive capacitive loading and to ensure that proper O.S. triggering takes place. PCB signal trace-lengths should be kept short enough such that the round trip delay of any reflection is less than the one-shot duration. This improves signal integrity by ensuring that any reflection sees a low impedance at the driver. The O.S. circuits have been designed to stay on for approximately 30 ns. The maximum capacitance of the lumped load that can be driven also depends directly on the one-shot duration. With very heavy capacitive loads, the one-shot can time-out before the signal is driven fully to the positive rail. The O.S. duration has been set to best optimize trade-offs between dynamic ICC, load driving capability, and maximum bit-rate considerations. Both PCB trace length and connectors add to the capacitance that the TXS0102 device output sees, so it is recommended that this lumped-load capacitancebe considered to avoid O.S. retriggering, bus contention, output signal oscillations, or other adverse system-level affects.
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楼主
发表于 2026-3-2 09:09
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发表于 2026-3-2 09:50