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Hotfix中只需要安装最新的版本即可。 S! \$ D% C6 c7 Q* M6 |5 S
Hotfix024对以下项目做了修正：
* o) \5 \" W, H& dDATE: 06-20-2012 HOTFIX VERSION: 024
( y5 O& u+ E/ G, M) s- O: q3 h===================================================================================================================================
& E, U d3 u* a! [9 OCCRID PRODUCT PRODUCTLEVEL2 TITLE% J4 Z" }2 G8 t$ x! x( d3 u
===================================================================================================================================
6 ]' E/ k4 C- c. y# g982824 ALLEGRO_EDITOR OTHER Import placement fails with a zero length log file.
+ K4 n( \& I2 z( C6 [1006437 SIP_LAYOUT BGA_EDITOR SCM not loading the die if dies refdes and LFnames are changed
+ }) T1 d" Y' d! D1011040 FSP PROCESS Feature to avoid connectivity between fixed voltage Output and variable voltage Input F7 n/ A" u$ X5 O
1012985 ALLEGRO_EDITOR DATABASE Allegro crashes multiple times a day
1 T) O1 Z) p0 P# ]1013644 ALLEGRO_EDITOR SHAPE Sliding trace with oops creates a duplicate shape islands6 U; |4 k( I% m1 Z0 h3 w6 v
1014351 ALLEGRO_EDITOR OTHER Whenever we open a file (brd, dra) in PCB Editor with an OrCAD PCB Designer license,we get a warning SPMH0D-347 E, U# F: P& M9 O/ C1 u
1014893 CONSTRAINT_MGR OTHER With CM open layout is extremely slow and Allegro crashes very frequently4 I5 F, U4 V1 A! A3 g
1015210 ALLEGRO_EDITOR DRC_CONSTR Deleting Via from an array casues DRC errors- M) [3 @+ |+ G
1016546 CONCEPT_HDL CONSTRAINT_MGR Wrong value of NET_PYSICAL _SPACING_TYPE in Attribute form
3 i) u: @- u. T! ^+ X! I1016932 RF_PCB DISCRETE_LIBX_2A Incorrect Symbol Pin Numbers after import into ADS% y; a: c+ j" P" N+ J" e
1017332 APD VIA_STRUCTURE Refreshing Via Structures results in shorting to power plane." q; M T4 G x: K" m' {1 S' P
1017931 ALLEGRO_EDITOR OTHER IPF import fails with error-IPF error : Illegal pen number
P; b- x7 m1 {" |9 I5 C* n1018413 F2B PACKAGERXL Export Physical producing different results depending on how it is launched9 {" _1 c- J5 E; L9 @, u8 M3 m$ u
1018435 APD OTHER Oblong pads in Sip are not displayed correctly in the Stream_out .sf file.
, n5 {. M5 T# l( o+ U: U1018936 ALLEGRO_EDITOR OTHER unexpexted DRC eror
( M: h* x1 O$ K/ z6 m8 `5 ?/ _1018978 ALLEGRO_EDITOR DRC_CONSTR Update DRC changes DRC without any change in design1 l. S5 \6 v' H, R. M) n9 ^5 \
1019303 CONCEPT_HDL INFRA DEHDL custom outport displays error
$ l2 o+ S2 k" L7 H" s$ @1019913 ALLEGRO_EDITOR DATABASE BUG:Bottom pins are also shown in DXF export/ o6 v2 _. M0 ^- ]$ e
1019955 ALLEGRO_EDITOR SKILL axlRegionCreate and axlRegionAdd do not work in a symbol file.
7 S: M/ q2 q/ G8 h, B1020749 ALLEGRO_EDITOR DATABASE 16.2 Parts not updating when opened in a 16.5 database9 m1 x# a1 u6 j9 p
1020780 APD COLOR APD crash on assigning color to net using Color192
$ j' j6 c, s3 }; G6 U1021033 CONCEPT_HDL CONSTRAINT_MGR Cleared ecsets in 16.3 reappears as mapping errors without ecset names after uprev to 16.5 |
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发表于 2012-6-23 10:23
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