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*pads-ECO-V9.1-METRIC*9 E% _: p4 R6 y9 c; Z- R g
*REMARK* old file: d:\PADS Projects\padsnet.asc
2 J \, Q% B0 K*REMARK* new file: d:\PADS Projects\ppcbnet.asc2 P0 _% w$ v9 ~
*REMARK* created by ECOGEN (Version 6.4v) on 2010-2-11 18:08:34
& j5 @1 h+ V' w. ]' `& JPART DIFFERENCES% y) y1 M. |4 N( e7 P0 s* f2 n3 z; a/ V
---------------- P- T6 a! B) S; n
Schematic PCB
! T" \3 V% d6 b+ v' tRef-des Part-type ecal Ref-des Part-type ecal
! k c1 k+ D$ D) }NET DIFFERENCES
, G$ M! P6 a1 d2 v# n G* r----------------" O& |0 C2 J2 X" @
Schematic PCB
) r# E8 R r. J% x3 a4 ^) H: T0 QSWAPPED GATE DIFFERENCES5 s. F Q* S! G- _( R0 Y1 u: L% q
------------------------
, A" c- x/ b+ w, \Schematic PCB
! _6 U; M. S: J$ v% iSWAPPED PIN DIFFERENCES
. K% I: e" K2 x" X3 k------------------------
0 _0 h7 b$ o& n: G; J) wSchematic PCB- d* m. A% V& V. d
. [; {' s% H9 U$ fUNMATCHED NET PINS IN Schematic7 }' [' l, U' l. Q
-------------------------------; [' X+ w1 s8 Q, [0 y$ z- }6 u9 }
UNMATCHED NET PINS IN PCB; [: ^% M5 A! E3 ]9 }
-------------------------9 B! F' P' T' z$ d5 ?" y, `& N
ATTRIBUTE DIFFERENCES
7 z+ H3 t0 M1 n1 ~ P---------------------
% U- F; ~( v) V8 o3 r! \Attribute Level [ Schematic Parent -> PCB Parent ]% x3 }& z! w7 c( O& x0 w3 K$ o
Attribute Name Schematic Value PCB Value! N4 H1 b. u) s9 I! e' i
RULES DIFFERENCES (Values in mm)
* y$ D& _2 c6 l5 t* _8 h-----------------, y# D: ^4 D$ H* P% j; W5 E
Object Type Object Name [ Schematic -> PCB ] Rule Type; j3 Z# e( \. z
Rule Name Schematic Value PCB Value
* b, D) e4 ?/ t5 l7 b- l% t/ D! _NET BATT CLEARANCE; a4 Q3 J- @: u+ c
TRACK_TO_TRACK <no rule> 0.152400) O q# P6 f! y
VIA_TO_TRACK <no rule> 0.152400
6 ^3 m. T4 v2 j VIA_TO_VIA <no rule> 0.1524005 F! N U1 c% J* F- _6 G% e3 O4 m
PAD_TO_TRACK <no rule> 0.152400
/ T [3 [1 j1 d2 V( P) J$ f PAD_TO_VIA <no rule> 0.152400) T" U! B$ a" J+ ~! t
PAD_TO_PAD <no rule> 0.152400
. Q" r/ z9 F/ @; d% u6 [$ e SMD_TO_TRACK <no rule> 0.152400! l! ]8 s# c P; R3 V
SMD_TO_VIA <no rule> 0.152400 t) P6 G( x7 a6 V1 m
SMD_TO_PAD <no rule> 0.152400& {- W/ o" O7 ?# r; z( o9 h
SMD_TO_SMD <no rule> 0.152400* a1 d8 ?, x! z! Q% M8 d
COPPER_TO_TRACK <no rule> 0.254000
& X- n O2 O+ i0 c$ J COPPER_TO_VIA <no rule> 0.254000
, C# c' F0 ~: |( I } [7 Q COPPER_TO_PAD <no rule> 0.2540000 D6 T9 P0 C1 |: J, N
COPPER_TO_SMD <no rule> 0.254000& d4 x {$ k( F$ j# U8 I
COPPER_TO_COPPER <no rule> 0.254000. N% M* Q9 v* Y& l i7 j
TEXT_TO_TRACK <no rule> 0.152400
- T2 W2 n/ ^! p8 `. f& \ TEXT_TO_VIA <no rule> 0.152400$ _9 e' q( u! n k
TEXT_TO_PAD <no rule> 0.152400
& L, y9 L; b" G, R TEXT_TO_SMD <no rule> 0.152400
) V% I+ l. I; K6 b9 V: L2 p9 Z- Q OUTLINE_TO_TRACK <no rule> 0.254000
! `' G G. O1 w( I7 D OUTLINE_TO_VIA <no rule> 0.254000 |
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