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本帖最后由 linguohua 于 2019-5-30 06:43 编辑
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Fixed CCRs: SPB 17.2 HF055
" m( I0 F, m/ C; k, ?& ?; Y' O05-24-2019
* s( F3 L3 W& s R========================================================================================================================================================
2 f' Q& S! d7 J5 jCCRID Product ProductLevel2 Title
3 ]& w3 D( e* e: R8 X1 x* F) e1 h========================================================================================================================================================! S6 t5 N8 Q6 R5 g" J
2078057 ADW PART_BROWSER Symbol Graphics preview is not available in the Designer Server
' k* v& e- p6 ?. j" L2092863 ADW PART_BROWSER Component Browser is not displaying the symbol & footprint preview
' e& C6 C7 y. o7 L/ X0 r2076339 ALLEGRO_EDITOR 3D_CANVAS Floating parts on bending a board in 3D Canvas with HotFix 053
! y1 B+ K& _; l: X: b2051075 ALLEGRO_EDITOR ARTWORK Incorrect Gerber import in Allegro PCB Editor
0 l7 E. K. g/ e$ f) M3 h: W! R2073407 ALLEGRO_EDITOR DATABASE axlDeleteByLayer deletes fixed shapes" Q! E I3 U- j# C8 x
2079117 ALLEGRO_EDITOR DATABASE Release 17.2-2016: Board file saved in HotFix 049 cannot be opened in HotFix 014$ m$ n5 P! R( @7 i+ \1 p
2079204 ALLEGRO_EDITOR DFM Enabling option to update analysis mode and run DesignTrue DFM wizard causes PCB Editor to exit) e. E. ]7 P% Y# X$ y( c
2082394 ALLEGRO_EDITOR DRAFTING Angular dimension not owned by the same parent symbol in the layout are not deleted on moving object
9 S$ J F* G! n, c; J6 P2067916 ALLEGRO_EDITOR INTERACTIV Place replicate module bounding box does not move with circuit after module is updated8 l7 N. v2 H( T2 O: \. @0 @
2068449 ALLEGRO_EDITOR MANUFACT Stackup chart and table shift slightly from original location on re-generation in Allegro PCB Editor release 17.2-2016
8 g6 \3 M% Y& r, t. {; t! r6 Y2065820 ALLEGRO_EDITOR MCAD_COLLAB Selected objects deleted from the design on clicking Cancel in IDX Flow Manager Import
( z# ]3 b/ U5 j+ Z2080164 ALLEGRO_EDITOR MCAD_COLLAB IDX outputs two sets of masks
8 {" L; K1 t- `# y2081955 ALLEGRO_EDITOR NC Artwork file error for via size
8 i) z" J5 B6 a2045061 ALLEGRO_EDITOR PLACEMENT Setting PSMPATH: axlSetVariableFile() does not update Place Manual but User Preference Editor does! k( l) n# \" ]; |
2049949 ALLEGRO_EDITOR PLACEMENT Get import errors and cannot place some parts if user-defined option is turned on for netlist import
3 E. a; x2 S0 J' |3 k) Y2069289 ALLEGRO_EDITOR PLACEMENT Cannot place part because attribute definitions are incompatible for the 'DESCRIPTION' attribute (SPMHDB-154)4 \* w* V+ r8 g% s) N9 _6 C; b
2056573 ALLEGRO_EDITOR SCHEM_FTB Import Logic takes a long time when checks are turned on
- g3 k, l8 K6 E' z2076452 ALLEGRO_EDITOR SHAPE Shape Degassing crashes if 'Inside Shape' is selected
# P% N: u0 O% D3 M/ ^5 w! \2076873 ALLEGRO_EDITOR SHAPE Symbol Editor stops responding on editing shape with a .dra file _& l2 p0 O* e, z; E6 Q
1788703 ALLEGRO_EDITOR SKILL axlPadSuppressSet does not work when 'none' switch is used* B8 Y4 J5 ?% o3 ?2 O- o
1955127 ALLEGRO_EDITOR SKILL axlPadSuppressSet( 'off 'none ) returns a warning message and does not work per the documentation1 f$ c6 B2 U7 p0 K. S
2031711 ALLEGRO_EDITOR SKILL Syntax error related to allegro.ini shown if allegro.ilinit loads INI on startup5 u0 |7 ^/ M |% r' T$ X5 Z1 G
2062527 ALLEGRO_EDITOR SRM RF elements are shown in Symbol Revision Manager0 {& U! ]) e0 S u) p& r2 K
2074249 ALLEGRO_EDITOR TESTPREP Testprep re-sequence causes PCB Editor to crash if 'Labels with Net Name' is selected+ Y! H4 W- x( f) R( g( U3 M) g; d
2070534 ALLEGRO_PROD_TOOLB CORE Productivity Toolbox bar code generator is creating corrupted shapes in the database5 l: ~9 P4 s9 m! H
2046278 ALTM_TRANSLATOR CAPTURE Third-party import fails- c: a" v0 V& i4 Z# ]# p7 H4 D* E
2052399 ALTM_TRANSLATOR CAPTURE Third-party CAD translation stopped with error message; o- M* a9 d V6 q1 \. ?9 A# q; K
2005087 ALTM_TRANSLATOR DE_HDL Cannot translate third-party to Allegro Design Entry HDL
3 t$ O2 X: d: B$ H! w& m# N! S1922222 ALTM_TRANSLATOR PCB_EDITOR Third-party translation converts to board with unconnected nets
9 e% d+ M$ I w2 C4 L1987263 ALTM_TRANSLATOR PCB_EDITOR Third-party board file: copper not imported4 Z8 ]7 p5 G7 E' d
2017988 ALTM_TRANSLATOR PCB_EDITOR Third-party to Allegro PCB Editor import issues with routes, constraints, size, and accuracy
& B8 o C+ d- E( c2021300 ALTM_TRANSLATOR PCB_EDITOR Third-party translator does not show any results on PCB Editor canvas
9 @9 n/ t, U) O( b8 p6 A1890675 APD DIE_EDITOR Mirror Geometry is Mirroring the symbol from TOP to BOTTOM Layer in SIP file
9 D6 a- K" I8 G" {& i2064219 APD DIE_EDITOR Applying mirror geometry results in mirroring: moved from TOP to BOTTOM layer
6 Z( Q% ]7 u2 O$ W/ W# ]2086574 APD OTHER Duplicate layer text shown on the vias
2 g1 x& C1 [' B8 z& J5 U1948169 CIS CONFIGURATION Auto Symbol Refresh Checking not working for shared folders% ?, H" R [) t5 V, d
2025385 CONCEPT_HDL CORE Hierarchy Viewer expands/collapses randomly after clicking the '+' or '-' symbols* v3 H8 o3 D* p. e" a& Y$ X5 d
2050010 CONCEPT_HDL CORE Copyproject does not properly copy the variant files
( [& N @% ^( i- W! ~$ \2063457 CONCEPT_HDL CORE DE-HDL: very slow rendering on some systems
2 a/ k6 J1 C/ a* G M! ] \9 |2076312 CONCEPT_HDL CORE Getting 'Variant out of sync' warning when creating BOM for a design with no variants" e7 l& r: g# X) z6 Q4 ]' m
2083650 CONCEPT_HDL CORE Lower-level signals are appended with _1, _2, and so on4 v! [9 G% |$ h4 j5 i1 w' k
2083651 CONCEPT_HDL CORE The physical net names still do not sync with the assigned signal name" b* K8 O8 D& U: B ~0 X
2056736 CONCEPT_HDL GLOBALCHANGE Global Property Delete does not operate on the entire design unless the top-level page 1 is open" h) r1 u; {0 ~, ~
1955357 SIG_EXPLORER OTHER Signal explorer invocation with OrCAD PCB Expert Suite license( Z% V! D: N7 }) |9 `6 U m
2079071 SIP_LAYOUT SYMB_EDIT_APP Response very slow after Show IC Details on a very large co-design die
* g( b5 E. ? r$ A& _6 F2081884 SYSTEM_CAPTURE CANVAS_EDIT Symbols take a long time to move, and results in DRCs and broken connections
1 Q( _* N o. i% G) h" j1942542 SYSTEM_CAPTURE IMPORT_PCB System Capture - TDO backannotation overwrites net names with stale data in lower-level blocks. L9 _! g& u$ S r9 |. P! f/ J
2071303 SYSTEM_CAPTURE MISCELLANEOUS cds.lib file is picked up from wrong location
; H! D, ^, @# n2058979 SYSTEM_CAPTURE OPEN_CLOSE_PR System Capture prevents a project from opening by putting a single quote at the end of a line in CPM file
0 a8 u: t; ?* n5 g- B* |6 O" U2088210 SYSTEM_CAPTURE OPEN_CLOSE_PR The 'enable pspice' entry in CPM file is occasionally corrupted3 Y6 K/ q. [0 |; r
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发表于 2019-5-30 02:15
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