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本帖最后由 zgyzgy 于 2015-7-22 23:17 编辑 , {' L4 z" \& l0 x( Q: c
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DATE: 07-16-2015 HOTFIX VERSION: 053
% F+ r( n2 _1 H9 Z1 ]+ F/ N=================================================================================================================================== e; L7 f" R$ {2 k; P' R
CCRID PRODUCT PRODUCTLEVEL2 TITLE
3 Z) P' l$ C" N' p# u===================================================================================================================================
% a1 ~% e0 O$ Z( M1 V' ~1045706 SIP_LAYOUT INTERACTIVE Enhance the Split Via command to be able to split a stacked via into multiple vias. [# p( P( }# k1 S5 S9 T
1356381 allegro_EDITOR INTERFACE_DESIGN PCB Editor hangs when adding net to a net group5 O8 S' @6 b5 ?1 m5 I
1416250 concept_HDL CORE Save hierarchy from TDO crashes DesignEntryHDL0 ?. O+ ?( ^6 ^) T7 q1 {
1424166 ALLEGRO_EDITOR SHAPE Dynamic shapes will not fill using the zcopy command
% O0 p7 h' K: y. k' t8 v6 i" S1424853 ALLEGRO_EDITOR INTERFACES Error message "Failed to add (LW)POLYLINE" when importing DXF file into PCB Editor
5 M6 ?8 g6 B2 ^ |1426668 ALLEGRO_EDITOR DRC_CONSTR Require shape DRCs with route keepout
- I' L7 e6 S. y5 q% `4 J+ ~1427168 F2B DESIGNVARI Variant directives don't get created in CPM while creating variants4 f. M" x) J. y' b
1427481 PCB_LIBRARIAN IMPORT_TEXT To enhance the import txt file in the PDV p; B0 N- @' F* Q1 W8 J! o1 m
1428336 PCB_LIBRARIAN CORE Symbol Pin Property Attributes not editable with HF49
( K/ H5 W/ }' i+ f1430405 ALLEGRO_EDITOR MANUFACT Running Export - IPC-2581: The exported .xml data does not contain the Probe figures or the probe information
" Q S! x# t5 B6 J. w- }1431570 PCB_LIBRARIAN VERIFICATION PDV con2con should read additional properties like NC_PINS from part_table view independant on PACK_TYPE- Q) X0 v, y6 S5 ^5 t3 `' W
1431591 ADW LRM LRM should be able to Autofix the parts with $PART_NUMBER even if the SYNC_PROPERTIES has a value of PART_NUMBER) N( o0 m: p8 X) o2 q6 `5 W5 a' n
1431875 APD EDIT_ETCH When trying to multi-route a group of nets, APD crashes with the .SAV error.
t: d& G0 X3 g/ u9 w% x! g( A1434375 ALLEGRO_EDITOR INTERFACES Running Export - IPC-2581: The last or largest pin in a series of pins listed in pinOneCfg.txt is selected
/ K. s# ]: {% K7 L* B! A7 o1434975 ALLEGRO_EDITOR MANUFACT Running Testprep > Manual causes Allegro PCB Editor to crash
$ p8 \- J9 F: \/ f* F8 [1435685 F2B PACKAGERXL Export Physical indicates 36 errors are found during backannotation, but the backannotate.log file contains no errors5 }' l" r; |+ F% f
1436206 SIP_LAYOUT ASSY_RULE_CHECK Ignore shapes autogenerated by the crosshatch void fill routine in the acute angle shape boundary ADRC check8 P$ {3 r6 m& L2 ?% `" p; J
1436699 CONCEPT_HDL INTERFACE_DESIGN model assignment not working if signal_model exists within a block0 A7 O0 E' j. y; c* a% G* v
1436989 ALLEGRO_EDITOR OTHER PCB Editor crashes after pouring copper planes
, ^) W T* m; {+ {" q1437150 APD DIE_GENERATOR Creating a die using the Compose from Geometry command gives error, "E-(SPMHA1-70): Pin is outside of the extents"
7 V* O9 t0 S2 S/ w" O8 r8 l1437287 CONCEPT_HDL CHECKPLUS CheckPlus Segmentation Fault in LINUX- j% [$ W c/ X; G0 i
1437560 ALLEGRO_EDITOR OTHER APD crashes when running gloss with dielectric generation for the given testcase.3 r7 y9 o% W5 d: P1 E6 Z
1437565 F2B DESIGNVARI Variant Hier BOM report puts Block DNI in wrong report section
/ [2 q& C1 I1 t1437725 APD EDIT_ETCH Route > Slide exhibits erratic behavior on differential pairs3 C/ F2 N5 @/ r& Z4 h6 f" M D
1437748 SIP_LAYOUT INTERACTIVE Allegro Editor and APD have the command opengl report defined in the menu. Please add this to the SIP menu structure
1 e5 I4 ]8 ]" s, J( l1438933 CONCEPT_HDL CONSTRAINT_MGR Model Defined Differential Objects are named differently. d) P& Q$ N1 q! l, P
1439104 ASI_SI SPDIF SPDIF popup window' i9 { d# K" d o
1439574 CONCEPT_HDL CORE How do you rotate groups of objects in windows mode?* d8 H0 N# ]+ I) ?8 `4 `: q
1440393 ALLEGRO_EDITOR INTERFACES Ability to extract STEP properties from DRA requested
& \4 {# `3 c: k! c$ u- U0 |1440589 ALLEGRO_EDITOR DATABASE Edit - Change crashes the database with errors.
' ~: D8 L) h8 \! j @1441665 CONCEPT_HDL CORE Property not annotated visible as set in ppt_optionset.dat
2 y s) ? L* n1 b: p# j1441672 SIP_LAYOUT ASSY_RULE_CHECK ADRC Hangs and does not close0 W7 [/ ?5 v% c
1441724 SIP_LAYOUT PLATING_BAR Need to be able to set the Plating Bar Width.' K# F7 Z5 z9 o# N# V8 v/ l
1442144 ALLEGRO_EDITOR SCRIPTS PCB Editor crashes when replaying script- I2 R1 A* U& S4 H
1442798 ALLEGRO_EDITOR DATABASE PCB Editor crashes when running dbdoctor
3 u, Y4 v% [6 w7 a- p+ Z) \* R1443693 ALLEGRO_EDITOR SCRIPTS Change Accelerator keys for new orcad shape Menu2 P+ x: A3 [' @( z) ?& X
1443738 F2B DESIGNVARI Automatically exclude Nets or Ground Symbols from the Group while adding to Variant
& C4 L3 A( a2 ]- p8 T1444066 CONCEPT_HDL CORE Replace parts in variant view crash DEHDL if cpm library list contains nonexisting libraries.
- k$ v# _1 ?1 f1444076 CONCEPT_HDL CORE Replacing parts in variants backannotates ALL injected properties in variant view( p6 q9 N" `" \9 X/ r
1444676 ALLEGRO_EDITOR SCRIPTS difference in PCB Editor and OrCAD PCB Editor menus in Hotfix 51
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/ S" K+ g& Q' ?- L$ ?, j下载链接：http://pan.baidu.com/s/1pJoUvtp3 ]& w; D# I4 }" h0 ?! E4 V
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发表于 2015-7-22 23:15
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