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一个DDR时钟差分线设置为T型走线,但是连上线后,出现DRC错误。! F0 }# |- Q. d+ W0 C& v
请教一下,是哪里出错了呢,正确的走线方式又是怎么样的呢?6 n; _2 i1 B, x9 ^7 Z7 S/ @
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错误如下:& l8 \& l% i/ f* G
LISTING: 1 element(s)4 R! f' p8 J' N
% {' P, b! |! a, d1 V& c; N, z: x
< DRC ERROR >- w4 T+ c& o8 ] k( q. S, g2 G
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Class: DRC ERROR CLASS. e: n9 |! [( i; ]
Subclass: ALL
. Z( h! T2 _: R, C+ ]8 I. C: T Origin xy: (-772.35 1153.00)9 m3 g" z) y p( j9 ^+ T
Constraint: Net Schedule Topology. W) Y4 F0 ?6 `
Constraint Set: ECS2
+ U) c8 [, [$ n K8 z# ], E Constraint Type: NET ELECTRICAL CONSTRAINTS
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Constraint value: VERIFY
3 v: F7 g. R9 o0 G8 B& E% ^ u2 X Actual value: DOES NOT VERIFY" {' w9 W9 a B8 O3 O& y; X: [
8 P' X4 y* O% u( c' C5 M8 W7 Y; b i - - - - - - - - - - - - - - - - - - - -; e- Q. \* F% n2 f" |
Element type: SYMBOL PIN
6 p ^% ^$ o: S5 U R# B) \ Class: PIN8 _9 a# D; F& C) A) @ t% t* K
9 |0 w, N: w( f" G7 R PIN: C254.1$ @+ _0 q5 T& ?. c: U8 o
pinuse: UNSPEC- [1 e Z/ O3 t* [
location-xy: (-772.35 1153.00)
' Z, M) U# t& p5 f2 q% {2 B$ W part of net name: DSCK#
/ O3 V! B9 x' G+ k( S - - - - - - - - - - - - - - - - - - - -
1 b6 ^! u! H* q2 j8 M+ [4 M Element type: RATSNEST TPOINT
* \; {4 A# S/ v l8 y( n3 [& i7 T/ W# j Class: DRC ERROR CLASS, r& \, H1 @7 Y
Subclass: TOP) k0 W8 P7 @) v }2 i5 r t
0 w- ~ a5 T* N& Y( R Name: DSCK#.T.1
' _0 J+ L% a' B
& f; j7 O& A2 r1 c8 e* b (-745.00 970.00)
$ U0 U* V, M O7 k$ h7 J2 M$ p1 g9 ]3 B" _/ M8 _
- - - - - - - - - - - - - - - - - - - -0 z3 `0 p& m' n. {, x
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