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一个DDR时钟差分线设置为T型走线,但是连上线后,出现DRC错误。! G# a: S( H1 l4 ?/ m6 c: ^
请教一下,是哪里出错了呢,正确的走线方式又是怎么样的呢?3 Y9 G( w! R( ~# @9 y6 V: n5 X
% @1 k: G3 Q9 |$ R! }) [, E错误如下:
0 o0 F5 I7 B0 v0 TLISTING: 1 element(s)0 H! h) y8 m7 Y2 N3 [& Z
9 q( H: I+ m" Q3 ~; Z < DRC ERROR >
( i+ |! |$ G5 U" j
\4 b0 `8 I& { Class: DRC ERROR CLASS6 s( P: l# Y! T/ D- u) \
Subclass: ALL
2 Y W* L* c% `& d5 d6 ] [6 u Origin xy: (-772.35 1153.00)
; D2 Y) U! l$ l4 d. V( b. S P( P% b4 ? Constraint: Net Schedule Topology
0 R. a" B u# _- B- P# z* i Constraint Set: ECS2
* t* l; r6 U7 `! D- { Constraint Type: NET ELECTRICAL CONSTRAINTS6 Y* u# |0 E7 v( C
' E9 ~3 M7 n4 d( v2 e* a Constraint value: VERIFY
4 q/ U+ o6 z* U2 P# Y Actual value: DOES NOT VERIFY& a, Y! a6 D3 ~# |
" H: T! ^# i+ e+ y, W# @7 [4 T# R - - - - - - - - - - - - - - - - - - - -6 @+ {+ Z2 M, E; C* o+ T& U. L
Element type: SYMBOL PIN( P( H3 `* y* t) y
Class: PIN
2 m) ` x8 \( _' r9 A
: E H7 P5 d2 y4 x" J% z$ r PIN: C254.1) L* v$ x# U: P
pinuse: UNSPEC6 _" K7 S) ?; F3 [/ @# z9 B
location-xy: (-772.35 1153.00)
; @7 @+ G1 U' m part of net name: DSCK#
% j" I, S) u4 h, Y - - - - - - - - - - - - - - - - - - - -$ N& ]; q5 W9 k' m+ n$ j: p
Element type: RATSNEST TPOINT% i" d. ]0 v. m. b) K% l+ v
Class: DRC ERROR CLASS
9 t4 T" \. ?: m7 a N Subclass: TOP
, { Z3 X' }( D
' d3 O9 l; N/ A& z, L; y Name: DSCK#.T.1; e y1 Z3 ]' H4 b- y
& ~5 l6 Q, Y! \3 O1 E, b( G f, c ~ (-745.00 970.00): C& } I1 M' x I( X
$ L! o+ m! s/ m, C3 F+ i% k5 B - - - - - - - - - - - - - - - - - - - -
/ D' J) [8 Q, C" ?
7 t. L( Q$ K' Y5 \; @0 N
, Q! ^2 k, y% P" z. H7 I |
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