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一个DDR时钟差分线设置为T型走线,但是连上线后,出现DRC错误。; i! m" p% |+ ? c
请教一下,是哪里出错了呢,正确的走线方式又是怎么样的呢?- }/ R R4 y% O, l/ h; \
$ y5 m) A' y8 O错误如下:
, J- F/ J+ t4 n4 F! N; \7 d( tLISTING: 1 element(s)
8 x# o; s! M( J. a( ]9 n' f) E3 J3 e
< DRC ERROR >4 O& l" r& g; ]; w5 d1 g* O
8 e* R K: Z' e8 j) j9 Y, d' L Class: DRC ERROR CLASS7 C% N- C; j, e$ ~1 H4 I6 m) z
Subclass: ALL" v9 D1 s' M# r9 {0 E* ]" m
Origin xy: (-772.35 1153.00)
, X" z4 }" p6 m* L. m Constraint: Net Schedule Topology
1 E% {2 u) I W" \ Constraint Set: ECS2$ E* b1 q2 [. a
Constraint Type: NET ELECTRICAL CONSTRAINTS4 \( V1 _ z6 c# Q, d
! z& H1 }# f8 b% z) d: d5 w
Constraint value: VERIFY
4 m" ?$ I1 Y4 R$ h+ N Actual value: DOES NOT VERIFY
1 x0 m) e0 |8 m! Q) g4 V7 W; {6 W/ U1 x7 Y* y
- - - - - - - - - - - - - - - - - - - -
8 M7 g! x" G6 C! Y& F; l* d3 w+ v Element type: SYMBOL PIN
2 h6 D8 X1 g, B7 a) m! } Class: PIN
' L- y8 A! p( `# v/ }8 Y
7 O, Q# B0 T7 Y! ~ c PIN: C254.1
8 s& |# |" c$ Q# g& |2 b2 U) o pinuse: UNSPEC
# @6 g1 J0 a0 s location-xy: (-772.35 1153.00)
1 o8 L$ ]1 u- w3 q part of net name: DSCK#) Y1 u8 R6 C, z1 z8 n& n6 N, q: A/ \
- - - - - - - - - - - - - - - - - - - -
% T! \: H9 M L3 Z# M: O Element type: RATSNEST TPOINT6 h- c# z: B1 C7 h4 z
Class: DRC ERROR CLASS4 s0 I$ a0 @& b7 k& f1 f
Subclass: TOP, v0 P3 u% A1 `
" Q6 ^3 [3 m5 Y Name: DSCK#.T.14 `, j3 J6 v/ X) e+ e. @. i, s
" l( x8 `: b/ l8 {7 P/ z (-745.00 970.00)
; m4 Z) j* o7 ?
' d8 ^4 l( f3 W$ o* \ - - - - - - - - - - - - - - - - - - - -/ }1 R5 K; K+ R; J: W
! z( G9 r/ w$ R+ ~4 q/ }. h* J
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