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发表于 2012-12-18 09:10
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2 I( {1 l6 B f7 u1 h7 LDATE: 12-7-2012 HOTFIX VERSION: 035. Z l `7 S0 Q2 z5 a
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
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8 o$ n$ L& r" Z, B2 ^! }825813 CONCEPT_HDL CORE HDL crashes when copying a property from one H block to other1 K8 q* i# i( [3 {2 K5 `9 W1 l
871899 CONCEPT_HDL CORE 'Multiple:' column of Grid window in DE-HDL option is too wide
& b4 ]8 }6 J# h& t' ?873917 CONCEPT_HDL CORE Markers dialog is not refreshed* w9 A5 i$ N. X9 |3 ?
887887 CONCEPT_HDL CORE Option to find unconnected Pins/Nets with DEHDL L License
3 {( F5 W4 k* _892857 CONCEPT_HDL CORE packager treats R? as a unique reference designator
( w* H& f p# b1 q. H' T995011 ALLEGRO_EDITOR INTERACTIV Why Snap to option for Arc / Circle Centre is not working in this symbol file
% m2 \' }! l, B3 Y+ a1045863 CONCEPT_HDL INFRA Customer had the crash several times when they run script with SPB16.51.& r, C% Z1 {- T: D* k. C
1061529 CONCEPT_HDL CORE Space can be included in LOCATION value and cannot be checked by checkplus% X, s H( L2 W( W3 x. c p4 l( e
1063924 CONCEPT_HDL CONSTRAINT_MGR Highlight the net between DE-HDL 16.5 and Constraint Manager.7 z4 ?5 i1 G7 X
1064035 CONCEPT_HDL COMP_BROWSER Component Browser crashes on part number search using a library containing >23K parts8 j# C6 r9 m( |9 H0 m
1067339 CONSTRAINT_MGR ANALYSIS Relative Propagation Delay analysis in the Partition file seems very inconsitent.& p+ ?9 C! w8 ?% S# o
1067400 CONCEPT_HDL CORE ERROR(SPCOCD-171): Port exists in symbol but not in the schematic
( F2 C$ `+ Y" u! m7 @/ a8 H1067451 CONSTRAINT_MGR CONCEPT_HDL ERROR(SPCOPK-1053): Cannot find a ppt part that matches the instance( r$ N" K) y. Z
1068878 CONCEPT_HDL CORE Rotating symbol causes the pin name to be upside down
M' S, X& p' U" E( q1070007 ALLEGRO_EDITOR PLOTTING Export IPF omits drill figure characters for backdrill holes
& Z3 t' o. t% v1071352 ALLEGRO_EDITOR UI_FORMS Via label display option doesn't remain selected1 b' B M9 {- P' V$ |, o% w# b
1072067 APD EXTRACT When expoting using Extracta oblong pads with anyangle are abnormal
0 j* W2 ]2 p1 X( l: b6 [* \1072342 ALLEGRO_EDITOR INTERACTIV Snap to Arc/circle center does not snap to the exact center in move command when moved about the symbol origin. f6 [! t) ^* _# s: t8 o
1072691 CONCEPT_HDL CORE Customer has the crash from Run Script of DE-HDL 16.51 again(#3)
v9 o/ @* N8 t! Z! |1072843 ALLEGRO_EDITOR PLACEMENT The move command that was present in the right mouse pop up menu during manual placement is missing in 16.5+ H6 C2 q; U* [6 R- A! k6 Z K
1072859 SIP_LAYOUT DIE_EDITOR padstack selection window crash from Die Editing: Component editing of Co-Design Die
7 J0 C& l* Q0 i1 F k0 M1073745 CONCEPT_HDL CORE Import design fails
; o# J8 r6 [: V( Q6 |, ^- W: r1073852 ALLEGRO_EDITOR INTERACTIV While doing a Copy Via use the last 'Copy Origin'% D0 y$ e! f7 h3 L$ T
1074791 CONCEPT_HDL HDLDIRECT User gets port exists in schematic but not on symbol message even though the port does not exist9 J! k! ], n' B* m1 L
1075151 ALLEGRO_EDITOR SHAPE Cannot change global shape parameter back to thermal width oversize after having used fixed thermal/ @+ e+ }4 D6 L. G
1075256 ALLEGRO_EDITOR OTHER Import > IPF in 16.5 is dropping data.9 h$ b. t/ f2 G. ]: }+ ^% Z
1075587 CONCEPT_HDL PAGE_MGMT Unable to insert page in schematic
- R2 A/ w; L* z8 `) E+ @1 B7 l7 n1075622 CONCEPT_HDL CORE PDV Edit Symbol in DE-HDL all editing functions disabled since Hotfix 33
9 I8 L8 r- d; C! Q: f( p5 T5 _0 A4 N1075964 ALLEGRO_EDITOR SHAPE Shape voiding is not consistent in conjunction with odd angle and arc traces
# B9 l7 e U( Q; ^1 j3 Z$ A X1076086 SIP_LAYOUT IMPORT_DATA missing wirebond after import SPD2
/ Z7 y0 r8 h* a% k2 [/ B1 g1076117 PSPICE PROBE Copy & Paste text/label in probe window changes font size and later gets invisible' C; S- g" J; m+ x, Y
1076538 CONCEPT_HDL CORE Property visibility changes in attribute form not updated in schematic canvas.; R6 c3 E! h5 n3 d
1076566 ALLEGRO_EDITOR EDIT_ETCH Sliding diff pair cline that has a min/max prop rule displays the HUD meter inconsistently.
0 O2 s: G t m6 i! q3 f1076655 APD DXF_IF Dxf does not get offset value if die symbol padstack has offset value0 T% t9 r% r& {( T8 u
1076909 ALLEGRO_EDITOR DRC_CONSTR Allegro crashes while placing modules from database
1 r8 X2 n4 ~/ G! H% O8 f1077026 CIS LINK_DATABASE_PA fonts changes while linking db part in 16.5
4 q5 o ^# e4 K) [1077621 CONCEPT_HDL CORE DEHDL crashes when saving page 3
* P4 o+ J2 n" T) ?% v! J8 I1078103 CONSTRAINT_MGR OTHER Updating of Bus Group by Importing an Updated DCF file fails in first attempt and suceeds on second.
# Z7 ?8 c s9 v# D1 C4 `1078380 SCM OTHER Custom template works in Windows but not Linux
! f: C/ I. p, B8 K1078682 ALLEGRO_EDITOR DRC_CONSTR Unaccetable slowness with Slide
% b& J2 @8 A6 k- A! L, Y# l1078688 F2B PACKAGERXL ConceptHDL crash immediately after Packaging
9 J2 c8 e0 S3 U/ X Y1078700 CONSTRAINT_MGR OTHER The cmdiffutility is failing when comparing 2 different .dcf files.
3 R, r' D% N0 J% z1079068 CONCEPT_HDL CORE DE-HDL crashes on upreved design when loading specific pages and having directive SHOW_PNN_SIGNAME '# m4 x- M" t& k# s
1079400 ALLEGRO_EDITOR OTHER desired angle vs. max angle for fillet
6 e5 P/ ?. z& C4 r# \/ o# D$ d1079616 CONSTRAINT_MGR CONCEPT_HDL Packager error in 16.5 which is resolved when system is re-booted0 a' F5 d# M% f- N% \
1079778 PSPICE SIMULATOR PSpice crash with RPC Server Unavailable Message
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发表于 2012-12-17 12:51
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