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cadence SPB16.6已经推出，需要的朋友可以点击下面的链接下载：7 m; f$ D- n0 l- ~. k
dl.vmall.com/c0pxuzug1s
* w( M$ b- V0 L0 H4 p/ g. p里面有补丁Hotfix_SPB16.60.001_wint_1of1.exe4 i+ u- `* J/ T% t$ V9 x x5 t+ E
$ B' _/ {) W/ X% {DATE: 03-7-2013 HOTFIX VERSION: 005# T( i0 g" Z6 i
===================================================================================================================================, @/ @) E9 G; d% C( i7 _3 H( T
CCRID PRODUCT PRODUCTLEVEL2 TITLE
`- B, y% U0 t) y3 i===================================================================================================================================
3 J C% W, |8 `: M1067770 IXCOM-COMPILE COVERAGE Assertion failed: file ../covToggleCoverageXform.cpp, line 11022 Q+ Q) n i! \ Z2 P
1100442 allegro_EDITOR PLACEMENT Placement queue shows components whichs are already placed2 C p0 w7 H5 ]; W5 Q, N3 [
1101555 ALLEGRO_EDITOR DATABASE Allegro Crash frequently8 y6 X' M. y' a$ T
1104011 ALLEGRO_EDITOR DATABASE Place replicate move group of a modules leaves traces behind
$ F& q ^( k/ g0 {: ?1104065 SCM NETLISTER SCM 16.6 has problem generating Verilog with existing sym_1 view
1 T0 T$ A- ]+ n& K0 V1104605 F2B PACKAGERXL Pins of function swapped part in block not displayed3 ]: ]0 a/ i2 C8 h) e
1104790 SCM IMPORTS Corrupt data once SiP file is imported into SCM
5 g) C- {) G; S0 J7 i3 ~; E4 o1105066 APD IMPORT_DATA Import NA2 worked in 16.5 "035" but fails in 037 and 16.6
& [% N$ `# X% D: W. I; }+ b- c1106323 ALLEGRO_EDITOR PLACEMENT Unable to locate specific placed symbol on this board as it becomes invisible after placement.
4 n( O2 m F" h1 r: M1108032 concept_HDL CORE 'Find' option does not list all Components in the Design3 n3 O9 u2 C0 R& Z; i( s
1109080 ALLEGRO_EDITOR OTHER Window DRC is not working in orcad PCB Editor Professional |
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发表于 2013-3-15 15:12
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支持！
反对！
发表于 2013-6-29 13:29