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Fixed CCRs: SPB 17.2 HF054. M4 c* q8 P) N1 i
04-26-2019
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CCRID Product ProductLevel2 Title7 l6 i6 v$ U$ p; O1 Y6 h7 a
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' ?1 D6 F1 D: x$ E2060269 ADW DBEDITOR Unable to create ECAD type mixed-case schematic model attributes3 r# x( J/ K* _' `2 E& E
2030086 ADW LRM Cache part_table.ptf made by LRM Update cannot be read if it has null value in key property
7 l1 K- E& Z6 K' h" \1975317 ADW PART_BROWSER Space at the end of line in CDS.LIB results in zero libraries being shown in new component browser
4 F5 ?! w7 e$ k9 s0 ?2076340 ADW PART_BROWSER .helix folder needs to be deleted for PTF changes to take effect and to convert a design to cache( h5 Y1 r( q i" W9 Y! |
2025147 ADW TDO-SHAREPOIN Design Management stops responding when a board file is deleted and then checked in with the same name
& z! o7 h5 n E& W/ S6 e* F2025201 ADW TDO-SHAREPOIN Getting error message (SPDWSD-20) when logging in to team design9 e2 E4 t3 e9 x5 L6 L: F
2056694 ADW TDO-SHAREPOIN Design Management stops responding on checking in an object with the same name as a previously deleted object
Q$ a/ k) z, N2054243 ALLEGRO_EDITOR 3D_CANVAS Plating is not shown on stacked vias in 3D canvas
% [1 S9 `; u8 r' o. }( f2054327 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation- L5 Y" t' N5 k9 z; c$ ]: N% I
2044980 ALLEGRO_EDITOR ARTWORK 'Import - Artwork': PCB Editor stops responding and no artworks are loaded
6 D& _( {$ b/ Z& h( M& W$ k2060489 ALLEGRO_EDITOR COLOR SKILL axlGlobalVisibility() issue in a partition file: VIA/SOLDERMASK_TOP subclass visibility not turned off
9 ]# o4 H/ L/ S, q- c5 l. c2072695 ALLEGRO_EDITOR COLOR Clines of colored nets not colored when 'display_nohighlight_priority' is set
0 p6 [* m! N) [2061203 ALLEGRO_EDITOR CROSS_SECTION Importing cross-section from single stackup to multiple stackup adding additional layers to the primary zone
/ K+ [7 f3 V1 R4 W7 |: ?2010812 ALLEGRO_EDITOR DATABASE PCB Editor STEP model offsets should follow origin movements, [+ R* f: [6 a, j# G% e" U
2011993 ALLEGRO_EDITOR DATABASE Change STEP model mapping when Symbol Origin is changed in DRA using Setup > Change Drawing Origin: \' U* c1 a' p7 C( G
2051596 ALLEGRO_EDITOR DATABASE Error for unsupported property in element
% q# g; p! j% N! s2056497 ALLEGRO_EDITOR DATABASE Place manual is slow
0 B8 Q( s: e; d3 h2 e2059489 ALLEGRO_EDITOR DATABASE DBDOCTOR in batch mode with argument '-check_only' detects text error
- J1 y5 i1 P7 `0 K: `2064268 ALLEGRO_EDITOR DATABASE PCB Editor crashes when running SKILL code
6 f3 j* d- ~: z. f, j3 R2068588 ALLEGRO_EDITOR DATABASE Crash on opening release 16.6 design in 17.2-2016
) ?1 I' V5 X. i9 T. Y) r! p7 Q2079131 ALLEGRO_EDITOR DATABASE axlChangeNet crashes PCB Editor in fast shape mode with Microsoft Visual C++ Runtime Library Error6 z# C& N }- [) c6 g
2034759 ALLEGRO_EDITOR DFM Importing DFT constraints on board does not assign csets to design but shows the csets
& ~1 G3 r# t: r1 X+ e2039992 ALLEGRO_EDITOR DFM Cset is not set in Pastemask element of DFA when importing XML Constraint File.0 y4 X$ d ]6 W3 p0 M- k! I) i. A
2046824 ALLEGRO_EDITOR EXTRACT Extracta ECL_NETWORK View reports incorrect pin layer.
' P) L( V, k9 Q" c# z) f2048912 ALLEGRO_EDITOR IPC Running PCB Design Compare - Graphic mode reports ERROR (SPMHA1-273) 'Shape intersects with itself'- ~ u- u* q8 S4 B9 n# x" L
2066597 ALLEGRO_EDITOR IPC Graphical compare not completed because of self-intersecting shape locations% V$ A8 _! ?% R/ S' r, z2 N! O
2079719 ALLEGRO_EDITOR IPC IPC2581 import fails with error 'Failed to add (LW)POLYLINE'
8 G/ f; N7 f+ u9 a7 i2066229 ALLEGRO_EDITOR NC Tool code missing in backdrill NC file on choosing 'Optimize Drill Head Travel' in NC Drill
3 [5 w8 ^" Q* Y9 R6 `2070379 ALLEGRO_EDITOR NC After running backdrill some vias are shorted to other nets
; M$ L& y( j' F8 a6 R/ y7 g2041881 ALLEGRO_EDITOR PAD_EDITOR Difference in locations of drill in pad editor and symbol editor6 n1 ~7 r: P+ l0 ]; x0 [* X
2058852 ALLEGRO_EDITOR PAD_EDITOR Net associations lost on refreshing vias
% q( w$ }9 E! e! C( l: x1 E2061580 ALLEGRO_EDITOR PAD_EDITOR Lock Layer Span settings specified in padstack editor not reflected in PCB Editor7 |) p4 u& ?6 c" j+ W. j% e& E
2048116 ALLEGRO_EDITOR REPORTS Extracta command files not visible in Tools-->Reports when there is a space present in the textpath variable
2 \+ {) \" Q" p% O2038949 ALLEGRO_EDITOR SCHEM_FTB Netrev is slow if there is an input board file with many modified components
/ t( d4 Q, z9 X' S! `2052758 ALLEGRO_EDITOR SCHEM_FTB Connectivity objects are being reported as Added and Deleted in Constraint Differences Report
" p2 x Q, @! o2066099 ALLEGRO_EDITOR SCHEM_FTB Inconsistent net names on export physical after changing net names in DE-HDL
& _# p" Y- ?4 w" a# [% N2043882 ALLEGRO_EDITOR SHAPE Shapes not updated to 'Minimum aperture for gap width' in Global Dynamic Shape Parameters window
6 w. q8 K, ]- M B& e) r2048483 ALLEGRO_EDITOR SHAPE Shapes not getting updated post backdrill update6 R) n% h& h9 V& V$ O" ~
2052063 ALLEGRO_EDITOR SHAPE Cannot import IPC2581 due to 'Shape intersects with itself'" D- _% A( |% M% \5 l j
2056478 ALLEGRO_EDITOR SHAPE Editing shape by sliding segment causes PCB Editor to fail due to 0-length segment in shape6 i/ k/ o7 ~: {8 _3 ^
2058017 ALLEGRO_EDITOR SHAPE Shape not voiding correctly when fillets are present- j$ J+ b$ W! P% p( ?
2066473 ALLEGRO_EDITOR SHAPE Teardrops create strange copper shapes5 H. e) Y: `3 `. ]8 M
2079698 ALLEGRO_EDITOR SHAPE IPC2581 import fails with error 'Shapes intersects with itself'
1 B7 v+ k9 J+ O( n" \2010569 ALLEGRO_EDITOR SKILL Using SKILL to add 'nil' to a DRC object following a 'println' statement crashes PCB Editor in HotFix 048. f: o+ e+ g3 n/ v8 Z1 }! Q
2055055 ALLEGRO_EDITOR SKILL Using SKILL to add a 'nil' property value to a String causes Allegro PCB Editor to crash
9 ?* H- B4 O/ |7 b8 q2023755 ALLEGRO_EDITOR STEP Export STEP includes enclosure even when it is not selected.9 E- z; ]3 Y/ L- u6 _
1881233 ALLEGRO_EDITOR UI_GENERAL Green/white canvas without grid when creating a board file (File - New), V6 W8 F" y) P) u6 ?# y
1900525 ALLEGRO_EDITOR UI_GENERAL Resizing the update symbols UI causes the options to overlap and jumble up (refresh issue)
8 L5 S" Y2 A7 V# N0 z2003861 ALLEGRO_EDITOR UI_GENERAL Same y-coordinate returned for different vertical positions when creating board outline in HotFix 048' ]5 I Y; @$ ~, {7 F3 O9 ]
2033958 ALLEGRO_EDITOR UI_GENERAL Incorrect canvas display on creating a design from the Start page and then opening an existing design1 }" D: A8 r& E. P4 m |: k1 [9 ], k
2053496 ALLEGRO_EDITOR UI_GENERAL Confirmation dialog is behind canvas
/ a: n- i) H& ^& |; u( d$ p4 }4 q2054429 ALLEGRO_EDITOR UI_GENERAL Editor stops responding until choosing Done after clicking Zoom by Point twice ~: O" C$ a( p, j; K8 V
2059707 ALLEGRO_EDITOR UI_GENERAL 'HTTPS' links are not shown as hyperlinks when using allegro_html
2 P8 f' h7 A" t+ T# h/ L3 }2063423 ALLEGRO_EDITOR UI_GENERAL Blocking dialog popped up by axlUIPrompt() goes behind the canvas and is hidden
( C& [$ g4 h, }7 e' i4 o( Q' I1 v2038105 APD DRC_CONSTRAIN APD crashes on update DRC in release 16.6* o* i7 P8 g: s; G" d
2050674 APD PARTITION Cannot remove C-Point from a partitioned design- p Q0 K. R4 x
2068814 APD WIREBOND Bond wires cross on auto-separate: i+ G3 A: c! e2 H
1967433 CAPTURE OTHER Cannot open DSN or OPJ files by double-clicking if Capture is already open
% z5 l( T1 \3 o9 [# J/ P1967332 CONCEPT_HDL COMP_BROWSER Crash in customer environment on clicking on last row border in PIM after filtering4 n1 v4 {7 y4 r- }& Y
2001759 CONCEPT_HDL COMP_BROWSER Using Modify Component crashes Design Entry HDL
$ K) Z: T1 M6 {7 R2020788 CONCEPT_HDL COMP_BROWSER Intermittent crash when clicking bottom edge of part selection table in the Modify Component window
! j( D, L# i) V( j2053578 CONCEPT_HDL CONSTRAINT_MG Values specified for custom properties are not preserved
$ y9 ~; `( ]& k7 G) O( f$ B i2013002 CONCEPT_HDL CORE Ability to regenerate Netgroup names to remove '_1' suffix
% Q; c7 n D6 T' r& G* _" f! T2026637 CONCEPT_HDL CORE DE-HDL crashing often when launched from EDM Flow Manager
0 B( @, v, ?7 C' K. [$ p+ q2041145 CONCEPT_HDL CORE Set font size & color of netgroup names and netgroup taps
+ f; D y' H! i: {2056743 CONCEPT_HDL CORE NetGroups appended with _1_1, some are empty, and inconsistent in DE-HDL CM and Allegro PCB Editor CM' G+ s) o1 g6 s2 x
2065889 CONCEPT_HDL CORE DE-HDL Modify command moves location of attached symbol properties( z3 e& I4 k( T( t: F, Y
2074410 CONCEPT_HDL CORE Full net connectivity not shown in Allegro PCB Editor.' }' V3 z" J" k5 [: E9 }; G% [
2045717 CONCEPT_HDL RF_LAYOUT_DRI The RF PCB Options is greyed out when doing Import Physical on Linux with enterprise licenses$ Q0 c+ x L3 J) ^7 D/ d& }
2045274 CONSTRAINT_MGR CONCEPT_HDL Running SKILL script or navigating pages in the hierarchy viewer crashes schematic editor
9 b1 I1 s- |8 y$ ~' S$ w$ H2050521 CONSTRAINT_MGR OTHER Unexpected Xnet removal from schematic when Export to PCB Layout is executed.
) s2 ?, v. Y( M7 Q2066270 PCB_LIBRARIAN SYMBOL_EDITOR Unable to edit note text containing comma
7 i$ v/ S2 e) Y: r t2069181 PCB_LIBRARIAN SYMBOL_EDITOR Pinlist window expand/collapse buttons act weird first time when invoked.
) }' x; V4 x8 w4 O0 ~2070007 PCB_LIBRARIAN SYMBOL_EDITOR Project not found error in Symbol Editor when path contains space character# b U5 d# y/ V
2072793 PCB_LIBRARIAN SYMBOL_EDITOR Right-click menu of formatting text objects is not consistent: second and third options are swapped
" c% N5 O {3 D1 N2073138 PCB_LIBRARIAN SYMBOL_EDITOR New Symbol Editor: Do not allow duplicate properties: O+ E. `' t" c) I( ]) a) a6 ^' J
1957458 PSPICE FRONTENDPLUGI Refresh issue with Bias Display on a new design: bias value not updated
, l$ A# `- i( B( Q$ q$ s0 |2022211 PSPICE FRONTENDPLUGI Bias Point results are not updated
9 t3 z3 b1 Q% ~9 T9 J- @! T, n$ r2031058 PSPICE FRONTENDPLUGI PSpice bias values are not getting updated
8 m, i5 N2 H/ ~6 o, D' _! U8 T+ z2038021 PSPICE FRONTENDPLUGI Bias display is not updated) [( e# ]1 H" {* `
2055274 PSPICE FRONTENDPLUGI Capture crashes on SIMSETUP OK when two projects are open9 m$ x' B. j9 x) {; H, m4 Y
2053432 RF_PCB OTHER Property on RF component not transferred to new design not containing the component
! y7 P3 G. m4 I; r* Y ^1 k, r; L2003341 SCM SCHGEN Unable to generate a schematic for hierarchical blocks
1 P d( m+ M6 Y: t2069924 SIP_LAYOUT DIE_ABSTRACT_ Conversion from co-design die to standard die / BGA / anything else must remove floating function pins.& Y& Q/ X! E7 o: X
2067894 SIP_LAYOUT OTHER sip database size is enormous for a small component definition used in fdesign
* {$ b! a3 b9 G( e* B2067987 SIP_LAYOUT OTHER Orphaned die attachment in SiP Layout cannot be removed
8 h" z0 W! Q, f9 Q$ l! \( m2072857 SIP_LAYOUT OTHER SiP Layout crashes when using Find by Query and choosing 'Symbols'5 `$ t6 `% z5 O3 e' X* `" J* u+ z
2068973 SIP_LAYOUT REPORTS SiP Layout Missing Fillet report not catching a missing fillet in HotFix 051 and 052
/ X7 u" \+ e9 |% M# `$ }$ x9 T2059533 SIP_LAYOUT SYMB_EDIT_APP SiP Layout: Cannot rotate bumps in Symbol Editor application mode% I% E& ~7 C# ^# O; a$ o" W5 q: F
1981749 SYSTEM_CAPTURE ARCHIVER System Capture: Archiving a design from the Tcl command window results in error+ |& {' ~4 P j$ Z
2054869 SYSTEM_CAPTURE AUTOMATION syscapUtils.tcl command cnsAutoCreateDiffPair is broken due to missing acm_code.il and acm_config.txt files. z) I2 L* o% \
1966488 SYSTEM_CAPTURE CANVAS_EDIT New folder rename box does not show the text typed.
# q2 M9 [) f: D* u# V. M1814813 SYSTEM_CAPTURE COMPONENT_BRO System Capture session log should specify the CDSSITE path for the current session
; k4 t* S, j& ~+ ^- {1977673 SYSTEM_CAPTURE COMPONENT_BRO adding reference blocks through add component error when cell name matches design name
/ Q) r& Y, W- B5 l! r2 v2027100 SYSTEM_CAPTURE COMPOSITE_FIL pstdedb.cdsz and netlist preview in System capture is not being updated when individual netlist files are written
& N* z+ s* q7 V2 F) [$ S# I0 L1961274 SYSTEM_CAPTURE CONNECTIVITY_ Xnet removed during pin swapping3 ^+ H% O5 C3 F% W; [1 H- Y
2041879 SYSTEM_CAPTURE CONNECTIVITY_ xnets on net with only pull-up resistor5 G( [0 }! C9 M* ]
1889238 SYSTEM_CAPTURE COPY_PASTE Wire fails to connect during copy and paste
0 b5 N1 C# k0 B2 v6 s( L1993146 SYSTEM_CAPTURE DESIGN_EXPLOR Cannot move page up by only one position
( o7 i3 z, U3 g1910941 SYSTEM_CAPTURE MISCELLANEOUS Parts that are not in any schematic page appear in netlsit and BOM! L p' C0 K9 ~5 U. N) L/ ?
1902347 SYSTEM_CAPTURE PRINT Prints all sheets if one sheet is specified as the print range6 U# x7 S9 Z" t0 n' c
2041272 SYSTEM_CAPTURE SMART_PDF Smart pdf displays component outline when component is not de-highlighted.1 Q& m6 O1 l9 @; r
2065768 SYSTEM_CAPTURE SMART_PDF Custom Variable in Table Object not getting passed to PDF
( w: a& x% ^( |' ?2 x1969243 SYSTEM_CAPTURE VARIANT_MANAG Export variant does not name file correctly if the filename contains a space! k/ s' m, ?1 h" t8 [
1990258 SYSTEM_CAPTURE VARIANT_MANAG Cannot paste copied preferred part to multiple parts with the same part number/ m8 t9 G# \, J; {6 q7 w
1992250 SYSTEM_CAPTURE WORKSPACE Double-clicking a .CPM file runs System Capture but does not open project |
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发表于 2019-5-3 15:45
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