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DATE: 10-10-2014 HOTFIX VERSION: 037# x1 k) t- t9 m* B2 u
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1314031 concept_HDL CORE GenView should automatically refresh the page where the block symbol has been instantiated
: d8 m3 c7 _. q( m1318575 SIG_EXPLORER SIMULATION Display Parasitic on Wirebond (selecting the second one) crashes APD
p- z5 h, V# w! d1 n9 d; v1319258 allegro_EDITOR INTERFACES Enhance IPC-2581 so that the rotation of pad shapes is defined at the LandPattern definition and Pin elements levels2 f, U( F4 ^* B; @% k
1320054 ALLEGRO_EDITOR INTERFACES IPC2581 Import Stackup0 L2 }$ A% q8 V1 x/ Q) a3 b( G/ _
1320467 CONCEPT_HDL CORE Incorrect directives in cds.cpm for nconcepthdl (cont.)
9 d8 r, C' c4 A; m1320878 ALLEGRO_EDITOR EDIT_ETCH Allegro crash when using scribble
9 |' p* z4 N# a x6 D, U1321319 ALLEGRO_EDITOR INTERFACES Step Export has wrong size% F/ P5 c9 N" D/ M# x* W
1322394 CONCEPT_HDL OTHER Packager runs without errors even when the DEHDL schematic pages are corrupt.
1 f# H: s+ x2 q3 N$ B/ k1323892 CONCEPT_HDL CORE The SI_MODEL_PATH should not write to $HOME/pcbenv/env
# C, {/ q( U% W1324438 SIP_LAYOUT EXPORT_DATA SiP Layout - netlist spreadsheet, Error on exporting a spreadsheet on design file {& B4 A4 f3 V9 K
1324533 F2B PACKAGERXL Export Physical fails - pxl.exe has stopped working
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发表于 2014-10-11 14:22
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