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ARM平台下Uboot启动Linux内核前的必备条件

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发表于 2020-6-10 16:41 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式

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- p( ^$ G4 _+ [- ~Linux内核是由Uboot进行调用的,在执行内核前,需要满足什么条件呢?2 |% V5 r) i. I" c- }: n

! F4 x( |8 G8 |9 a" h/ {: Q' L. a' p我们来看下内核文档Documentation/ARM/booting。内核版本为3.7.6。' e7 F' I* O5 {) n! H7 Y

- Q, U- W) i5 d' z6 t。。。。。。
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7 d; E/ b% p) g1 {- b/ J5. Calling the kernel image' d) \$ G7 l& o6 F# L
---------------------------
7 [! {: T5 F6 D) T' J7 l5 w8 B: \* T2 s, S
Existing boot loaders:        MANDATORY6 k4 K3 H) a% ~
New boot loaders:        MANDATORY
* l4 h4 G- I; |/ k1 {! @5 M& v
4 U! n+ X9 j( b5 K" o9 r. YThere are two options for calling the kernel zImage.  If the zImage* D, j( k( Z4 Q/ p" {
is stored in flash, and is linked correctly to be run from flash,. f. C' j: L; n( N$ z+ H$ y
then it is legal for the boot loader to call the zImage in flash
  d% _" q& n: Z" Z+ mdirectly.
) o) {+ c/ J$ t) X
9 H+ T! \4 c! p) IThe zImage may also be placed in system RAM (at any location) and
! y8 b7 ]2 c) R) @called there.  Note that the kernel uses 16K of RAM below the image+ n( A% d$ G4 w( }1 O6 ]
to store page tables.  The recommended placement is 32KiB into RAM.
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9 g6 g; X$ z' M3 I5 iIn either case, the following conditions must be met:5 J# A5 T2 R! H5 B  t2 O5 H$ f  U

' e( k* u# ]7 a4 L5 Y- Quiesce all DMA capable devices so that memory does not get% [2 J7 x* v% H# K
  corrupted by bogus network packets or disk data. This will save$ P5 }4 O4 E& ]2 f0 a8 I" A
  you many hours of debug.9 m# j2 ~) w$ z2 {6 Y

6 {) v6 v: ~# e; i- CPU register settings
9 o  \2 j2 D$ ]. I& P) |  r0 = 0,$ [2 v5 f3 P0 V% \
  r1 = machine type number discovered in (3) above.
/ Y" c7 C2 m( q: N- I  r2 = physical address of tagged list in system RAM, or
6 P8 q: U, ]# N5 E       physical address of device tree block (dtb) in system RAM/ A/ n3 N* v& I  d, a# D# x
% Z$ ?2 b& D( B$ Q1 o* R6 u
- CPU mode
' N" u1 k% h. f+ S  All forms of interrupts must be disabled (IRQs and FIQs). v7 q; d2 [  z8 I) _8 t

/ `, Y5 h) b; q; E$ _( E  `  For CPUs which do not include the ARM virtualization extensions, the
0 M& @$ O  W1 a& c8 U  j" m  CPU must be in SVC mode.  (A special exception exists for Angel)
/ Y  @* h2 E: L- C$ [5 I0 \) U6 ~9 ~0 j, L2 {* Y
  CPUs which include support for the virtualization extensions can be( {7 c/ H7 n# w! I9 ?
  entered in HYP mode in order to enable the kernel to make full use of
& H( G: H5 U7 D0 d5 c1 t  these extensions.  This is the recommended boot method for such CPUs,
; h7 O& {. R- A6 w( S  unless the virtualisations are already in use by a pre-installed
& E$ e& S! D& F9 P; T2 A  hypervisor.$ _' X1 @  \1 R& ~; a1 `0 D
# n' W1 r; X! ]3 O/ F  b# I+ D
  If the kernel is not entered in HYP mode for any reason, it must be, I2 g2 ~6 @2 A6 X6 `  W$ i- |
  entered in SVC mode.$ a( r/ f9 H8 O  c4 \

9 w2 h+ k6 L! j$ ?1 W- Caches, MMUs
9 O! k2 X, |4 j. p  The MMU must be off.
/ z; }1 z) C( z) h0 I; e8 j  Instruction cache may be on or off.
  ~* l( V. E' t  L5 {* Q  Data cache must be off.
! e& t3 t, y, e  B# d3 y( F& F7 I3 f  U+ n* |7 s
  If the kernel is entered in HYP mode, the above requirements apply to; c" ~# T* H' D! k5 D3 a2 X5 m
  the HYP mode configuration in addition to the ordinary PL1 (privileged
* i4 }" `9 i2 o! q6 h( ~! F  kernel modes) configuration.  In addition, all traps into the
, {% |1 T* a) |) n8 }! X2 k( a  V  hypervisor must be disabled, and PL1 access must be granted for all
& x/ a1 y. }8 e" g3 M& {( S2 T  peripherals and CPU resources for which this is architecturally/ O5 L+ o5 g8 x
  possible.  Except for entering in HYP mode, the system configuration  Y7 H8 F3 u9 E4 R
  should be such that a kernel which does not include support for the) X, B: `1 e: [6 T7 }$ V, |
  virtualization extensions can boot correctly without extra help.
; x3 K3 ^3 t- g0 R9 i/ V, C0 k8 f
; `- k/ j6 K) [5 ~# A% I$ V# d! ~- The boot loader is expected to call the kernel image by jumping3 O/ _, c; Q9 A2 M0 l8 |( Z
  directly to the first instruction of the kernel image., f& m. x8 v: R- w, r$ l! E

- p, }0 y' S  d2 m! A  On CPUs supporting the ARM instruction set, the entry must be5 k6 l) b4 F7 \" b7 p4 U6 u4 S/ Z
  made in ARM state, even for a Thumb-2 kernel.
8 F+ T# O- C; _$ C, J4 f% e8 V4 x
, i6 m: L: A% `' k, V8 _# S  On CPUs supporting only the Thumb instruction set such as/ y( A+ R8 P8 \# }+ L: X
  Cortex-M class CPUs, the entry must be made in Thumb state.
8 n" g' Q# x% m. j  P& W# s6 W; N( L8 h/ T
/ Y' q7 E5 B7 o7 C
这里,省略了该文档中不感兴趣的部分。
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根据文档,
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: D+ w9 F. s! x$ K( w7 t第一, 必须禁止所有使用DMA的设备。 感觉这个有点多余,Uboot使用的设备,包括网卡之类的,一般都不会使用DMA。
' M1 g# h- K2 o; B8 n9 \8 A* x- _! u1 r+ J9 E4 e
第二,必须设置r0,r1和r2寄存器为相应的值。这个是由下面的函数调用实现的。
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/ Q2 V1 q- }2 l) c该函数在Uboot/lib_arm/armlinux.c的do_bootm_linux函数中被调用。
$ S9 S1 B' G/ f" R$ z1 E- W  _$ Q9 k; c9 _8 x) x) j% j+ ~
    theKernel (0, bd->bi_arch_number, bd->bi_boot_params);
" ]5 w2 P6 Z& M8 B2 j3 X; Q
4 T( c4 e9 |- ?' R. {+ K根据ATPCS的规则,函数的实参将分别传入r0到r3寄存器。这里有正好传入三个参数对应着0,机器码和参数列表的地址。+ ^# |' i; ~8 D* q
1 g. Q4 `0 S0 q" [
第三,必须禁止中断,并且将CPU置入SVC(管理)模式。这些工作已经由start.S完成了。: Y. e1 m# W" {6 w5 S" a* z( f

9 S# X" Q2 l5 R) J* Q第四,必须禁止数据cache和MMU,可以使能或禁止指令cache。这个是由下面的函数调用实现的。* I8 T' a1 y$ c0 E

4 a) N" w$ }8 h+ j8 i该函数位在Uboot/lib_arm/armlinux.c的do_bootm_linux函数中被调用。' N9 u0 j. Q8 z& n6 Y$ Z
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下列函数位于:Uboot/cpu/arm920t/cpu.c中。
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) V. K4 X2 W1 p9 p: w, Sint cleanup_before_linux (void)) H% w6 c, }4 M% K: n7 B/ u
{
% \2 m! d1 G) S0 L9 E; V1 M        /*. }1 s( ?% ^6 H. K8 O1 X; m
         * this function is called just before we call linux
$ D' s9 _3 J0 D7 J. s% j         * it prepares the processor for linux( D  {* i0 E: V, A, ]
         *
' Q& i2 f% q( U         * we turn off caches etc ...
3 o, J7 Y) F* f- v; s         */- L3 R; f  U. l

0 _- v2 b5 z# u$ g0 I        unsigned long i;, A' V  U/ j/ Q8 I7 s

1 k. H% M4 n$ k; T        disable_interrupts ();
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        /* turn off I/D-cache *// O7 w6 s; }* ^7 t& j& |& d2 l
        asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));- J' J' H+ v7 c" s) B9 I
        i &= ~(C1_DC | C1_IC);. h2 P7 a+ i3 h* y; X0 k0 D
        asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));; y4 U' L* H2 v1 x. e. U
4 _" d4 R# v, _% ^
        /* flush I/D-cache */+ u0 m2 N! T! B, U/ ]; a
        i = 0;5 n' j/ D, r5 I0 E- d! j; N: V6 M
        asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i));
& E  ^8 m" L' n/ M. _  P 3 c5 h/ m* ^3 g/ P1 T% r
        return (0);  c" _. v1 M  K5 ~
}
% n4 L. m1 @0 ?( x! s- A6 q. I0 K( v: S5 T
可以看出该函数禁止了数据和指令cache,同时冲刷了cache。
  [. ?4 v2 \, R# I$ ?" l  s. ~这里并没有禁止MMU,MMU禁止是在start.S中完成的。
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发表于 2020-6-10 19:05 | 只看该作者
ARM平台下Uboot启动Linux内核前的必备条件
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