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DATE: 10-10-2014 HOTFIX VERSION: 037
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1314031 concept_HDL CORE GenView should automatically refresh the page where the block symbol has been instantiated
# } O8 [6 |; M- D7 I# N& y0 W+ f1318575 SIG_EXPLORER SIMULATION Display Parasitic on Wirebond (selecting the second one) crashes APD
% o: i" k1 W5 M$ w) G2 Z1319258 allegro_EDITOR INTERFACES Enhance IPC-2581 so that the rotation of pad shapes is defined at the LandPattern definition and Pin elements levels
) F0 X! |) }4 }& W0 P1 w+ g- p1320054 ALLEGRO_EDITOR INTERFACES IPC2581 Import Stackup1 g3 ~$ ?2 i1 I8 v
1320467 CONCEPT_HDL CORE Incorrect directives in cds.cpm for nconcepthdl (cont.)
$ p# f( v6 Y% K, a; G1320878 ALLEGRO_EDITOR EDIT_ETCH Allegro crash when using scribble
5 f+ U7 p' G/ l. Z( x1321319 ALLEGRO_EDITOR INTERFACES Step Export has wrong size5 j; j" x, `0 o4 r
1322394 CONCEPT_HDL OTHER Packager runs without errors even when the DEHDL schematic pages are corrupt. U* A0 n# E3 g4 [
1323892 CONCEPT_HDL CORE The SI_MODEL_PATH should not write to $HOME/pcbenv/env
) r0 M0 q9 G! R8 t" O1324438 SIP_LAYOUT EXPORT_DATA SiP Layout - netlist spreadsheet, Error on exporting a spreadsheet on design file
2 T, r6 N; \; `3 z1324533 F2B PACKAGERXL Export Physical fails - pxl.exe has stopped working) B& h/ E X3 X9 ]1 P. e" Z( r
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发表于 2014-10-11 14:22
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