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标题: True-Hspice Device模型参考手册 [打印本页]
作者: snowwolfe    时间: 2008-3-25 17:14
标题: True-Hspice Device模型参考手册
Table of Contents* q- W' _5 `7 I6 N
Audience ............................................................................................. iii
; p" c% b2 y; w# ~, h& Y0 U# jRelated Documents ............................................................................. iii% d4 I& R: |* R3 t' Z
Conventions ........................................................................................ iv
. y7 E9 i, J' N8 vObtaining Customer Support .............................................................. vi
  K) P/ Q2 t( q& Z: dOther Sources of Information ............................................................ vii' y* U4 x' z2 Y$ c
Revision History ............................................................................... viii. o! y8 _: T; f* X; f
Chapter 1 - Overview of Models ..................................................................... 1-1
+ v1 {% R( r& s6 j6 P" SUsing Models to Define Netlist Elements .............................................. 1-2/ F* Z/ ~: d$ j, a/ t: _, q
Supported Models for Specific Simulators ....................................... 1-2
5 h2 G$ O- c7 `4 h9 F/ x% nSelecting Models .............................................................................. 1-3- [0 `3 z4 t; [  [' s  ]8 F; S
Example ............................................................................................ 1-3
' _  P2 I' \5 CChapter 2 - Using Passive Device Models....................................................... 2-1
0 K1 z- |# c- J: y6 BResistor Device Model and Equations .................................................... 2-21 ?4 `' J5 e( M1 v7 o
Wire RC Model ................................................................................. 2-27 g0 n% E" z. Z$ v! F
Resistor Model Equations ................................................................. 2-5: e2 Q4 V( r& M6 i1 f, H3 \
Capacitor Device Model and Equations ............................................... 2-10
6 q) {) K" _: U; T. M6 p( d/ f8 ~Capacitance Model ......................................................................... 2-10
2 \0 I* s* _3 \! F! Z: ^* o5 I' RCapacitor Device Equations ........................................................... 2-11
' G6 a2 Y. F0 z0 j0 mInductor Device Model and Equations ................................................. 2-14
1 t/ ~( `" K/ e$ P4 |" S+ ^Inductor Core Models ..................................................................... 2-15- X8 J* u; {$ L4 g( @' q
Magnetic Core Element Outputs .................................................... 2-18: }: S: i+ L! ~, l" ]  p; e
Inductor Device Equations ............................................................. 2-19
3 W' d( s- {3 W8 ?3 H2 _6 k  FJiles-Atherton Ferromagnetic Core Model ..................................... 2-21, z' G  {3 C6 j# w  o
Power Sources ....................................................................................... 2-30
( _3 H4 P  f' I+ e$ x9 WIndependent Sources ....................................................................... 2-30
3 U* u  x+ ]& r, n% _; MControlled Sources .......................................................................... 2-33
: R; B4 S, L# \2 S1 e' Q' OChapter 3 - Using Diodes ................................................................................. 3-1
& \! b/ M/ t7 aDiode Types ............................................................................................ 3-2  j1 M# l0 ~  y: b& i; M
Using Diode Model Statements .............................................................. 3-3( \/ ]7 M2 a) \  [! J3 o
Setting Control Options .................................................................... 3-3
( ~2 _+ n0 D5 i9 y& ASpecifying Junction Diode Models ......................................................... 3-5
5 G6 E$ `2 i! l# Q+ Z0 q) n6 P/ CUsing the Junction Model Statement ................................................ 3-6" a/ a5 P; Q0 q1 @
Using Junction Model Parameters .................................................... 3-7
: V. d$ N7 H* ^0 W3 O8 cGeometric Scaling for Diode Models ............................................. 3-13
$ D' S: g& ?# s: F% `9 xDefining Diode Models ................................................................... 3-157 c% @# y/ \5 ^4 q& Y. a" j
Determining Temperature Effects on Junction Diodes ................... 3-184 i! w" n  Y, A; ^& }2 h; w: w+ X1 L
Using Junction Diode Equations ........................................................... 3-21
. u, Q! T* `% o$ wUsing Junction DC Equations ......................................................... 3-22
, X2 N) g8 s2 k9 A  T0 z! M: QUsing Diode Capacitance Equations ............................................... 3-25
: r6 U. ]. a! j) J! @Using Noise Equations .................................................................... 3-27
- a6 f0 g5 f2 mTemperature Compensation Equations ........................................... 3-281 i5 U7 u( d# a* c
Using the Junction Cap Model .............................................................. 3-324 h1 A' t5 @# a) a; \* @: @
Setting Juncap Model Parameters ................................................... 3-33
1 _1 x% l7 r6 l, g  S" TTheory ............................................................................................. 3-33* V0 {" I" b1 q( P/ j8 x
JUNCAP Model Equations ............................................................. 3-38+ N  O: j& g! A+ y* a, c" D
Using the Fowler-Nordheim Diode ...................................................... 3-46" @# `# M8 w1 ^! b+ M
Converting National Semiconductor Models ........................................ 3-48
, H+ ~- S; \: {  H2 MChapter 4 - Using BJT Models ........................................................................ 4-1
# m  T! \+ ~" CUsing BJT Models .................................................................................. 4-2
1 i5 D, @/ k. ~6 pSelecting Models ............................................................................... 4-2' H, O5 N1 b8 `# W+ m8 D
BJT Model Statement ............................................................................. 4-4
1 ~$ K6 K! a4 H6 J' EUsing BJT Basic Model Parameters ................................................. 4-50 r2 {$ J! v+ [  f. Y7 f" A
Handling BJT Model Temperature Effects ..................................... 4-15
# l% `- B2 o9 r; ?- T: OBJT Device Equivalent Circuits ............................................................ 4-21
" L4 P# H1 V# wScaling ............................................................................................. 4-21
$ s& }8 @+ C! r# N) u+ [1 Y. bUnderstanding the BJT Current Convention ................................... 4-21( J) V# N2 R# E
Using BJT Equivalent Circuits ....................................................... 4-220 H! M7 }+ j0 h
BJT Model Equations (NPN and PNP) ................................................. 4-30) I- A5 Z/ z1 X+ H" }! r# E* @
Understanding Transistor Geometry in Substrate Diodes .............. 4-302 m) d0 L' o" Q- {) x5 a0 r5 t/ @1 z
Using DC Model Equations ............................................................ 4-32" g1 k$ S- f. c) p/ ~
Using Substrate Current Equations ................................................. 4-33- e" K; h9 h+ {7 ~( y. V
Using Base Charge Equations ......................................................... 4-34' |) r: S9 W- `7 X4 D" w
Using Variable Base Resistance Equations .................................... 4-35
; D4 U2 b% y6 f* M. WUsing BJT Capacitance Equations ........................................................ 4-365 |4 E+ G: p) ~0 ?8 O* D
Using Base-Emitter Capacitance Equations ................................... 4-36
! p- m  ?7 k$ q! jDetermining Base Collector Capacitance ....................................... 4-38' i' _% Y! S/ H) T
Using Substrate Capacitance ........................................................... 4-40* {" C) {1 U; R, m. \( k
Defining BJT Noise Equations ............................................................. 4-427 E# \, f/ L6 G, g! V
BJT Temperature Compensation Equations ......................................... 4-448 G  H( k& m: ^: f
Using Energy Gap Temperature Equations .................................... 4-446 e0 _$ e. f& w1 r
Saturation and Beta Temperature Equations, TLEV=0 or 2 ........... 4-44
  s+ X% i3 [% Y8 J0 k1 QUsing Saturation and Temperature Equations, TLEV=1 ................ 4-463 ?' M+ h. P9 ~5 ?2 m: b
Using Saturation Temperature Equations, TLEV=3 ....................... 4-47
. s. N3 Q$ _( A+ s) ^2 l: i3 AUsing Capacitance Temperature Equations .................................... 4-49
. V6 \" S& q0 }& uParasitic Resistor Temperature Equations ...................................... 4-51( a  l7 w; T5 ?9 r# U* a
Using BJT Level=2 Temperature Equations .................................. 4-52
) l, \% X0 L' ~BJT Quasi-Saturation Model ................................................................ 4-537 n6 i( {  \+ T+ Q% ]) R# V
Using Epitaxial Current Source Iepi ............................................... 4-559 b2 {. H% y! H5 F! M- c: B
Epitaxial Charge Storage Elements Ci and Cx ............................... 4-55
0 p8 h, s- M2 Y1 g, Z. w: M- WConverting National Semiconductor Models ........................................ 4-58, @  a7 o  D4 [8 M! G5 X3 [
VBIC Bipolar Transistor Model ........................................................... 4-601 E# G% [* M; j' q
Understanding the History of VBIC ............................................... 4-604 q& ?, q$ t: ~3 [
VBIC Parameters ............................................................................ 4-61
; S+ s4 J9 \% @7 `1 H4 Q! C% t7 \Noise Analysis ................................................................................ 4-62
+ V' C' q$ `7 u% ALevel 6 Philips Bipolar Model (MEXTRAM Level 503) ..................... 4-71
( b% G) m3 `/ q) {# RLevel 6 Element Syntax .................................................................. 4-71
" |* ]7 A# t4 U- b/ W: F; S1 iLevel 6 Model Parameters .............................................................. 4-720 y4 E9 s3 @8 y, o8 j5 `; Y0 Z
Level 6 Philips Bipolar Model (MEXTRAM Level 504) ..................... 4-78
, C) h9 G  n/ B+ ~5 Q; x" G" Y7 }0 zNotes ............................................................................................... 4-79$ U( p% Q( x% }% k, _9 _
Level 6 Model Parameters (504) ..................................................... 4-80  r& q* W& o3 K; t
Level 8 HiCUM Model ......................................................................... 4-94
4 L4 ^2 f- C! u6 d  ^' aWhat is the HiCUM Model? ........................................................... 4-94" U+ p$ `/ C) e2 l
HiCUM Model Advantages ............................................................ 4-948 f' {. I+ m( D. \
Avant! HiCUM Model vs. Public HiCUM Model .......................... 4-96+ U& Y# ~& F1 |7 ]
Model Implementation .................................................................... 4-96" x1 Y4 z$ @# e% w% Z6 e
Internal Transistors ......................................................................... 4-97- t8 Y# C- _. E$ ?! {8 ~
Level 9 VBIC99 Model ...................................................................... 4-110
+ l% e8 N7 _/ I8 s2 GElement Syntax of BJT Level 9 .................................................... 4-110$ `' E3 c3 @' c! [& _1 x7 c+ m4 C
Effects of VBIC99 ........................................................................ 4-112
" z8 c3 E1 ]. z* p9 `/ n% JModel Implementation .................................................................. 4-112
3 y3 d0 ~9 ^7 c6 }3 EExample ........................................................................................ 4-1195 z& s, F8 d6 v( I- p
VBIC99 Notes for HSPICE Users ................................................ 4-123; C0 d( C2 j! A8 }1 A; |3 h- V) V( i
Level 10 Phillips MODELLA Bipolar Model .................................... 4-124
8 M  D& n7 h( F7 G8 jModel Parameters ......................................................................... 4-1241 B3 x' W; w  b- e7 Q
Equivalent Circuits ........................................................................ 4-129
! }, T( l' G5 W9 j7 p8 H' dDC Operating Point Output .......................................................... 4-131: T! Q3 x9 Y4 S7 i* }
Model Equations ........................................................................... 4-132
- G1 J% b/ p$ [6 U& {9 jTemperature Dependence of the Parameters ................................ 4-1425 v4 ~3 X7 [; A3 e9 c
Level 11 UCSD HBT Model .............................................................. 4-1467 K% A) z" n2 g8 c& I
Using the UCSD HBT Model ....................................................... 4-1460 s4 E% o, e& o* M8 Z. U
Description of Parameters ............................................................. 4-147, g- b0 U9 o: \/ |, S# ~  s
Model Equations ........................................................................... 4-152% ^8 o% k1 ^8 n! f
Equivalent Circuit ......................................................................... 4-163
  [; G6 v. j: _& W  xExample Avant! True-Hspice Model Statement ........................... 4-1657 Y) t& c! U7 E( C3 X. u0 |0 g
Chapter 5 - Using JFET and MESFET Models............................................. 5-1
, w- M2 b# N2 V% uUnderstanding JFETs .............................................................................. 5-28 R8 N" a, j3 O: G
Specifying a Model ................................................................................. 5-3: D& E8 b: G: ]' @* _! j
Understanding the Capacitor Model ....................................................... 5-5
9 o8 q8 W; f$ q: r; o: Q9 |& SModel Applications ........................................................................... 5-5
$ l. ?" Z( N3 o4 k0 ~Control Options ................................................................................. 5-6' N# K: d( E& m2 J. g
JFET and MESFET Equivalent Circuits ................................................. 5-70 h9 l0 j3 p3 i+ d, Y& [$ L6 c, `
Scaling ............................................................................................... 5-7& T; q* x% n4 f0 h% |  V$ q
Understanding JFET Current Convention ........................................ 5-7
, m2 B6 R6 B- C' j5 h; I# XJFET Equivalent Circuits .................................................................. 5-8
: W7 F  `' |. \0 bJFET and MESFET Model Statements ................................................. 5-13
7 R$ V/ _! k! \$ q8 z! ^JFET and MESFET Model Parameters ........................................... 5-13
4 N8 U6 o1 E& C" I3 m" SGate Diode DC Parameters ............................................................. 5-15
# J0 v! y* A/ Q! uJFET and MESFET Capacitances ................................................... 5-25
6 k% x/ \4 b  O0 @. I6 }6 iCapacitance Comparison (CAPOP=1 and CAPOP=2) ................... 5-29
& d+ C! @/ P" l* ?8 KJFET and MESFET DC Equations ................................................. 5-31
9 ^, O- i1 \, i5 A4 e2 _; _JFET and MESFET Noise Models ....................................................... 5-35& f; V' J5 ?" p
Noise Parameters ........................................................................... 5-352 Z. m3 W/ s" l# I" G
Noise Equations .............................................................................. 5-35
8 _; \" u/ v2 L7 y4 S# ?Noise Summary Printout Definitions .............................................. 5-36  Y- K" f% k( W3 i$ t( ?
JFET and MESFET Temperature Equations ........................................ 5-37
2 u: E& \& d, z2 @Temperature Compensation Equations ........................................... 5-40, @+ E2 E6 ?) J. [. }; V
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作者: superfect    时间: 2008-11-6 21:01
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作者: winstonguo    时间: 2009-4-18 17:20
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作者: muzi0623    时间: 2009-12-25 15:03
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作者: kyang74    时间: 2010-1-30 15:13
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作者: Colin_Zhou    时间: 2012-8-8 16:18
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作者: shuaiwang    时间: 2015-4-16 22:26
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作者: 灯火枫桥    时间: 2015-4-18 17:03
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作者: 狂想的旅程    时间: 2018-1-28 23:03
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作者: 狂想的旅程    时间: 2018-1-28 23:06
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作者: Justinkunt    时间: 2018-3-16 21:55
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作者: claptrap    时间: 2018-3-29 09:43
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作者: helicopter    时间: 2018-4-8 10:59
谢谢分享
作者: bingshuihuo    时间: 2023-6-11 10:40

0 t+ c! A( ]6 r4 @好 啊。感谢啊



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