标题: Cadence迎来了Hotfix_SPB17.00.002_wint_1of1补丁 [打印本页] 作者: pzt648485640 时间: 2015-5-7 02:28 标题: Cadence迎来了Hotfix_SPB17.00.002_wint_1of1补丁 下载：http://pan.baidu.com/s/1gdhBNzl " N6 O4 W, G4 V& M- C- R v, ^. Z8 _. n. v2 u7 K$ V
DATE: 05-01-2015 HOTFIX VERSION: 002 5 r: V. h- x9 L3 r- F" ~ =================================================================================================================================== ( g% F: ?2 M5 m$ q9 S( j9 z CCRID PRODUCT PRODUCTLEVEL2 TITLE 5 D8 V' w9 y! a; G2 m ===================================================================================================================================- ~5 h' ~9 I; @7 i8 w6 A) ?
1315048 ALLEGRO_EDITOR INTERFACES IPC2581 translation inconsistency on negative layer * E( `% K9 Q: f8 v* B$ W 1362745 CONSTRAINT_MGR OTHER Allegro PCB Editor crashes on opening Constraint Manager with any design2 j$ S3 A2 i7 \" v& q% d* k) G
1373412 ALLEGRO_EDITOR GRAPHICS SigXP Print Canvas : Via model seems to be filled by black Via box. 4 m* T! m7 X5 e# o2 T3 i3 L# } 1376765 CONSTRAINT_MGR ANALYSIS SETUP/Hold spreadsheet lists only one pin pair: B) m# S2 C" J; ~
1399646 ASI_SI OTHER Should be able to run mbs2brd with SI/PI base licenses 0 ^: ]8 L* O0 M/ \% ~- W0 E 1400215 SIG_INTEGRITY REPORTS cross talk failure on certain nets in PCB SI 16.6# I; T) a; r2 r! x z# d
1400302 ALLEGRO_EDITOR MANUFACT Copper Thieving is working differently in SPB16.6 as compared to SPB16.5 : [+ y9 N: e: Q 1400755 ALLEGRO_EDITOR SHAPE Updating the shapes on the ATTACHED deisgn causes a short to a pad. 2 F7 U" [% ~ X. s( O2 g: d4 ? 1400813 ALLEGRO_EDITOR SHAPE PCB Editor crashes when you delete islands from all the layers and save the board # |" ^/ N7 x' s9 j, i 1404174 SIP_LAYOUT OTHER Creating bounding shapes generates INCORRECT shapes and DRCs- n, j& M3 ]0 n: Q) d; D
1404184 ALLEGRO_EDITOR INTERFACES Step package mapping - Save is disabled for certain symbol) \! ?2 C- T; d9 K/ t
1406457 ALLEGRO_EDITOR SCRIPTS Unable to launch allegro.exe -orcad after update hotfix 046/ b, e) m" V; y& J/ `
1407123 ALLEGRO_EDITOR OTHER Lines with zero line width are not being printed in PDF format 0 K. n" E8 d5 p+ }, F 1407483 ALLEGRO_EDITOR REFRESH The 'refresh symbol' command creates an unrouted connection in a fully routed design 8 X1 m; j! F; K* E7 P4 u7 @) [ 1408072 SIP_LAYOUT OTHER Net assignment for a BGA component fails on running the File - Import - Netlist-in wizard command.; ^; Z! m% M6 s9 x0 K
1410857 ALLEGRO_EDITOR DRC_CONSTR Diff Pair Uncoupled length DRC gives different results in SPB16.3, SPB16.5, and SPB16.6.4 T* v+ t- j0 e q& b% e0 [
1413235 ALLEGRO_EDITOR INTERACTIV Find by Query with Via Structures: GUI freeze % [0 \0 I/ g" \3 N; ]6 i, T# U5 l! E" B9 O: M- o g; A' q; ?
DATE: 04-03-2015 HOTFIX VERSION: 001 6 a6 |6 h4 P$ b# b+ U ===================================================================================================================================4 t9 a' F4 \9 U' V
CCRID PRODUCT PRODUCTLEVEL2 TITLE4 n$ F+ L& Z5 u5 O' V# q
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491042 CONCEPT_HDL SECTION Prevent PackagerXL from changing visibility on SEC attribute7 x) M7 F8 P+ D( M
1205900 ALLEGRO_EDITOR INTERACTIV additional object polygon-rectangle for "snap to pick" 4 \ d9 I* T7 h* {9 X 1327533 SIP_LAYOUT REPORTS Metal Usage Report fails $ h6 w! F) m( \4 n1 G+ K' N* n! o 1341177 ALLEGRO_EDITOR PLACEMENT "Place Replicate Unmatched Component Interface" window size should be increased to show "Matched Component" 3 j. j; M b8 U 1360269 SIP_LAYOUT REPORTS Getting incorrect results in the Metal Usage report of SiP Layout when the variable METAL_USAGE_REPORT_NOARCS is set 7 |+ ~% u7 ?) _& k2 m 1361281 ALLEGRO_EDITOR INTERACTIV Moving stacked vs non-stacked via's should be the same.9 L( S; B7 w* Z' u; a& b5 r
1366525 ALLEGRO_EDITOR INTERACTIV Add replace via with via structure command to Allegro PCB 1 f& M3 e0 _" f) P# V G 1368091 ALLEGRO_EDITOR INTERACTIV Snap pick to fuction should see fiiled rectangle as a shape % G- ~& w" h% u7 U [9 o. u 1371510 APD DATABASE How to show DRC when tack point of wirebond out of finger boundary/ A, |% ^+ E& Q x
1373564 ASI_PI GUI Impedance results are incorrect in PFE 5 Y& p5 k0 [# ~1 n5 R. J 1374703 ALLEGRO_EDITOR SHAPE Inconsistent behavior on shape voiding ; Z, L8 j/ p% P 1376851 CONSTRAINT_MGR UI_FORMS CM workbooks change after simulating 7 q/ }# h$ J2 \ 1377555 ALLEGRO_EDITOR DRC_CONSTR The "Line to SMD Pin Same Net Spacing" DRC toggles everytime we run "Force Update" of Dynamic Shapes.$ X `$ A5 P! k4 h% a- `1 g6 j
1378032 ALLEGRO_EDITOR REPORTS Report command and batch mode give different Waived DRC Report results in PCB Editor # `, K+ v+ ^6 K 1378611 ALLEGRO_EDITOR INTERFACES Enable STEP export to convert the mixed unit into one single unit9 f: U+ q% V9 F# d {' E' W, l) a6 G
1379240 APD PLACEMENT Placement gives error regarding the difference in units between the database and symbol, which is not the case7 Z: q E$ k3 V' m4 `: W
1394908 ALLEGRO_EDITOR DATABASE Database crashes on doing "Show Element" on selected net 7 ?! m( g: N' r 1395541 ALLEGRO_EDITOR PLOTTING Export PDF not correct for Phantom lines: R4 }$ e# N# h
1395747 CONSTRAINT_MGR INTERACTIV Rename refdes causes Allegro to crash. Possibly due to CM being open. 0 H% q& {4 ~9 i, ^. j 1396915 APD STREAM_IF The question about MIRROR geometry function from stream out7 c/ p* u7 H1 X& ?" b& ?) d1 m/ f$ p
1398184 ALLEGRO_EDITOR MANUFACT Mismatch in backdrill data with IPC-2581 export作者: allanwang 时间: 2015-5-7 09:08
谢谢楼主分享！作者: qiuzhang 时间: 2015-5-7 10:18
现在补丁小了好多了，试试作者: zxpchx 时间: 2015-5-7 13:20
是不是和原来16.6的升级方式一样？作者: qiuzhang 时间: 2015-5-7 13:59
打上补丁，在运行下破解就行了作者: zgyzgy 时间: 2015-5-7 14:41
可以转低版本了吗？作者: pzt648485640 时间: 2015-5-8 03:38
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